* [PATCH 1/2] dt-bindings: pinctrl: aspeed: Add missing properties to examples
2022-08-10 16:16 [PATCH 0/2] Convert Aspeed SCU to DT schema Rob Herring
@ 2022-08-10 16:16 ` Rob Herring
2022-08-22 11:13 ` Linus Walleij
2022-08-10 16:16 ` [PATCH 2/2] dt-bindings: mfd: aspeed,ast2x00-scu: Convert to DT schema format Rob Herring
1 sibling, 1 reply; 6+ messages in thread
From: Rob Herring @ 2022-08-10 16:16 UTC (permalink / raw)
To: Lee Jones, Linus Walleij, Krzysztof Kozlowski, Joel Stanley,
Andrew Jeffery
Cc: devicetree, openbmc, linux-gpio, linux-arm-kernel, linux-aspeed,
linux-kernel
The aspeed pinctrl parent node (SCU) in the examples is missing various
properties. Add the properties in preparation for the SCU schema.
Signed-off-by: Rob Herring <robh@kernel.org>
---
.../devicetree/bindings/pinctrl/aspeed,ast2400-pinctrl.yaml | 6 ++++++
.../devicetree/bindings/pinctrl/aspeed,ast2500-pinctrl.yaml | 4 ++++
.../devicetree/bindings/pinctrl/aspeed,ast2600-pinctrl.yaml | 6 ++++++
3 files changed, 16 insertions(+)
diff --git a/Documentation/devicetree/bindings/pinctrl/aspeed,ast2400-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/aspeed,ast2400-pinctrl.yaml
index d3a8911728d0..f4f1ee6b116e 100644
--- a/Documentation/devicetree/bindings/pinctrl/aspeed,ast2400-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/aspeed,ast2400-pinctrl.yaml
@@ -63,6 +63,12 @@ examples:
syscon: scu@1e6e2000 {
compatible = "aspeed,ast2400-scu", "syscon", "simple-mfd";
reg = <0x1e6e2000 0x1a8>;
+ #clock-cells = <1>;
+ #reset-cells = <1>;
+
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x1e6e2000 0x1000>;
pinctrl: pinctrl {
compatible = "aspeed,ast2400-pinctrl";
diff --git a/Documentation/devicetree/bindings/pinctrl/aspeed,ast2500-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/aspeed,ast2500-pinctrl.yaml
index 5d2c1b1fb7fd..8168f0088471 100644
--- a/Documentation/devicetree/bindings/pinctrl/aspeed,ast2500-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/aspeed,ast2500-pinctrl.yaml
@@ -82,6 +82,10 @@ examples:
#clock-cells = <1>;
#reset-cells = <1>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x1e6e2000 0x1000>;
+
pinctrl: pinctrl {
compatible = "aspeed,ast2500-pinctrl";
aspeed,external-nodes = <&gfx>, <&lhc>;
diff --git a/Documentation/devicetree/bindings/pinctrl/aspeed,ast2600-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/aspeed,ast2600-pinctrl.yaml
index e92686d2f062..62424c42c981 100644
--- a/Documentation/devicetree/bindings/pinctrl/aspeed,ast2600-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/aspeed,ast2600-pinctrl.yaml
@@ -96,6 +96,12 @@ examples:
syscon: scu@1e6e2000 {
compatible = "aspeed,ast2600-scu", "syscon", "simple-mfd";
reg = <0x1e6e2000 0xf6c>;
+ #clock-cells = <1>;
+ #reset-cells = <1>;
+
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x1e6e2000 0x1000>;
pinctrl: pinctrl {
compatible = "aspeed,ast2600-pinctrl";
--
2.34.1
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^ permalink raw reply related [flat|nested] 6+ messages in thread* [PATCH 2/2] dt-bindings: mfd: aspeed,ast2x00-scu: Convert to DT schema format
2022-08-10 16:16 [PATCH 0/2] Convert Aspeed SCU to DT schema Rob Herring
2022-08-10 16:16 ` [PATCH 1/2] dt-bindings: pinctrl: aspeed: Add missing properties to examples Rob Herring
@ 2022-08-10 16:16 ` Rob Herring
2022-08-11 6:45 ` Krzysztof Kozlowski
2022-08-11 7:01 ` Lee Jones
1 sibling, 2 replies; 6+ messages in thread
From: Rob Herring @ 2022-08-10 16:16 UTC (permalink / raw)
To: Lee Jones, Linus Walleij, Krzysztof Kozlowski, Joel Stanley,
Andrew Jeffery
Cc: devicetree, openbmc, linux-gpio, linux-arm-kernel, linux-aspeed,
linux-kernel
Convert the aspeed,ast2[456]00-scu binding to DT schema format.
The original binding was missing '#address-cells', '#size-cells',
'ranges', and child nodes, so add them.
Signed-off-by: Rob Herring <robh@kernel.org>
---
.../bindings/mfd/aspeed,ast2x00-scu.yaml | 110 ++++++++++++++++++
.../devicetree/bindings/mfd/aspeed-scu.txt | 48 --------
2 files changed, 110 insertions(+), 48 deletions(-)
create mode 100644 Documentation/devicetree/bindings/mfd/aspeed,ast2x00-scu.yaml
delete mode 100644 Documentation/devicetree/bindings/mfd/aspeed-scu.txt
diff --git a/Documentation/devicetree/bindings/mfd/aspeed,ast2x00-scu.yaml b/Documentation/devicetree/bindings/mfd/aspeed,ast2x00-scu.yaml
new file mode 100644
index 000000000000..1689b986f441
--- /dev/null
+++ b/Documentation/devicetree/bindings/mfd/aspeed,ast2x00-scu.yaml
@@ -0,0 +1,110 @@
+# SPDX-License-Identifier: GPL-2.0
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/mfd/aspeed,ast2x00-scu.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Aspeed System Control Unit
+
+description:
+ The Aspeed System Control Unit manages the global behaviour of the SoC,
+ configuring elements such as clocks, pinmux, and reset.
+
+maintainers:
+ - Joel Stanley <joel@jms.id.au>
+ - Andrew Jeffery <andrew@aj.id.au>
+
+properties:
+ compatible:
+ items:
+ - enum:
+ - aspeed,ast2400-scu
+ - aspeed,ast2500-scu
+ - aspeed,ast2600-scu
+ - const: syscon
+ - const: simple-mfd
+
+ reg:
+ maxItems: 1
+
+ ranges: true
+
+ '#address-cells':
+ const: 1
+
+ '#size-cells':
+ const: 1
+
+ '#clock-cells':
+ const: 1
+
+ '#reset-cells':
+ const: 1
+
+patternProperties:
+ '^p2a-control@[0-9a-f]+$':
+ description: See Documentation/devicetree/bindings/misc/aspeed-p2a-ctrl.txt
+ type: object
+
+ '^pinctrl(@[0-9a-f]+)?$':
+ oneOf:
+ - $ref: /schemas/pinctrl/aspeed,ast2400-pinctrl.yaml
+ - $ref: /schemas/pinctrl/aspeed,ast2500-pinctrl.yaml
+ - $ref: /schemas/pinctrl/aspeed,ast2600-pinctrl.yaml
+
+ '^interrupt-controller@[0-9a-f]+$':
+ description: See Documentation/devicetree/bindings/interrupt-controller/aspeed,ast2xxx-scu-ic.txt
+ type: object
+
+ '^silicon-id@[0-9a-f]+$':
+ description: Unique hardware silicon identifiers within the SoC
+ type: object
+ additionalProperties: false
+
+ properties:
+ compatible:
+ items:
+ - enum:
+ - aspeed,ast2400-silicon-id
+ - aspeed,ast2500-silicon-id
+ - aspeed,ast2600-silicon-id
+ - const: aspeed,silicon-id
+
+ reg:
+ description:
+ The reg should be the unique silicon id register, and not backwards
+ compatible one in eg. the 2600.
+ minItems: 1
+ items:
+ - description: silicon id information registers
+ - description: unique chip id registers
+
+required:
+ - compatible
+ - reg
+ - ranges
+ - '#address-cells'
+ - '#size-cells'
+ - '#clock-cells'
+ - '#reset-cells'
+
+additionalProperties: false
+
+examples:
+ - |
+ syscon@1e6e2000 {
+ compatible = "aspeed,ast2400-scu", "syscon", "simple-mfd";
+ reg = <0x1e6e2000 0x1a8>;
+ #clock-cells = <1>;
+ #reset-cells = <1>;
+
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x1e6e2000 0x1000>;
+
+ silicon-id@7c {
+ compatible = "aspeed,ast2500-silicon-id", "aspeed,silicon-id";
+ reg = <0x7c 0x4>, <0x150 0x8>;
+ };
+ };
+...
diff --git a/Documentation/devicetree/bindings/mfd/aspeed-scu.txt b/Documentation/devicetree/bindings/mfd/aspeed-scu.txt
deleted file mode 100644
index 857ee33f7329..000000000000
--- a/Documentation/devicetree/bindings/mfd/aspeed-scu.txt
+++ /dev/null
@@ -1,48 +0,0 @@
-The Aspeed System Control Unit manages the global behaviour of the SoC,
-configuring elements such as clocks, pinmux, and reset.
-
-Required properties:
-- compatible: One of:
- "aspeed,ast2400-scu", "syscon", "simple-mfd"
- "aspeed,ast2500-scu", "syscon", "simple-mfd"
-
-- reg: contains the offset and length of the SCU memory region
-- #clock-cells: should be set to <1> - the system controller is also a
- clock provider
-- #reset-cells: should be set to <1> - the system controller is also a
- reset line provider
-
-Example:
-
-syscon: syscon@1e6e2000 {
- compatible = "aspeed,ast2400-scu", "syscon", "simple-mfd";
- reg = <0x1e6e2000 0x1a8>;
- #clock-cells = <1>;
- #reset-cells = <1>;
-};
-
-Silicon ID
------------------
-
-Families have unique hardware silicon identifiers within the SoC.
-
-Required properties:
-
- - compatible: "aspeed,silicon-id" or:
- "aspeed,ast2400-silicon-id" or
- "aspeed,ast2500-silicon-id" or
- "aspeed,ast2600-silicon-id"
-
- - reg: offset and length of the silicon id information
- optionally, a second offset and length describes the unique chip id
-
- The reg should be the unique silicon id register, and
- not backwards compatible one in eg. the 2600.
-
-Example:
-
-
-silicon-id@7c {
- compatible = "aspeed,ast2500-silicon-id", "aspeed,silicon-id";
- reg = <0x7c 0x4 0x150 0x8>;
-};
--
2.34.1
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^ permalink raw reply related [flat|nested] 6+ messages in thread