From: Mark Brown <broonie@kernel.org>
To: Leonardo Bras <leo.bras@arm.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will@kernel.org>, Marc Zyngier <maz@kernel.org>,
Joey Gouly <joey.gouly@arm.com>,
Suzuki K Poulose <suzuki.poulose@arm.com>,
Shuah Khan <shuah@kernel.org>, Oliver Upton <oupton@kernel.org>,
Fuad Tabba <fuad.tabba@linux.dev>,
Peter Maydell <peter.maydell@linaro.org>,
Wei-Lin Chang <weilin.chang@arm.com>,
Yao Yuan <yaoyuan@linux.alibaba.com>,
linux-arm-kernel@lists.infradead.org, linux-doc@vger.kernel.org,
kvmarm@lists.linux.dev, linux-kselftest@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH v20 06/14] KVM: arm64: Validate GCS exception lock when emulating ERET
Date: Thu, 3 Sep 2026 20:22:44 +0100 [thread overview]
Message-ID: <2dfd8a6c-42c2-466c-b3d6-2313466fc3d5@sirena.org.uk> (raw)
In-Reply-To: <apmUQETDlhTIuJIY@LeoBrasDK>
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On Thu, Sep 03, 2026 at 04:37:37PM +0100, Leonardo Bras wrote:
> On Tue, Sep 01, 2026 at 10:47:04PM +0100, Mark Brown wrote:
> > + return vcpu_read_sys_reg(vcpu, GCSCR_EL2) & GCSCR_ELx_EXLOCKEN;
> > +}
> The above perfectly translates the GCS part of IllegalExceptionReturn().
> It's a nit, as I suppose there should be no compiler warning on that, but
> the function should return a bool, and the last return line returns an u64.
> Maybe adding a "return !!()" would be better?
There's no need to manually do translations like that in C, the
conversion of 0 to false and any non-zero value to true when an
integer is used in a boolean context is in the standard.
> > * - trying to return to EL1 with HCR_EL2.TGE set
> > + * - GCSCR_ELx.EXLOCKEN is 1 and PSTATE.EXLOCK is 0 when attempting
> > + * to return from ELx the same EL.
> > */
> > if (mode == PSR_MODE_EL3t || mode == PSR_MODE_EL3h ||
> > mode == 0b00001 || (mode & BIT(1)) ||
> > (spsr & PSR_MODE32_BIT) ||
> > + kvm_check_illegal_exlock_return(vcpu, spsr) ||
> > (vcpu_el2_tge_is_set(vcpu) && (mode == PSR_MODE_EL1t ||
> > mode == PSR_MODE_EL1h))) {
> > u64 mask;
>
> In IllegalExceptionReturn(), the GCS-related clause happens at the end, and
> here it happens before the TGE one. Could this cause any weird behavior in
> the future?
>
> I get that by doing like this you don't change the last line of the "if",
> but I wonder if that could change anything.
Given that we take the same action regardless of which or clause
triggers I can't see how it would matter.
> > --- a/arch/arm64/kvm/hyp/vhe/switch.c
> > +++ b/arch/arm64/kvm/hyp/vhe/switch.c
> > @@ -383,6 +383,10 @@ static bool kvm_hyp_handle_eret(struct kvm_vcpu *vcpu, u64 *exit_code)
> > return false;
> > }
> > + /* Push GCS exception lock failures into the slow path */
> > + if (kvm_check_illegal_exlock_return(vcpu, spsr))
> > + return false;
> > /* If ERETAx fails, take the slow path */
> > if (esr_iss_is_eretax(esr)) {
> > if (!(vcpu_has_ptrauth(vcpu) && kvm_auth_eretax(vcpu, &elr)))
> IIUC, this function will be called on the __kvm_vcpu_run_vhe() inner loop,
> in the cases where the guest exited due to a eret.
> What you change here is that in case of an illegal exlock return, it goes
> out of the loop and return to host kernel, probably to deal with it in the
> mentioned slowpath, the same way the ERETAx entry does.
> I don't question on this being needed.
> I would just like to understand why this is needed here.
> This does not seem to be related to nested, as this is called in
> __fixup_guest_exit() and not in fixup_nv_guest_exit(). But would not
> hardware be responsible for cheking this, then?
The code is here because it's part of the ERET handling, this should
only happen for NV as we're not trapping ERET instructions otherwise.
We need this because ERETs from vEL2 are handled in software, modulo the
NV3 fast path mentioned at the top of the function.
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next prev parent reply other threads:[~2026-09-03 19:23 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-01 21:46 [PATCH v20 00/14] KVM: arm64: Provide guest support for GCS Mark Brown
2026-09-01 21:46 ` [PATCH v20 01/14] arm64/gcs: Ensure FGTs for EL1 GCS instructions are disabled Mark Brown
2026-09-03 16:10 ` Lorenzo Stoakes (ARM)
2026-09-01 21:47 ` [PATCH v20 02/14] KVM: arm64: Fix FGT mapping for HFGITR_EL2.nGCSEPP Mark Brown
2026-09-03 16:23 ` Lorenzo Stoakes (ARM)
2026-09-03 19:29 ` Mark Brown
2026-09-01 21:47 ` [PATCH v20 03/14] KVM: arm64: Manage GCS access and registers for guests Mark Brown
2026-09-02 16:44 ` Leonardo Bras
2026-09-03 20:52 ` Mark Brown
2026-09-03 18:13 ` Lorenzo Stoakes (ARM)
2026-09-03 20:41 ` Mark Brown
2026-09-01 21:47 ` [PATCH v20 04/14] KVM: arm64: Ensure GCS memory effects are visible Mark Brown
2026-09-02 16:30 ` Leonardo Bras
2026-09-01 21:47 ` [PATCH v20 05/14] KVM: arm64: Set PSTATE.EXLOCK when entering an exception Mark Brown
2026-09-03 14:25 ` Leonardo Bras
2026-09-03 16:20 ` Mark Brown
2026-09-03 16:40 ` Leonardo Bras
2026-09-01 21:47 ` [PATCH v20 06/14] KVM: arm64: Validate GCS exception lock when emulating ERET Mark Brown
2026-09-03 15:37 ` Leonardo Bras
2026-09-03 19:22 ` Mark Brown [this message]
2026-09-01 21:47 ` [PATCH v20 07/14] KVM: arm64: Forward GCS exceptions to nested guests Mark Brown
2026-09-01 21:47 ` [PATCH v20 08/14] KVM: arm64: Enforce EXLOCK for SPSR and ELR Mark Brown
2026-09-01 21:47 ` [PATCH v20 09/14] KVM: arm64: Allow GCS to be enabled for guests Mark Brown
2026-09-01 21:47 ` [PATCH v20 10/14] KVM: selftests: arm64: Add GCS registers to get-reg-list Mark Brown
2026-09-01 21:47 ` [PATCH v20 11/14] KVM: selftests: arm64: Add GCS to set_id_regs Mark Brown
2026-09-01 21:47 ` [PATCH v20 12/14] KVM: selftests: arm64: Only restore SPSR_EL1 and ELR_EL1 if they change Mark Brown
2026-09-01 21:47 ` [PATCH v20 13/14] tools: Synchronise the kernel esr.h Mark Brown
2026-09-01 21:47 ` [PATCH v20 14/14] KVM: selftests: arm64: Add GCS EXLOCK exception emulation test Mark Brown
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