From: Eric Auger <eauger@redhat.com>
To: Reiji Watanabe <reijiw@google.com>
Cc: kvm@vger.kernel.org, Marc Zyngier <maz@kernel.org>,
Peter Shier <pshier@google.com>,
Paolo Bonzini <pbonzini@redhat.com>,
Will Deacon <will@kernel.org>,
kvmarm@lists.cs.columbia.edu,
linux-arm-kernel@lists.infradead.org
Subject: Re: [RFC PATCH v3 09/29] KVM: arm64: Hide IMPLEMENTATION DEFINED PMU support for the guest
Date: Sat, 4 Dec 2021 15:14:01 +0100 [thread overview]
Message-ID: <2ed3072b-f83d-1b17-0949-ca38267ba94e@redhat.com> (raw)
In-Reply-To: <CAAeT=FwEogskDQVwwTkZSstYX7-X0r1B+hUUHbZOE5T5o9V=ww@mail.gmail.com>
Hi Reiji,
On 12/4/21 2:04 AM, Reiji Watanabe wrote:
> Hi Eric,
>
> On Thu, Dec 2, 2021 at 2:57 AM Eric Auger <eauger@redhat.com> wrote:
>>
>> Hi Reiji,
>>
>> On 11/30/21 6:32 AM, Reiji Watanabe wrote:
>>> Hi Eric,
>>>
>>> On Thu, Nov 25, 2021 at 12:30 PM Eric Auger <eauger@redhat.com> wrote:
>>>>
>>>> Hi Reiji,
>>>>
>>>> On 11/17/21 7:43 AM, Reiji Watanabe wrote:
>>>>> When ID_AA64DFR0_EL1.PMUVER or ID_DFR0_EL1.PERFMON is 0xf, which
>>>>> means IMPLEMENTATION DEFINED PMU supported, KVM unconditionally
>>>>> expose the value for the guest as it is. Since KVM doesn't support
>>>>> IMPLEMENTATION DEFINED PMU for the guest, in that case KVM should
>>>>> exopse 0x0 (PMU is not implemented) instead.
>>>> s/exopse/expose
>>>>>
>>>>> Change cpuid_feature_cap_perfmon_field() to update the field value
>>>>> to 0x0 when it is 0xf.
>>>> is it wrong to expose the guest with a Perfmon value of 0xF? Then the
>>>> guest should not use it as a PMUv3?
>>>
>>>> is it wrong to expose the guest with a Perfmon value of 0xF? Then the
>>>> guest should not use it as a PMUv3?
>>>
>>> For the value 0xf in ID_AA64DFR0_EL1.PMUVER and ID_DFR0_EL1.PERFMON,
>>> Arm ARM says:
>>> "IMPLEMENTATION DEFINED form of performance monitors supported,
>>> PMUv3 not supported."
>>>
>>> Since the PMU that KVM supports for guests is PMUv3, 0xf shouldn't
>>> be exposed to guests (And this patch series doesn't allow userspace
>>> to set the fields to 0xf for guests).
>> What I don't get is why this isn't detected before (in kvm_reset_vcpu).
>> if the VCPU was initialized with KVM_ARM_VCPU_PMU_V3 can we honor this
>> init request if the host pmu is implementation defined?
>
> KVM_ARM_VCPU_INIT with KVM_ARM_VCPU_PMU_V3 will fail in
> kvm_reset_vcpu() if the host PMU is implementation defined.
OK. This was not obvsious to me.
if (kvm_vcpu_has_pmu(vcpu) && !kvm_arm_support_pmu_v3()) {
ret = -EINVAL;
goto out;
}
kvm_perf_init
+ if (perf_num_counters() > 0)
+ static_branch_enable(&kvm_arm_pmu_available);
But I believe you ;-), sorry for the noise
Eric
>
> The AA64DFR0 and DFR0 registers for a vCPU without KVM_ARM_VCPU_PMU_V3
> indicates IMPLEMENTATION DEFINED PMU support, which is not correct.
>
> Thanks,
> Reiji
>
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2021-12-04 14:15 UTC|newest]
Thread overview: 109+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-11-17 6:43 [RFC PATCH v3 00/29] KVM: arm64: Make CPU ID registers writable by userspace Reiji Watanabe
2021-11-17 6:43 ` [RFC PATCH v3 01/29] KVM: arm64: Add has_reset_once flag for vcpu Reiji Watanabe
2021-11-21 12:36 ` Marc Zyngier
2021-11-23 0:51 ` Reiji Watanabe
2021-11-17 6:43 ` [RFC PATCH v3 02/29] KVM: arm64: Save ID registers' sanitized value per vCPU Reiji Watanabe
2021-11-18 20:36 ` Eric Auger
2021-11-18 22:00 ` Reiji Watanabe
2021-11-24 18:08 ` Eric Auger
2021-11-21 12:36 ` Marc Zyngier
2021-11-23 4:39 ` Reiji Watanabe
2021-11-23 10:03 ` Marc Zyngier
2021-11-23 17:12 ` Reiji Watanabe
2021-12-02 10:58 ` Eric Auger
2021-12-04 1:45 ` Reiji Watanabe
2021-12-07 9:34 ` Eric Auger
2021-12-08 5:57 ` Reiji Watanabe
2021-12-08 7:09 ` Eric Auger
2021-12-08 7:18 ` Reiji Watanabe
2021-11-17 6:43 ` [RFC PATCH v3 03/29] KVM: arm64: Introduce struct id_reg_info Reiji Watanabe
2021-11-18 20:36 ` Eric Auger
2021-11-19 4:47 ` Reiji Watanabe
2021-11-21 12:37 ` Marc Zyngier
2021-11-23 0:56 ` Reiji Watanabe
2021-11-24 18:22 ` Eric Auger
2021-11-25 6:05 ` Reiji Watanabe
2021-11-21 12:37 ` Marc Zyngier
2021-11-25 5:27 ` Reiji Watanabe
2021-12-01 15:38 ` Alexandru Elisei
2021-12-02 4:32 ` Reiji Watanabe
2021-11-24 21:07 ` Eric Auger
2021-11-25 6:40 ` Reiji Watanabe
2021-12-02 12:51 ` Eric Auger
2021-12-01 15:24 ` Alexandru Elisei
2021-12-02 4:09 ` Reiji Watanabe
2021-12-02 12:51 ` Eric Auger
2021-12-04 4:35 ` Reiji Watanabe
2021-12-07 9:36 ` Eric Auger
2021-11-17 6:43 ` [RFC PATCH v3 04/29] KVM: arm64: Make ID_AA64PFR0_EL1 writable Reiji Watanabe
2021-11-21 12:37 ` Marc Zyngier
2021-11-24 6:11 ` Reiji Watanabe
2021-11-25 15:35 ` Eric Auger
2021-11-30 1:29 ` Reiji Watanabe
2021-12-02 13:02 ` Eric Auger
2021-12-04 7:59 ` Reiji Watanabe
2021-12-07 9:42 ` Eric Auger
2021-11-17 6:43 ` [RFC PATCH v3 05/29] KVM: arm64: Make ID_AA64PFR1_EL1 writable Reiji Watanabe
2021-11-17 6:43 ` [RFC PATCH v3 06/29] KVM: arm64: Make ID_AA64ISAR0_EL1 writable Reiji Watanabe
2021-11-17 6:43 ` [RFC PATCH v3 07/29] KVM: arm64: Make ID_AA64ISAR1_EL1 writable Reiji Watanabe
2021-11-17 6:43 ` [RFC PATCH v3 08/29] KVM: arm64: Make ID_AA64MMFR0_EL1 writable Reiji Watanabe
2021-11-25 15:31 ` Eric Auger
2021-11-30 4:43 ` Reiji Watanabe
2021-11-25 16:06 ` Eric Auger
2021-11-17 6:43 ` [RFC PATCH v3 09/29] KVM: arm64: Hide IMPLEMENTATION DEFINED PMU support for the guest Reiji Watanabe
2021-11-25 20:30 ` Eric Auger
2021-11-30 5:32 ` Reiji Watanabe
2021-12-01 15:53 ` Alexandru Elisei
2021-12-01 16:09 ` Alexandru Elisei
2021-12-02 4:42 ` Reiji Watanabe
2021-12-02 10:57 ` Eric Auger
2021-12-04 1:04 ` Reiji Watanabe
2021-12-04 14:14 ` Eric Auger [this message]
2021-12-04 17:39 ` Reiji Watanabe
2021-12-04 23:38 ` Itaru Kitayama
2021-12-06 0:27 ` Reiji Watanabe
2021-12-06 9:52 ` Alexandru Elisei
2021-12-06 10:25 ` Eric Auger
2021-12-07 7:07 ` Reiji Watanabe
2021-12-07 8:10 ` Reiji Watanabe
2021-11-17 6:43 ` [RFC PATCH v3 10/29] KVM: arm64: Make ID_AA64DFR0_EL1 writable Reiji Watanabe
2021-11-25 20:30 ` Eric Auger
2021-11-30 5:21 ` Reiji Watanabe
2021-11-17 6:43 ` [RFC PATCH v3 11/29] KVM: arm64: Make ID_DFR0_EL1 writable Reiji Watanabe
2021-11-24 13:46 ` Eric Auger
2021-11-25 5:33 ` Reiji Watanabe
2021-11-17 6:43 ` [RFC PATCH v3 12/29] KVM: arm64: Make ID_DFR1_EL1 writable Reiji Watanabe
2021-11-25 20:30 ` Eric Auger
2021-11-30 5:39 ` Reiji Watanabe
2021-12-02 13:11 ` Eric Auger
2021-11-17 6:43 ` [RFC PATCH v3 13/29] KVM: arm64: Make ID_MMFR0_EL1 writable Reiji Watanabe
2021-11-17 6:43 ` [RFC PATCH v3 14/29] KVM: arm64: Make MVFR1_EL1 writable Reiji Watanabe
2021-11-17 6:43 ` [RFC PATCH v3 15/29] KVM: arm64: Make ID registers without id_reg_info writable Reiji Watanabe
2021-11-17 6:43 ` [RFC PATCH v3 16/29] KVM: arm64: Add consistency checking for frac fields of ID registers Reiji Watanabe
2021-11-17 6:43 ` [RFC PATCH v3 17/29] KVM: arm64: Introduce KVM_CAP_ARM_ID_REG_CONFIGURABLE capability Reiji Watanabe
2021-11-17 6:43 ` [RFC PATCH v3 18/29] KVM: arm64: Add kunit test for ID register validation Reiji Watanabe
2021-11-17 6:43 ` [RFC PATCH v3 19/29] KVM: arm64: Use vcpu->arch cptr_el2 to track value of cptr_el2 for VHE Reiji Watanabe
2021-11-17 6:43 ` [RFC PATCH v3 20/29] KVM: arm64: Use vcpu->arch.mdcr_el2 to track value of mdcr_el2 Reiji Watanabe
2021-11-17 6:43 ` [RFC PATCH v3 21/29] KVM: arm64: Introduce framework to trap disabled features Reiji Watanabe
2021-11-21 18:46 ` Marc Zyngier
2021-11-23 7:27 ` Reiji Watanabe
2021-11-17 6:43 ` [RFC PATCH v3 22/29] KVM: arm64: Trap disabled features of ID_AA64PFR0_EL1 Reiji Watanabe
2021-11-17 6:43 ` [RFC PATCH v3 23/29] KVM: arm64: Trap disabled features of ID_AA64PFR1_EL1 Reiji Watanabe
2021-11-17 6:43 ` [RFC PATCH v3 24/29] KVM: arm64: Trap disabled features of ID_AA64DFR0_EL1 Reiji Watanabe
2021-11-17 6:43 ` [RFC PATCH v3 25/29] KVM: arm64: Trap disabled features of ID_AA64MMFR1_EL1 Reiji Watanabe
2021-11-17 6:43 ` [RFC PATCH v3 26/29] KVM: arm64: Trap disabled features of ID_AA64ISAR1_EL1 Reiji Watanabe
2021-11-17 6:43 ` [RFC PATCH v3 27/29] KVM: arm64: Initialize trapping of disabled CPU features for the guest Reiji Watanabe
2021-11-17 6:43 ` [RFC PATCH v3 28/29] KVM: arm64: Add kunit test for trap initialization Reiji Watanabe
2021-11-17 6:43 ` [RFC PATCH v3 29/29] KVM: arm64: selftests: Introduce id_reg_test Reiji Watanabe
2021-11-18 20:34 ` Eric Auger
2021-11-20 6:39 ` Reiji Watanabe
2021-11-22 14:17 ` Eric Auger
2021-11-23 6:33 ` Reiji Watanabe
2021-11-23 16:00 ` [RFC PATCH v3 00/29] KVM: arm64: Make CPU ID registers writable by userspace Alexandru Elisei
2021-11-24 5:13 ` Reiji Watanabe
2021-11-24 10:50 ` Alexandru Elisei
2021-11-24 17:00 ` Reiji Watanabe
2021-11-23 16:27 ` Alexandru Elisei
2021-11-24 5:49 ` Reiji Watanabe
2021-11-24 10:48 ` Alexandru Elisei
2021-11-24 16:44 ` Reiji Watanabe
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=2ed3072b-f83d-1b17-0949-ca38267ba94e@redhat.com \
--to=eauger@redhat.com \
--cc=kvm@vger.kernel.org \
--cc=kvmarm@lists.cs.columbia.edu \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=maz@kernel.org \
--cc=pbonzini@redhat.com \
--cc=pshier@google.com \
--cc=reijiw@google.com \
--cc=will@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).