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([2600:8803:e7e4:500:3533:aa22:9a69:df1c]) by smtp.gmail.com with ESMTPSA id 586e51a60fabf-448db92c113sm26526fac.4.2026.06.29.08.04.29 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 29 Jun 2026 08:04:29 -0700 (PDT) Message-ID: <2f01a3a0-3698-41e6-8fee-1d2e1629726c@baylibre.com> Date: Mon, 29 Jun 2026 10:04:29 -0500 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 1/2] dt-bindings: iio: adc: Add Nuvoton MA35D1 EADC To: Chi-Wen Weng , jic23@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org Cc: nuno.sa@analog.com, andy@kernel.org, linux-arm-kernel@lists.infradead.org, linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, cwweng@nuvoton.com References: <20260625110638.38438-1-cwweng.linux@gmail.com> <20260625110638.38438-2-cwweng.linux@gmail.com> <40485b4e-6585-42a1-9b84-3019328574c5@baylibre.com> <7e96cc1a-eb60-4eeb-937d-64e83bc35279@gmail.com> Content-Language: en-US From: David Lechner In-Reply-To: <7e96cc1a-eb60-4eeb-937d-64e83bc35279@gmail.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20260629_080431_591557_2073168C X-CRM114-Status: GOOD ( 21.37 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 6/29/26 2:11 AM, Chi-Wen Weng wrote: >> Should there be a dmas property? Datasheet says it supports PDMA transfer. > > The hardware does support PDMA, but DMA support is intentionally not > included in this initial upstream version. The initial driver will only > support interrupt-driven direct raw reads, and the MA35D1 PDMA provider > is not upstream yet. > > I would prefer to leave dmas/dma-names out of the initial binding and > add them later together with DMA support. Please let me know if you > would prefer optional DMA properties to be described now. We always want the devicetree to be as complete as possible even if the drier doesn't use all of the information. So for trivial/well-known bindings like dmas, we should be able to add it now. > >> I assume 8 is for the internal batter voltage channel? Often, we don't >> include fixed internal channels like this in the devicetree since they >> are always the same and don't depend on external wiring. > > Correct. Channels 0 to 7 are the external ADC input pins, while channel > 8 is the internal VBAT input. I will limit the DT child channel nodes to > external channels 0 to 7. > > If VBAT support is added later, it can be exposed by the driver as a > fixed internal channel rather than being described by devicetree. > >> adc.yaml already specifies minItems and maxItems, so we don't need to >> repeat it. > > Since I plan to simplify v2 and drop differential channel support from > the initial submission, I will remove diff-channels from the initial > binding. Same reasoning as above, we want the binding to be as complete as possible, so we should not omit diff-channels since we know what the bindings should look like already. > > Differential input support can be added later once the fixed hardware > pair constraints and signed output handling are implemented in the > driver. >