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From: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
To: Liviu Dudau <liviu.dudau@arm.com>, Rob Herring <robh@kernel.org>
Cc: AngeloGioacchino Del Regno
	<angelogioacchino.delregno@collabora.com>,
	Boris Brezillon <boris.brezillon@collabora.com>,
	Jassi Brar <jassisinghbrar@gmail.com>,
	Chia-I Wu <olvaffe@gmail.com>, Chen-Yu Tsai <wenst@chromium.org>,
	Steven Price <steven.price@arm.com>,
	Maarten Lankhorst <maarten.lankhorst@linux.intel.com>,
	Maxime Ripard <mripard@kernel.org>,
	Thomas Zimmermann <tzimmermann@suse.de>,
	David Airlie <airlied@gmail.com>, Simona Vetter <simona@ffwll.ch>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Matthias Brugger <matthias.bgg@gmail.com>,
	Kees Cook <kees@kernel.org>,
	"Gustavo A. R. Silva" <gustavoars@kernel.org>,
	Ulf Hansson <ulf.hansson@linaro.org>,
	kernel@collabora.com, dri-devel@lists.freedesktop.org,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-mediatek@lists.infradead.org,
	linux-hardening@vger.kernel.org, linux-pm@vger.kernel.org
Subject: Re: [PATCH v8 1/5] dt-bindings: gpu: mali-valhall-csf: add mediatek,mt8196-mali variant
Date: Wed, 29 Oct 2025 14:42:35 +0100	[thread overview]
Message-ID: <3127655.ElGaqSPkdT@workhorse> (raw)
In-Reply-To: <aQFoKoWIlf7xPzZX@e110455-lin.cambridge.arm.com>

On Wednesday, 29 October 2025 02:04:42 Central European Standard Time Liviu Dudau wrote:
> On Tue, Oct 28, 2025 at 09:51:43PM +0100, Nicolas Frattaroli wrote:
> > On Tuesday, 28 October 2025 18:12:35 Central European Standard Time Liviu Dudau wrote:
> > > On Fri, Oct 17, 2025 at 05:31:08PM +0200, Nicolas Frattaroli wrote:
> > > > The Mali-based GPU on the MediaTek MT8196 SoC uses a separate MCU to
> > > > control the power and frequency of the GPU. This is modelled as a power
> > > > domain and clock provider.
> > > > 
> > > > It lets us omit the OPP tables from the device tree, as those can now be
> > > > enumerated at runtime from the MCU.
> > > > 
> > > > Add the necessary schema logic to handle what this SoC expects in terms
> > > > of clocks and power-domains.
> > > > 
> > > > Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
> > > > Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
> > > > Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
> > > > ---
> > > >  .../bindings/gpu/arm,mali-valhall-csf.yaml         | 37 +++++++++++++++++++++-
> > > >  1 file changed, 36 insertions(+), 1 deletion(-)
> > > > 
> > > > diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-valhall-csf.yaml b/Documentation/devicetree/bindings/gpu/arm,mali-valhall-csf.yaml
> > > > index 613040fdb444..860691ce985e 100644
> > > > --- a/Documentation/devicetree/bindings/gpu/arm,mali-valhall-csf.yaml
> > > > +++ b/Documentation/devicetree/bindings/gpu/arm,mali-valhall-csf.yaml
> > > > @@ -45,7 +45,9 @@ properties:
> > > >      minItems: 1
> > > >      items:
> > > >        - const: core
> > > > -      - const: coregroup
> > > > +      - enum:
> > > > +          - coregroup
> > > > +          - stacks
> > > >        - const: stacks
> > > 
> > > I'm not sure how to parse this part of the change. We're overwriting the property
> > > for mt8196-mali anyway so why do we need this? And if we do, should 'stacks'
> > > still remain as a const?
> > 
> > The properties section outside of the if branches outside here
> > specifies a pattern of properties that matches for all devices.
> > 
> > In this case, I changed it so that the second clock-names item
> > may either be "coregroup" or "stacks".
> 
> Why would we want to do that for non-MT8196 devices? It doesn't make sense to me.
> The overwrite in the if branch should be enough to give you want you want (i.e.
> core followed by stacks and only that).

I built my understanding of why on the same reason of why we specify
a minItems of 1 but require it to be 3 in the if branch of the only
other compatible (rk3588): it describes what may be found in those
properties, not what is required by the specific compatible preceding
the generic valhall compatible. arm,mali-valhall-csf is currently
not described as a compatible that's allowed to appear stand-alone
without some other compatible before it to specify further which SoC
it's on, so it really just is whatever RK3588 needs vs. whatever
MT8196 needs at the moment.

Arguably though, there's no functional difference here, and I'm not
aware on any rules regarding this. My change may be problematic
however, because of the whole double stacks thing.

> > Yes, the third "stacks"
> > remains, though if you wanted to be extra precise you could
> > then specify in the non-MT8196 cases that we should not have
> > stacks followed by stacks, but I'd wager some checker for
> > duplicate names may already catch that.
> > 
> > However, I don't think it's a big enough deal to reroll this
> > series again.
> 
> I'm not asking you to re-roll the series but if you agree to drop that
> part I can make the edit when merging it.

If the other DT maintainers (especially Rob who gave it his R-b)
are okay with dropping it, then yes please do.

Kind regards,
Nicolas Frattaroli

> 
> Best regards,
> Liviu
> 
> > 
> > Kind regards,
> > Nicolas Frattaroli
> > 
> > > 
> > > Best regards,
> > > Liviu
> > > 
> > > >  
> > > >    mali-supply: true
> > > > @@ -110,6 +112,27 @@ allOf:
> > > >          power-domain-names: false
> > > >        required:
> > > >          - mali-supply
> > > > +  - if:
> > > > +      properties:
> > > > +        compatible:
> > > > +          contains:
> > > > +            const: mediatek,mt8196-mali
> > > > +    then:
> > > > +      properties:
> > > > +        mali-supply: false
> > > > +        sram-supply: false
> > > > +        operating-points-v2: false
> > > > +        power-domains:
> > > > +          maxItems: 1
> > > > +        power-domain-names: false
> > > > +        clocks:
> > > > +          maxItems: 2
> > > > +        clock-names:
> > > > +          items:
> > > > +            - const: core
> > > > +            - const: stacks
> > > > +      required:
> > > > +        - power-domains
> > > >  
> > > >  examples:
> > > >    - |
> > > > @@ -145,5 +168,17 @@ examples:
> > > >              };
> > > >          };
> > > >      };
> > > > +  - |
> > > > +    gpu@48000000 {
> > > > +        compatible = "mediatek,mt8196-mali", "arm,mali-valhall-csf";
> > > > +        reg = <0x48000000 0x480000>;
> > > > +        clocks = <&gpufreq 0>, <&gpufreq 1>;
> > > > +        clock-names = "core", "stacks";
> > > > +        interrupts = <GIC_SPI 606 IRQ_TYPE_LEVEL_HIGH 0>,
> > > > +                     <GIC_SPI 605 IRQ_TYPE_LEVEL_HIGH 0>,
> > > > +                     <GIC_SPI 604 IRQ_TYPE_LEVEL_HIGH 0>;
> > > > +        interrupt-names = "job", "mmu", "gpu";
> > > > +        power-domains = <&gpufreq>;
> > > > +    };
> > > >  
> > > >  ...
> > > > 
> > > 
> > > 
> > 
> > 
> > 
> > 
> 
> 






  reply	other threads:[~2025-10-29 13:43 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-10-17 15:31 [PATCH v8 0/5] MT8196 GPU Frequency/Power Control Support Nicolas Frattaroli
2025-10-17 15:31 ` [PATCH v8 1/5] dt-bindings: gpu: mali-valhall-csf: add mediatek,mt8196-mali variant Nicolas Frattaroli
2025-10-28 17:12   ` Liviu Dudau
2025-10-28 20:51     ` Nicolas Frattaroli
2025-10-29  1:04       ` Liviu Dudau
2025-10-29 13:42         ` Nicolas Frattaroli [this message]
2025-10-29 13:55           ` Liviu Dudau
2025-11-03 15:24             ` Liviu Dudau
2025-10-17 15:31 ` [PATCH v8 2/5] dt-bindings: power: Add MT8196 GPU frequency control binding Nicolas Frattaroli
2025-10-17 15:31 ` [PATCH v8 3/5] drm/panthor: call into devfreq for current frequency Nicolas Frattaroli
2025-10-20  8:16   ` Karunika Choo
2025-10-17 15:31 ` [PATCH v8 4/5] drm/panthor: Use existing OPP table if present Nicolas Frattaroli
2025-10-20  8:35   ` Karunika Choo
2025-10-20 11:50     ` Nicolas Frattaroli
2025-10-20 13:47   ` Steven Price
2025-10-17 15:31 ` [PATCH v8 5/5] pmdomain: mediatek: Add support for MFlexGraphics Nicolas Frattaroli
2025-10-22 13:52 ` [PATCH v8 0/5] MT8196 GPU Frequency/Power Control Support Ulf Hansson
2025-10-24 13:08   ` Steven Price
2025-10-24 14:50     ` Ulf Hansson
2025-11-03 16:07       ` Liviu Dudau

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