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dmarc=none (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender:Content-Type: Content-Transfer-Encoding:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:Date:Message-ID:From: References:To:Subject:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=sNuBwOscZ3fFOB5b3UFBzwSxUOpbhbT7/CuQrhvdoYc=; b=WOswwuMHrPwnWZtRAPAR3e5zO D9OBPIxacZgXy9/LwUV+xVnTAPIVdK6PSvme0FWb3vSEywp677WXDjeBxk54v+iFYo6t+BRnX9JxE tr9u60NIHFcQFWlMLS33sF0gnWQjVl+zoFd9heh6P/SDH9GB2BPN6LHf9sOLoPCpPabPMT09sCD0B hDH8eM3qa2UmDc/lluk6x2p7h6iKviHEOEd4I0EQ9CNU5yiBpyjM4+8UsQlR+dzd3BTrCg2hNggE9 EN+3FDjw6fz4/XEfCJNx6pBtQsyGJe8rR6zuXii0fC9RPyuTmgYT25vibkHHhRCqfphLeUXk+MJT3 nDOL06sOw==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1jls1c-00009X-0W; Thu, 18 Jun 2020 10:44:04 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1jls1Z-000090-Mj for linux-arm-kernel@lists.infradead.org; Thu, 18 Jun 2020 10:44:03 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 85A7E1045; Thu, 18 Jun 2020 03:44:00 -0700 (PDT) Received: from [192.168.1.84] (unknown [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 432363F6CF; Thu, 18 Jun 2020 03:43:57 -0700 (PDT) Subject: Re: [RFC PATCH 1/2] arm64: kvm: Save/restore MTE registers To: Catalin Marinas References: <20200617123844.29960-1-steven.price@arm.com> <20200617123844.29960-2-steven.price@arm.com> <20200617140546.GE5388@gaia> From: Steven Price Message-ID: <313f5656-b306-72bb-5804-40d20a2cba1e@arm.com> Date: Thu, 18 Jun 2020 11:43:56 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.8.0 MIME-Version: 1.0 In-Reply-To: <20200617140546.GE5388@gaia> Content-Language: en-GB X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200618_034401_780400_F991594A X-CRM114-Status: GOOD ( 19.04 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , Suzuki Poulose , Marc Zyngier , "linux-kernel@vger.kernel.org" , Dave P Martin , James Morse , "linux-arm-kernel@lists.infradead.org" , Thomas Gleixner , Will Deacon , "kvmarm@lists.cs.columbia.edu" , Julien Thierry Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="us-ascii"; Format="flowed" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 17/06/2020 15:05, Catalin Marinas wrote: > On Wed, Jun 17, 2020 at 01:38:43PM +0100, Steven Price wrote: >> diff --git a/arch/arm64/kvm/hyp/sysreg-sr.c b/arch/arm64/kvm/hyp/sysreg-sr.c >> index 75b1925763f1..6ecee1528566 100644 >> --- a/arch/arm64/kvm/hyp/sysreg-sr.c >> +++ b/arch/arm64/kvm/hyp/sysreg-sr.c >> @@ -26,6 +26,12 @@ >> static void __hyp_text __sysreg_save_common_state(struct kvm_cpu_context *ctxt) >> { >> ctxt->sys_regs[MDSCR_EL1] = read_sysreg(mdscr_el1); >> + if (system_supports_mte()) { >> + ctxt->sys_regs[RGSR_EL1] = read_sysreg_s(SYS_RGSR_EL1); >> + ctxt->sys_regs[GCR_EL1] = read_sysreg_s(SYS_GCR_EL1); >> + ctxt->sys_regs[TFSRE0_EL1] = read_sysreg_s(SYS_TFSRE0_EL1); >> + ctxt->sys_regs[TFSR_EL1] = read_sysreg_s(SYS_TFSR_EL1); >> + } > > TFSR_EL1 is not a common register as we have the TFSR_EL2 as well. So > you'd have to access it as read_sysreg_el1(SYS_TFSR) so that, in the VHE > case, it generates TFSR_EL12, otherwise you just save the host register. Ah, thanks for pointing that out - I'd got myself confused with the whole VHE _EL12 registers. I'd managed to miss that TFSR is banked. > Also, since TFSR*_EL1 can be set asynchronously, I think we need to set > the SCTLR_EL2.ITFSB bit so that the register update is synchronised on > entry to EL2. With VHE we get this automatically as part of > SCTLR_EL1_SET but it turns out that we have another SCTLR_ELx_FLAGS > macro for the non-VHE case (why not calling this SCTLR_EL2_* I have no > idea). I hadn't noticed that there was a different set for the non-VHE case which was missing ITFSB - I'll update that. Thanks, Steve >> /* >> * The host arm64 Linux uses sp_el0 to point to 'current' and it must >> @@ -99,6 +105,12 @@ NOKPROBE_SYMBOL(sysreg_save_guest_state_vhe); >> static void __hyp_text __sysreg_restore_common_state(struct kvm_cpu_context *ctxt) >> { >> write_sysreg(ctxt->sys_regs[MDSCR_EL1], mdscr_el1); >> + if (system_supports_mte()) { >> + write_sysreg_s(ctxt->sys_regs[RGSR_EL1], SYS_RGSR_EL1); >> + write_sysreg_s(ctxt->sys_regs[GCR_EL1], SYS_GCR_EL1); >> + write_sysreg_s(ctxt->sys_regs[TFSRE0_EL1], SYS_TFSRE0_EL1); >> + write_sysreg_s(ctxt->sys_regs[TFSR_EL1], SYS_TFSR_EL1); >> + } > > Similarly here, you override the TFSR_EL2 with VHE enabled. > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel