From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.5 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_SANE_2 autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3663FC433E7 for ; Wed, 2 Sep 2020 23:09:47 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 07A3E20767 for ; Wed, 2 Sep 2020 23:09:47 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="soZ3s/C7" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 07A3E20767 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=kernel.crashing.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:Mime-Version:References:In-Reply-To:Date:To:From: Subject:Message-ID:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=T8D2DNwfSQSGlCu5TRhwdS1DUmgH9y6SXbXIoh5psCo=; b=soZ3s/C7b/hXfYsDn1Zx/KjI8 /A1STcmJ7A42qNLsVsoFu1c3CkhMSUr7sE5CLbmCOdeCbtDD93cU5UvQZR2XRxjlpewJexIHjT20V +WTyQhd6GNW0wH/eirzLF8FiFrqyqLjM8k2Upnrgfq2/I0R8M8GsntNX5zUglVvzWNpCROei1EJcC SUq3GSyBhS0OaIK8w7Qfyz4Ntk808/exw2M4P+wnVZQXzu1OWtolRGySGEx+8P2r0NiiGh7g/7n5P S6eLZzyCZyDPsxulbQs1Dr7z8ZT73EtchcACTMk1HUWmZAPMqG2fbyUm080oY1FIci/leJWA4XTtm GklQHQTfw==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1kDbrg-0001OV-MQ; Wed, 02 Sep 2020 23:08:28 +0000 Received: from kernel.crashing.org ([76.164.61.194]) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1kDbrd-0001Nl-H7 for linux-arm-kernel@lists.infradead.org; Wed, 02 Sep 2020 23:08:26 +0000 Received: from localhost (gate.crashing.org [63.228.1.57]) (authenticated bits=0) by kernel.crashing.org (8.14.7/8.14.7) with ESMTP id 082N87Jl005474 (version=TLSv1/SSLv3 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NO); Wed, 2 Sep 2020 18:08:11 -0500 Message-ID: <32538f9d35a4adefde02acb0e37c2447d67fd349.camel@kernel.crashing.org> Subject: Re: [PATCH] arm64: Enable PCI write-combine resources under sysfs From: Benjamin Herrenschmidt To: Catalin Marinas , Lorenzo Pieralisi Date: Thu, 03 Sep 2020 09:08:06 +1000 In-Reply-To: <20200902172156.GD16673@gaia> References: <20200831151827.pumm2p54fyj7fz5s@amazon.com> <20200902113207.GA27676@e121166-lin.cambridge.arm.com> <20200902142922.xc4x6m33unkzewuh@amazon.com> <20200902164702.GA30611@e121166-lin.cambridge.arm.com> <20200902172156.GD16673@gaia> X-Mailer: Evolution 3.28.5-0ubuntu0.18.04.2 Mime-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200902_190825_689041_8AE1F4E9 X-CRM114-Status: GOOD ( 12.13 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-pci@vger.kernel.org, will@kernel.org, Bjorn Helgaas , linux-arm-kernel@lists.infradead.org, Clint Sbisa Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Wed, 2020-09-02 at 18:21 +0100, Catalin Marinas wrote: > > I understand we do want weak ordering for prefetchable BAR mappings > > but my worry is that by exposing the resources as WC to user space > > we are giving user space the impression that those mappings mirror > > x86 WC mappings behaviour that is not true on ARM64. > > Would Device_GRE be close to the x86 WC better? It won't allow > unaligned > accesses and that can be problematic for the user. OTOH, it doesn't > speculate reads, so it's safer from the hardware perspective. Its accepted generally that prefetchable BARs can allow speculative accesses, write combining, re-ordering even etc... and it's also commonly be the target of unaligned accesses. In reality, in PCI land, it really means "no side effects". Cheers, Ben. _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel