From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id F1146C54E41 for ; Wed, 6 Mar 2024 09:55:24 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=qgrB6hfyp0CkKwl8tc7Dndc4uwt/EyyDi2fuuqCuZ0Q=; b=LA159mmuSffEoZ Yeske/xcZfL/+6FMTJRr20mgtLS/vrwKZ60qJ+xqeMRJW7BJV2eBAon5hfDw9NpmPUEqqUexe1jX7 d37lNwQzRMWd5vCCIQMRvQR+F2Ffxj9jlKCx+4OOswET4aUe2f3HPUSJadCVVaUyQdTmS33f5p9KK zU1WVUOfFLaFAITFMTNwknftohZigh0OYgCKaFSiJH4J5a2sMWlvI3AVc3DzOnfdTpjD76bJSUvHs YKvqgi9B4/xqfv4+zZ2AkWyq62YuIyp9v749l1oegC5muB3GnbR+4wx9ZZyPRnAOpugGTfm9Z0JBY h30EEPLW3gLb93rU2pUA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1rhnzN-0000000HH2K-2la7; Wed, 06 Mar 2024 09:55:05 +0000 Received: from mx1.tq-group.com ([93.104.207.81]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1rhnzK-0000000HGzx-0DnV for linux-arm-kernel@lists.infradead.org; Wed, 06 Mar 2024 09:55:04 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=tq-group.com; i=@tq-group.com; q=dns/txt; s=key1; t=1709718901; x=1741254901; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=xRQdIjIh2u/H09dIqzgYCCAQtjiG9q90vID+o94vTbg=; b=JfdHE1uB9povPjO1clJtyUrTW6fHGIunSfAeP+bTHSgFeVgEuAJlJanh Cpv300HFpl4YRzew+fy5x0WsQDYg+84hX3zSu1NottenXQV04o5e3SwMS ct/vyVvNS7iRmvQdd5Vc8v+hqvWcldhwiMKnt8DTarqhPKNqBvTquVc7e PSb35xxkB2fmjkkT+kbGnZS3rRTTB5awTaxe+bmdm3y6TdSBNURQEms9o bpmEwkcOvQ1WeOkXWl6mOKgY+dBOocc5lCdi81qmyFulDX2g/lB3APb8G vgGBEFO4rit7lsfxb1YaFwWGqwnZRLKBNL9Ouadosawdm8xqRkFV9oP6I Q==; X-IronPort-AV: E=Sophos;i="6.06,207,1705359600"; d="scan'208";a="35759910" Received: from vtuxmail01.tq-net.de ([10.115.0.20]) by mx1.tq-group.com with ESMTP; 06 Mar 2024 10:54:58 +0100 Received: from steina-w.localnet (steina-w.tq-net.de [10.123.53.25]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by vtuxmail01.tq-net.de (Postfix) with ESMTPSA id 018A9280071; Wed, 6 Mar 2024 10:54:58 +0100 (CET) From: Alexander Stein To: Vinod Koul , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team , linux-arm-kernel@lists.infradead.org, Frank Li Cc: dmaengine@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, imx@lists.linux.dev, Nicolin Chen , Shengjiu Wang , Joy Zou , Frank Li Subject: Re: [PATCH 1/4] dmaengine: imx-sdma: Support allocate memory from internal SRAM (iram) Date: Wed, 06 Mar 2024 10:55:00 +0100 Message-ID: <3280558.aeNJFYEL58@steina-w> Organization: TQ-Systems GmbH In-Reply-To: <20240303-sdma_upstream-v1-1-869cd0165b09@nxp.com> References: <20240303-sdma_upstream-v1-0-869cd0165b09@nxp.com> <20240303-sdma_upstream-v1-1-869cd0165b09@nxp.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240306_015502_534081_D49793F4 X-CRM114-Status: GOOD ( 22.89 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi Frank, thanks for the patch. Am Montag, 4. M=E4rz 2024, 05:32:53 CET schrieb Frank Li: > From: Nicolin Chen > = > Allocate memory from SoC internal SRAM to reduce DDR access and keep DDR = in > lower power state (such as self-referesh) longer. > = > Check iram_pool before sdma_init() so that ccb/context could be allocated > from iram because DDR maybe in self-referesh in lower power audio case > while sdma still running. > = > Reviewed-by: Shengjiu Wang > Signed-off-by: Nicolin Chen > Signed-off-by: Joy Zou > Signed-off-by: Frank Li > --- > drivers/dma/imx-sdma.c | 53 +++++++++++++++++++++++++++++++++++++-------= ------ > 1 file changed, 40 insertions(+), 13 deletions(-) > = > diff --git a/drivers/dma/imx-sdma.c b/drivers/dma/imx-sdma.c > index 9b42f5e96b1e0..9a6d8f1e9ff63 100644 > --- a/drivers/dma/imx-sdma.c > +++ b/drivers/dma/imx-sdma.c > @@ -24,6 +24,7 @@ > #include > #include > #include > +#include > #include > #include > #include > @@ -516,6 +517,7 @@ struct sdma_engine { > void __iomem *regs; > struct sdma_context_data *context; > dma_addr_t context_phys; > + dma_addr_t ccb_phys; > struct dma_device dma_device; > struct clk *clk_ipg; > struct clk *clk_ahb; > @@ -531,6 +533,7 @@ struct sdma_engine { > /* clock ratio for AHB:SDMA core. 1:1 is 1, 2:1 is 0*/ > bool clk_ratio; > bool fw_loaded; > + struct gen_pool *iram_pool; > }; > = > static int sdma_config_write(struct dma_chan *chan, > @@ -1358,8 +1361,14 @@ static int sdma_request_channel0(struct sdma_engin= e *sdma) > { > int ret =3D -EBUSY; > = > - sdma->bd0 =3D dma_alloc_coherent(sdma->dev, PAGE_SIZE, &sdma->bd0_phys, > - GFP_NOWAIT); > + if (sdma->iram_pool) > + sdma->bd0 =3D gen_pool_dma_alloc(sdma->iram_pool, > + sizeof(struct sdma_buffer_descriptor), > + &sdma->bd0_phys); > + else > + sdma->bd0 =3D dma_alloc_coherent(sdma->dev, > + sizeof(struct sdma_buffer_descriptor), > + &sdma->bd0_phys, GFP_NOWAIT); > if (!sdma->bd0) { > ret =3D -ENOMEM; > goto out; > @@ -1379,10 +1388,14 @@ static int sdma_request_channel0(struct sdma_engi= ne *sdma) > static int sdma_alloc_bd(struct sdma_desc *desc) > { > u32 bd_size =3D desc->num_bd * sizeof(struct sdma_buffer_descriptor); > + struct sdma_engine *sdma =3D desc->sdmac->sdma; > int ret =3D 0; > = > - desc->bd =3D dma_alloc_coherent(desc->sdmac->sdma->dev, bd_size, > - &desc->bd_phys, GFP_NOWAIT); > + if (sdma->iram_pool) > + desc->bd =3D gen_pool_dma_alloc(sdma->iram_pool, bd_size, &desc->bd_ph= ys); > + else > + desc->bd =3D dma_alloc_coherent(sdma->dev, bd_size, &desc->bd_phys, GF= P_NOWAIT); > + > if (!desc->bd) { > ret =3D -ENOMEM; > goto out; > @@ -1394,9 +1407,12 @@ static int sdma_alloc_bd(struct sdma_desc *desc) > static void sdma_free_bd(struct sdma_desc *desc) > { > u32 bd_size =3D desc->num_bd * sizeof(struct sdma_buffer_descriptor); > + struct sdma_engine *sdma =3D desc->sdmac->sdma; > = > - dma_free_coherent(desc->sdmac->sdma->dev, bd_size, desc->bd, > - desc->bd_phys); > + if (sdma->iram_pool) > + gen_pool_free(sdma->iram_pool, (unsigned long)desc->bd, bd_size); > + else > + dma_free_coherent(desc->sdmac->sdma->dev, bd_size, desc->bd, desc->bd_= phys); > } > = > static void sdma_desc_free(struct virt_dma_desc *vd) > @@ -2066,8 +2082,8 @@ static int sdma_get_firmware(struct sdma_engine *sd= ma, > = > static int sdma_init(struct sdma_engine *sdma) > { > + int ccbsize; > int i, ret; > - dma_addr_t ccb_phys; What is the motivation to put ccb_phys to struct sdma_engine? AFAICS this is only used in sdma_init. Also the following patches of this series are not using the struct member. Best regards, Alexander > = > ret =3D clk_enable(sdma->clk_ipg); > if (ret) > @@ -2083,10 +2099,15 @@ static int sdma_init(struct sdma_engine *sdma) > /* Be sure SDMA has not started yet */ > writel_relaxed(0, sdma->regs + SDMA_H_C0PTR); > = > - sdma->channel_control =3D dma_alloc_coherent(sdma->dev, > - MAX_DMA_CHANNELS * sizeof(struct sdma_channel_control) + > - sizeof(struct sdma_context_data), > - &ccb_phys, GFP_KERNEL); > + ccbsize =3D MAX_DMA_CHANNELS * (sizeof(struct sdma_channel_control) > + + sizeof(struct sdma_context_data)); > + > + if (sdma->iram_pool) > + sdma->channel_control =3D gen_pool_dma_alloc(sdma->iram_pool, > + ccbsize, &sdma->ccb_phys); > + else > + sdma->channel_control =3D dma_alloc_coherent(sdma->dev, ccbsize, &sdma= ->ccb_phys, > + GFP_KERNEL); > = > if (!sdma->channel_control) { > ret =3D -ENOMEM; > @@ -2095,7 +2116,7 @@ static int sdma_init(struct sdma_engine *sdma) > = > sdma->context =3D (void *)sdma->channel_control + > MAX_DMA_CHANNELS * sizeof(struct sdma_channel_control); > - sdma->context_phys =3D ccb_phys + > + sdma->context_phys =3D sdma->ccb_phys + > MAX_DMA_CHANNELS * sizeof(struct sdma_channel_control); > = > /* disable all channels */ > @@ -2121,7 +2142,7 @@ static int sdma_init(struct sdma_engine *sdma) > else > writel_relaxed(0, sdma->regs + SDMA_H_CONFIG); > = > - writel_relaxed(ccb_phys, sdma->regs + SDMA_H_C0PTR); > + writel_relaxed(sdma->ccb_phys, sdma->regs + SDMA_H_C0PTR); > = > /* Initializes channel's priorities */ > sdma_set_channel_priority(&sdma->channel[0], 7); > @@ -2272,6 +2293,12 @@ static int sdma_probe(struct platform_device *pdev) > vchan_init(&sdmac->vc, &sdma->dma_device); > } > = > + if (np) { > + sdma->iram_pool =3D of_gen_pool_get(np, "iram", 0); > + if (sdma->iram_pool) > + dev_info(&pdev->dev, "alloc bd from iram.\n"); > + } > + > ret =3D sdma_init(sdma); > if (ret) > goto err_init; > = > = -- = TQ-Systems GmbH | M=FChlstra=DFe 2, Gut Delling | 82229 Seefeld, Germany Amtsgericht M=FCnchen, HRB 105018 Gesch=E4ftsf=FChrer: Detlef Schneider, R=FCdiger Stahl, Stefan Schneider http://www.tq-group.com/ _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel