From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 917EFC4828D for ; Tue, 6 Feb 2024 07:50:39 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=LCJYABRyoI66Kf03TZLcRrr7fnx3Xsjuabyh3dEVrXo=; b=D8quNs+WpunDb6 aGDP+/LFtF2yYVkYs/PWCMrFIWDK6ebRo2Db8eUHEE4jkz6H38GpR0wdxSyMyxZ6lxLgWWVaKGnj5 H1Q5ekymNptA2ha8hVf8/diqYZdDpi0cyvC/fBC0uqqMbXmB/xVVnSiBKEUS+wWnQSPU2hc7JBjM+ gQSY+NGdqVhmYIlnB+v1KifZDTllg1dct4VdofmyvFVrt0lNP3n5AmIfxlJGnGPaCZiOLE8qEtSaN azk9+UBqMcaJZfdQt+JB4XZpHza5nHnzNC0zuKSTZK5J+ws36mwsfmb3Oig8zIEH4DAxeT9js5QRK FU/PoV7RQtYdmQ8v9NMw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1rXGDu-00000006L44-1Ecg; Tue, 06 Feb 2024 07:50:30 +0000 Received: from mx1.tq-group.com ([93.104.207.81]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1rXGDq-00000006L3T-1PSr for linux-arm-kernel@lists.infradead.org; Tue, 06 Feb 2024 07:50:28 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=tq-group.com; i=@tq-group.com; q=dns/txt; s=key1; t=1707205826; x=1738741826; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=zxC+ukvDyW/Jeowql3c1BGxhU5Td/3VxaPsWNrzQwkE=; b=B35KZbTN91oG41hTjzm2rsp5Z+qAOYw1PYELtd1+kpl0pG5jOLBwyhXg e/iG351fvFmyu9DSd67Zc6nFDWGgqiazGl+MTiYexwoNnJNSpbgp+NXW/ ib993Ug1PvGeV/oGMoG2tPHjDXqyPySw+UIt/pt29hCVB/DsfbH7B9xio jP1wsLHhzCP26gNAKG3dvsNeGa3ICr6kr8vl/FGJDZaKhcEkPPyn1kwke Hl1N3a/jxdobCuvSh/J2rb1FStFaSvOWazgrHZ7KuI7RqhMotoWmFAkZt Yfir4dnHjfuv5n3gaoLwsOwrIlXx6mfKz2FEBOUfIcIAGEMinlamkk+ON Q==; X-IronPort-AV: E=Sophos;i="6.05,246,1701126000"; d="scan'208";a="35261519" Received: from vtuxmail01.tq-net.de ([10.115.0.20]) by mx1.tq-group.com with ESMTP; 06 Feb 2024 08:50:21 +0100 Received: from steina-w.localnet (steina-w.tq-net.de [10.123.53.25]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by vtuxmail01.tq-net.de (Postfix) with ESMTPSA id A9C02280075; Tue, 6 Feb 2024 08:50:21 +0100 (CET) From: Alexander Stein To: Frank Li Cc: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Shawn Guo , Sascha Hauer , Fabio Estevam , Pengutronix Kernel Team , NXP Linux Team , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: Re: [PATCH 2/2] arm64: dts: imx8: Fix lpuart DMA channel order Date: Tue, 06 Feb 2024 08:50:22 +0100 Message-ID: <3282920.44csPzL39Z@steina-w> Organization: TQ-Systems GmbH In-Reply-To: References: <20231219123439.3359318-1-alexander.stein@ew.tq-group.com> <20231219123439.3359318-2-alexander.stein@ew.tq-group.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240205_235026_777905_5D452C6F X-CRM114-Status: GOOD ( 16.38 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi, Am Montag, 29. Januar 2024, 18:17:37 CET schrieb Frank Li: > On Tue, Dec 19, 2023 at 01:34:39PM +0100, Alexander Stein wrote: > > Bindings say DMA channels are in order Rx, Tx. Adjust the DT nodes > > accordingly. > > = > > Signed-off-by: Alexander Stein > > --- > > = > > arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi | 16 ++++++++-------- > > 1 file changed, 8 insertions(+), 8 deletions(-) > > = > > diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi > > b/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi index > > a180893ac81e..0f48796e32b2 100644 > > --- a/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi > > +++ b/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi > > @@ -93,8 +93,8 @@ lpuart0: serial@5a060000 { > > = > > assigned-clocks =3D <&clk IMX_SC_R_UART_0 = IMX_SC_PM_CLK_PER>; > > assigned-clock-rates =3D <80000000>; > > power-domains =3D <&pd IMX_SC_R_UART_0>; > > = > > - dma-names =3D "tx","rx"; > > - dmas =3D <&edma2 9 0 0>, <&edma2 8 0 1>; > > + dma-names =3D "rx", "tx"; > > + dmas =3D <&edma2 8 0 0>, <&edma2 9 0 1>; > = > edma device bind header file already merged. > Please include > = > Change "1" to "FSL_EDMA_RX". Thanks, I was not aware of that change. Meanwhile I noticed in my patch the = flags were not switched as well. Best regards, Alexander > Frank > = > > status =3D "disabled"; > > = > > }; > > = > > @@ -107,8 +107,8 @@ lpuart1: serial@5a070000 { > > = > > assigned-clocks =3D <&clk IMX_SC_R_UART_1 = IMX_SC_PM_CLK_PER>; > > assigned-clock-rates =3D <80000000>; > > power-domains =3D <&pd IMX_SC_R_UART_1>; > > = > > - dma-names =3D "tx","rx"; > > - dmas =3D <&edma2 11 0 0>, <&edma2 10 0 1>; > > + dma-names =3D "rx", "tx"; > > + dmas =3D <&edma2 10 0 0>, <&edma2 11 0 1>; > > = > > status =3D "disabled"; > > = > > }; > > = > > @@ -121,8 +121,8 @@ lpuart2: serial@5a080000 { > > = > > assigned-clocks =3D <&clk IMX_SC_R_UART_2 = IMX_SC_PM_CLK_PER>; > > assigned-clock-rates =3D <80000000>; > > power-domains =3D <&pd IMX_SC_R_UART_2>; > > = > > - dma-names =3D "tx","rx"; > > - dmas =3D <&edma2 13 0 0>, <&edma2 12 0 1>; > > + dma-names =3D "rx", "tx"; > > + dmas =3D <&edma2 12 0 0>, <&edma2 13 0 1>; > > = > > status =3D "disabled"; > > = > > }; > > = > > @@ -135,8 +135,8 @@ lpuart3: serial@5a090000 { > > = > > assigned-clocks =3D <&clk IMX_SC_R_UART_3 = IMX_SC_PM_CLK_PER>; > > assigned-clock-rates =3D <80000000>; > > power-domains =3D <&pd IMX_SC_R_UART_3>; > > = > > - dma-names =3D "tx","rx"; > > - dmas =3D <&edma2 15 0 0>, <&edma2 14 0 1>; > > + dma-names =3D "rx", "tx"; > > + dmas =3D <&edma2 14 0 0>, <&edma2 15 0 1>; > > = > > status =3D "disabled"; > > = > > }; -- = TQ-Systems GmbH | M=FChlstra=DFe 2, Gut Delling | 82229 Seefeld, Germany Amtsgericht M=FCnchen, HRB 105018 Gesch=E4ftsf=FChrer: Detlef Schneider, R=FCdiger Stahl, Stefan Schneider http://www.tq-group.com/ _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel