[PATCH v2 00/14] Expand available features on Qnap TS433

[PATCH v2 00/14] Expand available features on Qnap TS433

[Heiko Stuebner]

Thanks to the nicely supported rk3568, the hardest part for adding things,
is to pull things from the vendor-kernel and translating them to mainline
standards.

This series allows the TS433 to use all 4 bays [0], wiggle some LEDs and
access devices connected to all 3 usb ports.

The device runs stable now and might be usable for actual usage.

There is still a todo-list though:
- the ethernet mac address for the realtek chip seems correct,
  but the gmac0 interface currently uses a wrong one
- i2cdetect reports devices on i2c-1 on addresses 54,55,56,57
  model_Q0B20_Q0B30_10_10.conf from the original rescue image labels them
    VPD_MB = I2C:0x54, VPD_BP = I2C:0x56
  the meaning currently being unknown. Some eeprom maybe?
- The regulator tree is slightly dubious. Everthing seems to follow rk3568
  reference designs, but especially the regulator labeled vcc3v3_sd
  seems to supply some PCIe functionality. So I guess the device's
  schematics will look quite different than the regulators added to the
  vendor devicetree.
- Quite a bit of functionality is provided by the MCU connected to uart0.
  According to the model.conf there should be fan-control, a number of
  additional LEDs (status,locate,usb?)


Thanks to Qnap engineers adding an easily accessible header for maskrom
mode on the board, replacing the bootloader is also quite a breeze. A
branch on top of today's u-boot master branch can be found on [1]. I'll
submit that code to u-boot once I can cherry-pick the dts patches.


changes in v2:
- add patches for tsadc, gpio-keys, cpu-supply, pmic, gpu and io-domains


[0] I only have two drives right now, but I tested both the internal
sata connector as well as the PCIe connected sata controller in different
combinations.
[1] https://github.com/mmind/u-boot-rockchip/tree/dev/qnap-ts433/v2024.07


Heiko Stuebner (14):
  arm64: dts: rockchip: add PCIe supply regulator to Qnap-TS433
  arm64: dts: rockchip: enable second PCIe controller on the Qnap-TS433
  arm64: dts: rockchip: enable uart0 on Qnap-TS433
  arm64: dts: rockchip: enable usb ports on Qnap-TS433
  arm64: dts: rockchip: add stdout path on Qnap-TS433
  arm64: dts: rockchip: enable sata1+2 on Qnap-TS433
  arm64: dts: rockchip: add board-aliases for Qnap-TS433
  arm64: dts: rockchip: add hdd leds to Qnap-TS433
  arm64: dts: rockchip: enable the tsadc on the Qnap-TS433
  arm64: dts: rockchip: add gpio-keys to Qnap-TS433
  arm64: dts: rockchip: define cpu-supply on the Qnap-TS433
  arm64: dts: rockchip: add missing pmic information on Qnap-TS433
  arm64: dts: rockchip: enable gpu on Qnap-TS433
  arm64: dts: rockchip: add 2 pmu_io_domain supplies for Qnap-TS433

 .../boot/dts/rockchip/rk3568-qnap-ts433.dts   | 539 +++++++++++++++++-
 1 file changed, 536 insertions(+), 3 deletions(-)

-- 
2.39.2

[PATCH v2 01/14] arm64: dts: rockchip: add PCIe supply regulator to Qnap-TS433

[Heiko Stuebner]

Add the vcc3v3-supply regulator and its link to the pcie controllers.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
 .../boot/dts/rockchip/rk3568-qnap-ts433.dts   | 20 +++++++++++++++++++
 1 file changed, 20 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts b/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts
index 6a998166003c9..889838b4079ae 100644
--- a/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts
@@ -12,6 +12,25 @@
 / {
 	model = "Qnap TS-433-4G NAS System 4-Bay";
 	compatible = "qnap,ts433", "rockchip,rk3568";
+
+	dc_12v: regulator-dc-12v {
+		compatible = "regulator-fixed";
+		regulator-name = "dc_12v";
+		regulator-always-on;
+		regulator-boot-on;
+		regulator-min-microvolt = <12000000>;
+		regulator-max-microvolt = <12000000>;
+	};
+
+	vcc3v3_pcie: regulator-vcc3v3-pcie {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc3v3_pcie";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		enable-active-high;
+		gpios = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>;
+		vin-supply = <&dc_12v>;
+	};
 };
 
 &gmac0 {
@@ -65,6 +84,7 @@ &pcie30phy {
 &pcie3x1 {
 	/* The downstream dts has: rockchip,bifurcation, XXX: find out what this is about */
 	reset-gpios = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>;
+	vpcie3v3-supply = <&vcc3v3_pcie>;
 	status = "okay";
 };
 
-- 
2.39.2

[PATCH v2 02/14] arm64: dts: rockchip: enable second PCIe controller on the Qnap-TS433

[Heiko Stuebner]

The TS433 uses both pcie controllers for sata and the 2nd network
interface. Set the needed data-lanes in the pcie3 phy and enable
the second pcie controller, as well as remove the bifurcation comment.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
 arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts | 9 ++++++++-
 1 file changed, 8 insertions(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts b/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts
index 889838b4079ae..0636a08986572 100644
--- a/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts
@@ -78,16 +78,23 @@ rgmii_phy0: ethernet-phy@0 {
 };
 
 &pcie30phy {
+	data-lanes = <1 2>;
 	status = "okay";
 };
 
 &pcie3x1 {
-	/* The downstream dts has: rockchip,bifurcation, XXX: find out what this is about */
 	reset-gpios = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>;
 	vpcie3v3-supply = <&vcc3v3_pcie>;
 	status = "okay";
 };
 
+&pcie3x2 {
+	num-lanes = <1>;
+	reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>;
+	vpcie3v3-supply = <&vcc3v3_pcie>;
+	status = "okay";
+};
+
 &sdhci {
 	bus-width = <8>;
 	max-frequency = <200000000>;
-- 
2.39.2

[PATCH v2 03/14] arm64: dts: rockchip: enable uart0 on Qnap-TS433

[Heiko Stuebner]

Uart0 is connected to an MCU on the board that handles system control
like the fan-speed. So far no driver for it is available though.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
 arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts b/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts
index 0636a08986572..f3ce3cc4598db 100644
--- a/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts
@@ -102,6 +102,10 @@ &sdhci {
 	status = "okay";
 };
 
+&uart0 {
+	status = "okay";
+};
+
 /*
  * Pins available on CN3 connector at TTL voltage level (3V3).
  * ,_  _.
-- 
2.39.2

[PATCH v2 04/14] arm64: dts: rockchip: enable usb ports on Qnap-TS433

[Heiko Stuebner]

Enable usb controllers and phys and add regulator infrastructure for the
usb ports on the TS433.

Of course there are no schematics available for the device, so the
regulator information comes from the vendor-devicetree with unknown
accuracy.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
 .../boot/dts/rockchip/rk3568-qnap-ts433.dts   | 105 ++++++++++++++++++
 1 file changed, 105 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts b/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts
index f3ce3cc4598db..3fa1670e596cb 100644
--- a/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts
@@ -31,6 +31,49 @@ vcc3v3_pcie: regulator-vcc3v3-pcie {
 		gpios = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>;
 		vin-supply = <&dc_12v>;
 	};
+
+	vcc5v0_host: regulator-vcc5v0-host {
+		compatible = "regulator-fixed";
+		enable-active-high;
+		pinctrl-names = "default";
+		pinctrl-0 = <&vcc5v0_host_en>;
+		gpio = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>;
+		regulator-name = "vcc5v0_host";
+		regulator-always-on;
+		regulator-boot-on;
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		vin-supply = <&vcc5v0_usb>;
+	};
+
+	vcc5v0_otg: regulator-vcc5v0-otg {
+		compatible = "regulator-fixed";
+		enable-active-high;
+		gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&vcc5v0_otg_en>;
+		regulator-name = "vcc5v0_otg";
+		regulator-always-on;
+		regulator-boot-on;
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		vin-supply = <&vcc5v0_usb>;
+	};
+
+	vcc5v0_usb: regulator-vcc5v0-usb {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc5v0_usb";
+		regulator-always-on;
+		regulator-boot-on;
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		vin-supply = <&dc_12v>;
+	};
+};
+
+/* connected to usb_host0_xhci */
+&combphy0 {
+	status = "okay";
 };
 
 &gmac0 {
@@ -95,6 +138,18 @@ &pcie3x2 {
 	status = "okay";
 };
 
+&pinctrl {
+	usb {
+		vcc5v0_host_en: vcc5v0-host-en {
+			rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+
+		vcc5v0_otg_en: vcc5v0-otg-en {
+			rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+	};
+};
+
 &sdhci {
 	bus-width = <8>;
 	max-frequency = <200000000>;
@@ -115,3 +170,53 @@ &uart0 {
 &uart2 {
 	status = "okay";
 };
+
+&usb2phy0 {
+	status = "okay";
+};
+
+/* connected to usb_host0_xhci */
+&usb2phy0_otg {
+	phy-supply = <&vcc5v0_otg>;
+	status = "okay";
+};
+
+&usb2phy1 {
+	status = "okay";
+};
+
+/* connected to usb_host1_ehci/ohci */
+&usb2phy1_host {
+	phy-supply = <&vcc5v0_host>;
+	status = "okay";
+};
+
+/* connected to usb_host0_ehci/ohci */
+&usb2phy1_otg {
+	phy-supply = <&vcc5v0_host>;
+	status = "okay";
+};
+
+/* right port backside */
+&usb_host0_ehci {
+	status = "okay";
+};
+
+&usb_host0_ohci {
+	status = "okay";
+};
+
+/* front port */
+&usb_host0_xhci {
+	dr_mode = "host";
+	status = "okay";
+};
+
+/* left port backside */
+&usb_host1_ehci {
+	status = "okay";
+};
+
+&usb_host1_ohci {
+	status = "okay";
+};
-- 
2.39.2

[PATCH v2 05/14] arm64: dts: rockchip: add stdout path on Qnap-TS433

[Heiko Stuebner]

As most Rockchip boards do, the TS433 also uses uart2 for its serial
output. Set the correct chosen entry for it.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
 arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts b/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts
index 3fa1670e596cb..4fbbdb735eb58 100644
--- a/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts
@@ -13,6 +13,10 @@ / {
 	model = "Qnap TS-433-4G NAS System 4-Bay";
 	compatible = "qnap,ts433", "rockchip,rk3568";
 
+	chosen: chosen {
+		stdout-path = "serial2:115200n8";
+	};
+
 	dc_12v: regulator-dc-12v {
 		compatible = "regulator-fixed";
 		regulator-name = "dc_12v";
-- 
2.39.2

[PATCH v2 06/14] arm64: dts: rockchip: enable sata1+2 on Qnap-TS433

[Heiko Stuebner]

The TS433 has 4 bays. The last two are accessed via a pci-connected
sata controller, while the first two are accessed via the rk3568's
sata controllers. Enable these two now.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
 .../boot/dts/rockchip/rk3568-qnap-ts433.dts    | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts b/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts
index 4fbbdb735eb58..69bed01cbe4ed 100644
--- a/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts
@@ -80,6 +80,16 @@ &combphy0 {
 	status = "okay";
 };
 
+/* connected to sata1 */
+&combphy1 {
+	status = "okay";
+};
+
+/* connected to sata2 */
+&combphy2 {
+	status = "okay";
+};
+
 &gmac0 {
 	assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>;
 	assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>, <&cru CLK_MAC0_2TOP>;
@@ -154,6 +164,14 @@ vcc5v0_otg_en: vcc5v0-otg-en {
 	};
 };
 
+&sata1 {
+	status = "okay";
+};
+
+&sata2 {
+	status = "okay";
+};
+
 &sdhci {
 	bus-width = <8>;
 	max-frequency = <200000000>;
-- 
2.39.2

[PATCH v2 07/14] arm64: dts: rockchip: add board-aliases for Qnap-TS433

[Heiko Stuebner]

Add the aliases for the internal network interface as well as the
emmc on the board.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
 arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts b/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts
index 69bed01cbe4ed..c05433ca7dda4 100644
--- a/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts
@@ -13,6 +13,11 @@ / {
 	model = "Qnap TS-433-4G NAS System 4-Bay";
 	compatible = "qnap,ts433", "rockchip,rk3568";
 
+	aliases {
+		ethernet0 = &gmac0;
+		mmc0 = &sdhci;
+	};
+
 	chosen: chosen {
 		stdout-path = "serial2:115200n8";
 	};
-- 
2.39.2

[PATCH v2 08/14] arm64: dts: rockchip: add hdd leds to Qnap-TS433

[Heiko Stuebner]

Add the 4 gpio-controlled LEDs to the Qnap-TS433.

They are meant for individual disk activitivy, but I haven't found a
way for how to connect them to their individual sata slot yet.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
 .../boot/dts/rockchip/rk3568-qnap-ts433.dts   | 59 +++++++++++++++++++
 1 file changed, 59 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts b/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts
index c05433ca7dda4..d36467c2baf02 100644
--- a/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts
@@ -6,6 +6,7 @@
 
 /dts-v1/;
 
+#include <dt-bindings/leds/common.h>
 #include <dt-bindings/gpio/gpio.h>
 #include "rk3568.dtsi"
 
@@ -22,6 +23,46 @@ chosen: chosen {
 		stdout-path = "serial2:115200n8";
 	};
 
+	leds {
+		compatible = "gpio-leds";
+
+		led_hdd1: led-0 {
+			color = <LED_COLOR_ID_GREEN>;
+			function = LED_FUNCTION_DISK;
+			gpios = <&gpio1 RK_PD5 GPIO_ACTIVE_LOW>;
+			linux,default-trigger = "disk-activity";
+			pinctrl-names = "default";
+			pinctrl-0 = <&hdd1_led_pin>;
+		};
+
+		led_hdd2: led-1 {
+			color = <LED_COLOR_ID_GREEN>;
+			function = LED_FUNCTION_DISK;
+			gpios = <&gpio1 RK_PD6 GPIO_ACTIVE_LOW>;
+			linux,default-trigger = "disk-activity";
+			pinctrl-names = "default";
+			pinctrl-0 = <&hdd2_led_pin>;
+		};
+
+		led_hdd3: led-2 {
+			color = <LED_COLOR_ID_GREEN>;
+			function = LED_FUNCTION_DISK;
+			gpios = <&gpio1 RK_PD7 GPIO_ACTIVE_LOW>;
+			linux,default-trigger = "disk-activity";
+			pinctrl-names = "default";
+			pinctrl-0 = <&hdd3_led_pin>;
+		};
+
+		led_hdd4: led-3 {
+			color = <LED_COLOR_ID_GREEN>;
+			function = LED_FUNCTION_DISK;
+			gpios = <&gpio2 RK_PA0 GPIO_ACTIVE_LOW>;
+			linux,default-trigger = "disk-activity";
+			pinctrl-names = "default";
+			pinctrl-0 = <&hdd4_led_pin>;
+		};
+	};
+
 	dc_12v: regulator-dc-12v {
 		compatible = "regulator-fixed";
 		regulator-name = "dc_12v";
@@ -158,6 +199,24 @@ &pcie3x2 {
 };
 
 &pinctrl {
+	leds {
+		hdd1_led_pin: hdd1-led-pin {
+			rockchip,pins = <1 RK_PD5 RK_FUNC_GPIO &pcfg_pull_up>;
+		};
+
+		hdd2_led_pin: hdd2-led-pin {
+			rockchip,pins = <1 RK_PD6 RK_FUNC_GPIO &pcfg_pull_up>;
+		};
+
+		hdd3_led_pin: hdd3-led-pin {
+			rockchip,pins = <1 RK_PD7 RK_FUNC_GPIO &pcfg_pull_up>;
+		};
+
+		hdd4_led_pin: hdd4_led-pin {
+			rockchip,pins = <2 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>;
+		};
+	};
+
 	usb {
 		vcc5v0_host_en: vcc5v0-host-en {
 			rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
-- 
2.39.2

[PATCH v2 09/14] arm64: dts: rockchip: enable the tsadc on the Qnap-TS433

[Heiko Stuebner]

Enable the tsadc node to allow for temperature measurements of the soc.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
 arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts b/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts
index d36467c2baf02..02fa46beb6371 100644
--- a/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts
@@ -243,6 +243,12 @@ &sdhci {
 	status = "okay";
 };
 
+&tsadc {
+	rockchip,hw-tshut-mode = <1>;
+	rockchip,hw-tshut-polarity = <0>;
+	status = "okay";
+};
+
 &uart0 {
 	status = "okay";
 };
-- 
2.39.2

[PATCH v2 10/14] arm64: dts: rockchip: add gpio-keys to Qnap-TS433

[Heiko Stuebner]

The TS433 has 3 buttons, power and copy in the front as well as a reset
pinhole button on the back. The power-button is connected to the embedded
controller while the other two buttons are just gpio connected.

Add the gpio-keys definition for the two buttons we can handle right now.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
 .../boot/dts/rockchip/rk3568-qnap-ts433.dts   | 29 +++++++++++++++++++
 1 file changed, 29 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts b/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts
index 02fa46beb6371..c593a9c2313a3 100644
--- a/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts
@@ -6,6 +6,7 @@
 
 /dts-v1/;
 
+#include <dt-bindings/input/input.h>
 #include <dt-bindings/leds/common.h>
 #include <dt-bindings/gpio/gpio.h>
 #include "rk3568.dtsi"
@@ -23,6 +24,24 @@ chosen: chosen {
 		stdout-path = "serial2:115200n8";
 	};
 
+	keys {
+		compatible = "gpio-keys";
+		pinctrl-0 = <&copy_button_pin>, <&reset_button_pin>;
+		pinctrl-names = "default";
+
+		key-copy {
+			label = "copy";
+			gpios = <&gpio0 RK_PB6 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_COPY>;
+		};
+
+		key-reset {
+			label = "reset";
+			gpios = <&gpio0 RK_PB5 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RESTART>;
+		};
+	};
+
 	leds {
 		compatible = "gpio-leds";
 
@@ -199,6 +218,16 @@ &pcie3x2 {
 };
 
 &pinctrl {
+	keys {
+		copy_button_pin: copy-button-pin {
+			rockchip,pins = <0 RK_PB6 RK_FUNC_GPIO &pcfg_pull_up>;
+		};
+
+		reset_button_pin: reset-button-pin {
+			rockchip,pins = <0 RK_PB5 RK_FUNC_GPIO &pcfg_pull_up>;
+		};
+	};
+
 	leds {
 		hdd1_led_pin: hdd1-led-pin {
 			rockchip,pins = <1 RK_PD5 RK_FUNC_GPIO &pcfg_pull_up>;
-- 
2.39.2

[PATCH v2 11/14] arm64: dts: rockchip: define cpu-supply on the Qnap-TS433

[Heiko Stuebner]

The TS433 seems to use a silergy,syr827 regulator for the cpu supply.
At least that is the compatible used in the vendor devicetree, though
it could very well also be another fan53555 clone.

Define the needed regulator node and hook up the cpu-supply to the
cpu cores.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
 .../boot/dts/rockchip/rk3568-qnap-ts433.dts   | 41 +++++++++++++++++++
 1 file changed, 41 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts b/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts
index c593a9c2313a3..a576d45ccc3e0 100644
--- a/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts
@@ -129,6 +129,16 @@ vcc5v0_otg: regulator-vcc5v0-otg {
 		vin-supply = <&vcc5v0_usb>;
 	};
 
+	vcc5v0_sys: vcc5v0-sys {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc5v0_sys";
+		regulator-always-on;
+		regulator-boot-on;
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		vin-supply = <&dc_12v>;
+	};
+
 	vcc5v0_usb: regulator-vcc5v0-usb {
 		compatible = "regulator-fixed";
 		regulator-name = "vcc5v0_usb";
@@ -155,6 +165,22 @@ &combphy2 {
 	status = "okay";
 };
 
+&cpu0 {
+	cpu-supply = <&vdd_cpu>;
+};
+
+&cpu1 {
+	cpu-supply = <&vdd_cpu>;
+};
+
+&cpu2 {
+	cpu-supply = <&vdd_cpu>;
+};
+
+&cpu3 {
+	cpu-supply = <&vdd_cpu>;
+};
+
 &gmac0 {
 	assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>;
 	assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>, <&cru CLK_MAC0_2TOP>;
@@ -174,12 +200,27 @@ &gmac0_rgmii_clk
 };
 
 &i2c0 {
+	status = "okay";
+
 	pmic@20 {
 		compatible = "rockchip,rk809";
 		reg = <0x20>;
 		interrupt-parent = <&gpio0>;
 		interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
 	};
+
+	vdd_cpu: regulator@40 {
+		compatible = "silergy,syr827";
+		reg = <0x40>;
+		fcs,suspend-voltage-selector = <1>;
+		regulator-name = "vdd_cpu";
+		regulator-always-on;
+		regulator-boot-on;
+		regulator-min-microvolt = <712500>;
+		regulator-max-microvolt = <1390000>;
+		regulator-ramp-delay = <2300>;
+		vin-supply = <&vcc5v0_sys>;
+	};
 };
 
 &i2c1 {
-- 
2.39.2

[PATCH v2 12/14] arm64: dts: rockchip: add missing pmic information on Qnap-TS433

[Heiko Stuebner]

Fill in the missing pieces for RK809 pmic used on the TS433.

The regulator setup comes from the vendor-devicetree, so without proper
schematics its accuracy is somewhat unclear, but it looks really similar
to all the other rk3568 boards, so follows the reference design it seems.

The one caveat is related to vcc3v3_sd. This regulator needs to stay on.
When turned off because of no users, access to both PCIe controllers
will stall. Maybe this rail does supply the 100MHz refclk generation
or so.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
 .../boot/dts/rockchip/rk3568-qnap-ts433.dts   | 229 +++++++++++++++++-
 1 file changed, 227 insertions(+), 2 deletions(-)

diff --git a/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts b/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts
index a576d45ccc3e0..779e1b8a35ca5 100644
--- a/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts
@@ -101,6 +101,16 @@ vcc3v3_pcie: regulator-vcc3v3-pcie {
 		vin-supply = <&dc_12v>;
 	};
 
+	vcc3v3_sys: vcc3v3-sys {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc3v3_sys";
+		regulator-always-on;
+		regulator-boot-on;
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		vin-supply = <&dc_12v>;
+	};
+
 	vcc5v0_host: regulator-vcc5v0-host {
 		compatible = "regulator-fixed";
 		enable-active-high;
@@ -202,11 +212,220 @@ &gmac0_rgmii_clk
 &i2c0 {
 	status = "okay";
 
-	pmic@20 {
+	rk809: pmic@20 {
 		compatible = "rockchip,rk809";
 		reg = <0x20>;
 		interrupt-parent = <&gpio0>;
-		interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
+		interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>;
+		#clock-cells = <1>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&pmic_int_l>;
+		system-power-controller;
+		vcc1-supply = <&vcc3v3_sys>;
+		vcc2-supply = <&vcc3v3_sys>;
+		vcc3-supply = <&vcc3v3_sys>;
+		vcc4-supply = <&vcc3v3_sys>;
+		vcc5-supply = <&vcc3v3_sys>;
+		vcc6-supply = <&vcc3v3_sys>;
+		vcc7-supply = <&vcc3v3_sys>;
+		vcc8-supply = <&vcc3v3_sys>;
+		vcc9-supply = <&vcc3v3_sys>;
+		wakeup-source;
+
+		regulators {
+			vdd_logic: DCDC_REG1 {
+				regulator-name = "vdd_logic";
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-initial-mode = <0x2>;
+				regulator-min-microvolt = <500000>;
+				regulator-max-microvolt = <1350000>;
+				regulator-ramp-delay = <6001>;
+
+				regulator-state-mem {
+					regulator-off-in-suspend;
+				};
+			};
+
+			vdd_gpu: DCDC_REG2 {
+				regulator-name = "vdd_gpu";
+				regulator-always-on;
+				regulator-initial-mode = <0x2>;
+				regulator-min-microvolt = <500000>;
+				regulator-max-microvolt = <1350000>;
+				regulator-ramp-delay = <6001>;
+
+				regulator-state-mem {
+					regulator-off-in-suspend;
+				};
+			};
+
+			vcc_ddr: DCDC_REG3 {
+				regulator-name = "vcc_ddr";
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-initial-mode = <0x2>;
+
+				regulator-state-mem {
+					regulator-on-in-suspend;
+				};
+			};
+
+			vdd_npu: DCDC_REG4 {
+				regulator-name = "vdd_npu";
+				regulator-initial-mode = <0x2>;
+				regulator-min-microvolt = <500000>;
+				regulator-max-microvolt = <1350000>;
+				regulator-ramp-delay = <6001>;
+
+				regulator-state-mem {
+					regulator-off-in-suspend;
+				};
+			};
+
+			vcc_1v8: DCDC_REG5 {
+				regulator-name = "vcc_1v8";
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+
+				regulator-state-mem {
+					regulator-off-in-suspend;
+				};
+			};
+
+			vdda0v9_image: LDO_REG1 {
+				regulator-name = "vdda0v9_image";
+				regulator-always-on;
+				regulator-min-microvolt = <900000>;
+				regulator-max-microvolt = <900000>;
+
+				regulator-state-mem {
+					regulator-off-in-suspend;
+				};
+			};
+
+			vdda_0v9: LDO_REG2 {
+				regulator-name = "vdda_0v9";
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <900000>;
+				regulator-max-microvolt = <900000>;
+
+				regulator-state-mem {
+					regulator-off-in-suspend;
+				};
+			};
+
+			vdda0v9_pmu: LDO_REG3 {
+				regulator-name = "vdda0v9_pmu";
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <900000>;
+				regulator-max-microvolt = <900000>;
+
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <900000>;
+				};
+			};
+
+			vccio_acodec: LDO_REG4 {
+				regulator-name = "vccio_acodec";
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <3300000>;
+				regulator-max-microvolt = <3300000>;
+
+				regulator-state-mem {
+					regulator-off-in-suspend;
+				};
+			};
+
+			vccio_sd: LDO_REG5 {
+				regulator-name = "vccio_sd";
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <3300000>;
+
+				regulator-state-mem {
+					regulator-off-in-suspend;
+				};
+			};
+
+			vcc3v3_pmu: LDO_REG6 {
+				regulator-name = "vcc3v3_pmu";
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <3300000>;
+				regulator-max-microvolt = <3300000>;
+
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <3300000>;
+				};
+			};
+
+			vcca_1v8: LDO_REG7 {
+				regulator-name = "vcca_1v8";
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+
+				regulator-state-mem {
+					regulator-off-in-suspend;
+				};
+			};
+
+			vcca1v8_pmu: LDO_REG8 {
+				regulator-name = "vcca1v8_pmu";
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <1800000>;
+				};
+			};
+
+			vcca1v8_image: LDO_REG9 {
+				regulator-name = "vcca1v8_image";
+				regulator-always-on;
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+
+				regulator-state-mem {
+					regulator-off-in-suspend;
+				};
+			};
+
+			vcc_3v3: SWITCH_REG1 {
+				regulator-name = "vcc_3v3";
+				regulator-always-on;
+				regulator-boot-on;
+
+				regulator-state-mem {
+					regulator-off-in-suspend;
+				};
+			};
+
+			vcc3v3_sd: SWITCH_REG2 {
+				regulator-name = "vcc3v3_sd";
+				/*
+				 * turning this off, breaks access to both
+				 * PCIe controllers, refclk generator perhaps
+				 */
+				regulator-always-on;
+				regulator-boot-on;
+
+				regulator-state-mem {
+					regulator-off-in-suspend;
+				};
+			};
+		};
 	};
 
 	vdd_cpu: regulator@40 {
@@ -287,6 +506,12 @@ hdd4_led_pin: hdd4_led-pin {
 		};
 	};
 
+	pmic {
+		pmic_int_l: pmic-int-l {
+			rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
+		};
+	};
+
 	usb {
 		vcc5v0_host_en: vcc5v0-host-en {
 			rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
-- 
2.39.2

[PATCH v2 13/14] arm64: dts: rockchip: enable gpu on Qnap-TS433

[Heiko Stuebner]

The TS433 doesn't provide display output, but the gpu nevertheless can be
used for compute tasks for example.

So there is no reason not to enable it.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
 arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts b/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts
index 779e1b8a35ca5..913d28cee8e9e 100644
--- a/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts
@@ -209,6 +209,11 @@ &gmac0_rgmii_clk
 	status = "okay";
 };
 
+&gpu {
+	mali-supply = <&vdd_gpu>;
+	status = "okay";
+};
+
 &i2c0 {
 	status = "okay";
 
-- 
2.39.2

[PATCH v2 14/14] arm64: dts: rockchip: add 2 pmu_io_domain supplies for Qnap-TS433

[Heiko Stuebner]

Add the two supplies for the pmu-io-domains that are defined in the
vendor devicetree for the TS433.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
 arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts b/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts
index 913d28cee8e9e..4213c351faf5d 100644
--- a/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts
@@ -528,6 +528,11 @@ vcc5v0_otg_en: vcc5v0-otg-en {
 	};
 };
 
+&pmu_io_domains {
+	vccio4-supply = <&vcc_1v8>;
+	vccio6-supply = <&vcc_1v8>;
+};
+
 &sata1 {
 	status = "okay";
 };
-- 
2.39.2

Re: [PATCH v2 11/14] arm64: dts: rockchip: define cpu-supply on the Qnap-TS433

[Heiko Stübner]

Am Sonntag, 21. Juli 2024, 19:37:20 CEST schrieb Heiko Stuebner:
> diff --git a/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts b/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts
> index c593a9c2313a3..a576d45ccc3e0 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts
> +++ b/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts
> @@ -129,6 +129,16 @@ vcc5v0_otg: regulator-vcc5v0-otg {
>  		vin-supply = <&vcc5v0_usb>;
>  	};
>  
> +	vcc5v0_sys: vcc5v0-sys {

should be
	vcc5v0_sys: regulator-vcc5v0-sys {


> +		compatible = "regulator-fixed";
> +		regulator-name = "vcc5v0_sys";
> +		regulator-always-on;
> +		regulator-boot-on;
> +		regulator-min-microvolt = <5000000>;
> +		regulator-max-microvolt = <5000000>;
> +		vin-supply = <&dc_12v>;
> +	};
> +

Re: [PATCH v2 12/14] arm64: dts: rockchip: add missing pmic information on Qnap-TS433

[Heiko Stübner]

Am Sonntag, 21. Juli 2024, 19:37:21 CEST schrieb Heiko Stuebner:
> diff --git a/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts b/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts
> index a576d45ccc3e0..779e1b8a35ca5 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts
> +++ b/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts
> @@ -101,6 +101,16 @@ vcc3v3_pcie: regulator-vcc3v3-pcie {
>  		vin-supply = <&dc_12v>;
>  	};
>  
> +	vcc3v3_sys: vcc3v3-sys {

should be
	vcc3v3_sys: regulator-vcc3v3-sys {


> +		compatible = "regulator-fixed";
> +		regulator-name = "vcc3v3_sys";
> +		regulator-always-on;
> +		regulator-boot-on;
> +		regulator-min-microvolt = <3300000>;
> +		regulator-max-microvolt = <3300000>;
> +		vin-supply = <&dc_12v>;
> +	};
> +

Re: [PATCH v2 00/14] Expand available features on Qnap TS433

[Uwe Kleine-König]

[-- Attachment #1: Type: text/plain, Size: 7795 bytes --]

Hello Heiko,

On Sun, Jul 21, 2024 at 07:37:09PM +0200, Heiko Stuebner wrote:
> Thanks to the nicely supported rk3568, the hardest part for adding things,
> is to pull things from the vendor-kernel and translating them to mainline
> standards.
> 
> This series allows the TS433 to use all 4 bays [0], wiggle some LEDs and
> access devices connected to all 3 usb ports.
> 
> The device runs stable now and might be usable for actual usage.
> 
> There is still a todo-list though:
> - the ethernet mac address for the realtek chip seems correct,
>   but the gmac0 interface currently uses a wrong one
> - i2cdetect reports devices on i2c-1 on addresses 54,55,56,57
>   model_Q0B20_Q0B30_10_10.conf from the original rescue image labels them
>     VPD_MB = I2C:0x54, VPD_BP = I2C:0x56
>   the meaning currently being unknown. Some eeprom maybe?
> - The regulator tree is slightly dubious. Everthing seems to follow rk3568
>   reference designs, but especially the regulator labeled vcc3v3_sd
>   seems to supply some PCIe functionality. So I guess the device's
>   schematics will look quite different than the regulators added to the
>   vendor devicetree.
> - Quite a bit of functionality is provided by the MCU connected to uart0.
>   According to the model.conf there should be fan-control, a number of
>   additional LEDs (status,locate,usb?)

Tested-by: Uwe Kleine-König <ukleinek@debian.org>

I have a few suggested changes, instead of describing them in prose in
reply to the individual patches here comes a diff. Feel free to ignore,
in that case I'll care about those when your series landed. It's mostly
about comments and dropping unused labels.

Note I didn't test the rtc change, as I sticked to the Debian kernel and
didn't compile a new one, yet.

Best regards
Uwe

diff --git a/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts b/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts
index 4213c351faf5..ae6c10c15ca7 100644
--- a/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts
@@ -20,7 +20,7 @@ aliases {
 		mmc0 = &sdhci;
 	};
 
-	chosen: chosen {
+	chosen {
 		stdout-path = "serial2:115200n8";
 	};
 
@@ -45,7 +45,7 @@ key-reset {
 	leds {
 		compatible = "gpio-leds";
 
-		led_hdd1: led-0 {
+		led-0 {
 			color = <LED_COLOR_ID_GREEN>;
 			function = LED_FUNCTION_DISK;
 			gpios = <&gpio1 RK_PD5 GPIO_ACTIVE_LOW>;
@@ -54,7 +54,7 @@ led_hdd1: led-0 {
 			pinctrl-0 = <&hdd1_led_pin>;
 		};
 
-		led_hdd2: led-1 {
+		led-1 {
 			color = <LED_COLOR_ID_GREEN>;
 			function = LED_FUNCTION_DISK;
 			gpios = <&gpio1 RK_PD6 GPIO_ACTIVE_LOW>;
@@ -63,7 +63,7 @@ led_hdd2: led-1 {
 			pinctrl-0 = <&hdd2_led_pin>;
 		};
 
-		led_hdd3: led-2 {
+		led-2 {
 			color = <LED_COLOR_ID_GREEN>;
 			function = LED_FUNCTION_DISK;
 			gpios = <&gpio1 RK_PD7 GPIO_ACTIVE_LOW>;
@@ -72,7 +72,7 @@ led_hdd3: led-2 {
 			pinctrl-0 = <&hdd3_led_pin>;
 		};
 
-		led_hdd4: led-3 {
+		led-3 {
 			color = <LED_COLOR_ID_GREEN>;
 			function = LED_FUNCTION_DISK;
 			gpios = <&gpio2 RK_PA0 GPIO_ACTIVE_LOW>;
@@ -191,6 +191,7 @@ &cpu3 {
 	cpu-supply = <&vdd_cpu>;
 };
 
+/* lower ethernet jack on the back side */
 &gmac0 {
 	assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>;
 	assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>, <&cru CLK_MAC0_2TOP>;
@@ -217,7 +218,7 @@ &gpu {
 &i2c0 {
 	status = "okay";
 
-	rk809: pmic@20 {
+	pmic@20 {
 		compatible = "rockchip,rk809";
 		reg = <0x20>;
 		interrupt-parent = <&gpio0>;
@@ -238,7 +239,7 @@ rk809: pmic@20 {
 		wakeup-source;
 
 		regulators {
-			vdd_logic: DCDC_REG1 {
+			DCDC_REG1 {
 				regulator-name = "vdd_logic";
 				regulator-always-on;
 				regulator-boot-on;
@@ -265,7 +266,7 @@ regulator-state-mem {
 				};
 			};
 
-			vcc_ddr: DCDC_REG3 {
+			DCDC_REG3 {
 				regulator-name = "vcc_ddr";
 				regulator-always-on;
 				regulator-boot-on;
@@ -276,7 +277,7 @@ regulator-state-mem {
 				};
 			};
 
-			vdd_npu: DCDC_REG4 {
+			DCDC_REG4 {
 				regulator-name = "vdd_npu";
 				regulator-initial-mode = <0x2>;
 				regulator-min-microvolt = <500000>;
@@ -300,7 +301,7 @@ regulator-state-mem {
 				};
 			};
 
-			vdda0v9_image: LDO_REG1 {
+			LDO_REG1 {
 				regulator-name = "vdda0v9_image";
 				regulator-always-on;
 				regulator-min-microvolt = <900000>;
@@ -311,7 +312,7 @@ regulator-state-mem {
 				};
 			};
 
-			vdda_0v9: LDO_REG2 {
+			LDO_REG2 {
 				regulator-name = "vdda_0v9";
 				regulator-always-on;
 				regulator-boot-on;
@@ -323,7 +324,7 @@ regulator-state-mem {
 				};
 			};
 
-			vdda0v9_pmu: LDO_REG3 {
+			LDO_REG3 {
 				regulator-name = "vdda0v9_pmu";
 				regulator-always-on;
 				regulator-boot-on;
@@ -336,7 +337,7 @@ regulator-state-mem {
 				};
 			};
 
-			vccio_acodec: LDO_REG4 {
+			LDO_REG4 {
 				regulator-name = "vccio_acodec";
 				regulator-always-on;
 				regulator-boot-on;
@@ -348,7 +349,7 @@ regulator-state-mem {
 				};
 			};
 
-			vccio_sd: LDO_REG5 {
+			LDO_REG5 {
 				regulator-name = "vccio_sd";
 				regulator-min-microvolt = <1800000>;
 				regulator-max-microvolt = <3300000>;
@@ -358,7 +359,7 @@ regulator-state-mem {
 				};
 			};
 
-			vcc3v3_pmu: LDO_REG6 {
+			LDO_REG6 {
 				regulator-name = "vcc3v3_pmu";
 				regulator-always-on;
 				regulator-boot-on;
@@ -371,7 +372,7 @@ regulator-state-mem {
 				};
 			};
 
-			vcca_1v8: LDO_REG7 {
+			LDO_REG7 {
 				regulator-name = "vcca_1v8";
 				regulator-always-on;
 				regulator-boot-on;
@@ -383,7 +384,7 @@ regulator-state-mem {
 				};
 			};
 
-			vcca1v8_pmu: LDO_REG8 {
+			LDO_REG8 {
 				regulator-name = "vcca1v8_pmu";
 				regulator-always-on;
 				regulator-boot-on;
@@ -396,7 +397,7 @@ regulator-state-mem {
 				};
 			};
 
-			vcca1v8_image: LDO_REG9 {
+			LDO_REG9 {
 				regulator-name = "vcca1v8_image";
 				regulator-always-on;
 				regulator-min-microvolt = <1800000>;
@@ -407,7 +408,7 @@ regulator-state-mem {
 				};
 			};
 
-			vcc_3v3: SWITCH_REG1 {
+			SWITCH_REG1 {
 				regulator-name = "vcc_3v3";
 				regulator-always-on;
 				regulator-boot-on;
@@ -417,7 +418,7 @@ regulator-state-mem {
 				};
 			};
 
-			vcc3v3_sd: SWITCH_REG2 {
+			SWITCH_REG2 {
 				regulator-name = "vcc3v3_sd";
 				/*
 				 * turning this off, breaks access to both
@@ -431,6 +432,15 @@ regulator-state-mem {
 				};
 			};
 		};
+
+		rtc {
+			/*
+			 * There is already a dedicated and battery buffered
+			 * RTCon &i2c1, so disable the pmic internal one.
+			 */
+			compatible = "rockchip,rk808-rtc";
+			status = "disabled";
+		};
 	};
 
 	vdd_cpu: regulator@40 {
@@ -469,12 +479,14 @@ &pcie30phy {
 	status = "okay";
 };
 
+/* connects a JMicron AHCI SATA controller */
 &pcie3x1 {
 	reset-gpios = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>;
 	vpcie3v3-supply = <&vcc3v3_pcie>;
 	status = "okay";
 };
 
+/* connects to the 2.5G network hardware for the upper network jack */
 &pcie3x2 {
 	num-lanes = <1>;
 	reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>;
@@ -554,6 +566,11 @@ &tsadc {
 	status = "okay";
 };
 
+/*
+ * Connected to an MCU, e.g.
+ *   stty -F /dev/ttyS0 115200; echo @C30 > /dev/ttyS0
+ * makes the machine beep.
+ */
 &uart0 {
 	status = "okay";
 };
diff --git a/drivers/mfd/rk8xx-core.c b/drivers/mfd/rk8xx-core.c
index 5eda3c0dbbdf..db2b322ddba3 100644
--- a/drivers/mfd/rk8xx-core.c
+++ b/drivers/mfd/rk8xx-core.c
@@ -88,6 +88,7 @@ static const struct mfd_cell rk808s[] = {
 		.name = "rk808-rtc",
 		.num_resources = ARRAY_SIZE(rtc_resources),
 		.resources = rtc_resources,
+		.of_compatible = "rockchip,rk808-rtc",
 	},
 };
 

[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 488 bytes --]

Re: [PATCH v2 00/14] Expand available features on Qnap TS433

[Rob Herring (Arm)]

On Sun, 21 Jul 2024 19:37:09 +0200, Heiko Stuebner wrote:
> Thanks to the nicely supported rk3568, the hardest part for adding things,
> is to pull things from the vendor-kernel and translating them to mainline
> standards.
> 
> This series allows the TS433 to use all 4 bays [0], wiggle some LEDs and
> access devices connected to all 3 usb ports.
> 
> The device runs stable now and might be usable for actual usage.
> 
> There is still a todo-list though:
> - the ethernet mac address for the realtek chip seems correct,
>   but the gmac0 interface currently uses a wrong one
> - i2cdetect reports devices on i2c-1 on addresses 54,55,56,57
>   model_Q0B20_Q0B30_10_10.conf from the original rescue image labels them
>     VPD_MB = I2C:0x54, VPD_BP = I2C:0x56
>   the meaning currently being unknown. Some eeprom maybe?
> - The regulator tree is slightly dubious. Everthing seems to follow rk3568
>   reference designs, but especially the regulator labeled vcc3v3_sd
>   seems to supply some PCIe functionality. So I guess the device's
>   schematics will look quite different than the regulators added to the
>   vendor devicetree.
> - Quite a bit of functionality is provided by the MCU connected to uart0.
>   According to the model.conf there should be fan-control, a number of
>   additional LEDs (status,locate,usb?)
> 
> 
> Thanks to Qnap engineers adding an easily accessible header for maskrom
> mode on the board, replacing the bootloader is also quite a breeze. A
> branch on top of today's u-boot master branch can be found on [1]. I'll
> submit that code to u-boot once I can cherry-pick the dts patches.
> 
> 
> changes in v2:
> - add patches for tsadc, gpio-keys, cpu-supply, pmic, gpu and io-domains
> 
> 
> [0] I only have two drives right now, but I tested both the internal
> sata connector as well as the PCIe connected sata controller in different
> combinations.
> [1] https://github.com/mmind/u-boot-rockchip/tree/dev/qnap-ts433/v2024.07
> 
> 
> Heiko Stuebner (14):
>   arm64: dts: rockchip: add PCIe supply regulator to Qnap-TS433
>   arm64: dts: rockchip: enable second PCIe controller on the Qnap-TS433
>   arm64: dts: rockchip: enable uart0 on Qnap-TS433
>   arm64: dts: rockchip: enable usb ports on Qnap-TS433
>   arm64: dts: rockchip: add stdout path on Qnap-TS433
>   arm64: dts: rockchip: enable sata1+2 on Qnap-TS433
>   arm64: dts: rockchip: add board-aliases for Qnap-TS433
>   arm64: dts: rockchip: add hdd leds to Qnap-TS433
>   arm64: dts: rockchip: enable the tsadc on the Qnap-TS433
>   arm64: dts: rockchip: add gpio-keys to Qnap-TS433
>   arm64: dts: rockchip: define cpu-supply on the Qnap-TS433
>   arm64: dts: rockchip: add missing pmic information on Qnap-TS433
>   arm64: dts: rockchip: enable gpu on Qnap-TS433
>   arm64: dts: rockchip: add 2 pmu_io_domain supplies for Qnap-TS433
> 
>  .../boot/dts/rockchip/rk3568-qnap-ts433.dts   | 539 +++++++++++++++++-
>  1 file changed, 536 insertions(+), 3 deletions(-)
> 
> --
> 2.39.2
> 
> 
> 


My bot found new DTB warnings on the .dts files added or changed in this
series.

Some warnings may be from an existing SoC .dtsi. Or perhaps the warnings
are fixed by another series. Ultimately, it is up to the platform
maintainer whether these warnings are acceptable or not. No need to reply
unless the platform maintainer has comments.

If you already ran DT checks and didn't see these error(s), then
make sure dt-schema is up to date:

  pip3 install dtschema --upgrade


New warnings running 'make CHECK_DTBS=y rockchip/rk3568-qnap-ts433.dtb' for 20240721173723.919961-1-heiko@sntech.de:

arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dtb: sata@fc400000: Unevaluated properties are not allowed ('power-domains' was unexpected)
	from schema $id: http://devicetree.org/schemas/ata/rockchip,dwc-ahci.yaml#
arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dtb: sata@fc800000: Unevaluated properties are not allowed ('power-domains' was unexpected)
	from schema $id: http://devicetree.org/schemas/ata/rockchip,dwc-ahci.yaml#

Re: [PATCH v2 00/14] Expand available features on Qnap TS433

[Heiko Stübner]

Am Dienstag, 23. Juli 2024, 04:57:37 CEST schrieb Rob Herring (Arm):
> 
> On Sun, 21 Jul 2024 19:37:09 +0200, Heiko Stuebner wrote:
> > Thanks to the nicely supported rk3568, the hardest part for adding things,
> > is to pull things from the vendor-kernel and translating them to mainline
> > standards.
> > 
> > This series allows the TS433 to use all 4 bays [0], wiggle some LEDs and
> > access devices connected to all 3 usb ports.
> > 
> > The device runs stable now and might be usable for actual usage.
> > 
> > There is still a todo-list though:
> > - the ethernet mac address for the realtek chip seems correct,
> >   but the gmac0 interface currently uses a wrong one
> > - i2cdetect reports devices on i2c-1 on addresses 54,55,56,57
> >   model_Q0B20_Q0B30_10_10.conf from the original rescue image labels them
> >     VPD_MB = I2C:0x54, VPD_BP = I2C:0x56
> >   the meaning currently being unknown. Some eeprom maybe?
> > - The regulator tree is slightly dubious. Everthing seems to follow rk3568
> >   reference designs, but especially the regulator labeled vcc3v3_sd
> >   seems to supply some PCIe functionality. So I guess the device's
> >   schematics will look quite different than the regulators added to the
> >   vendor devicetree.
> > - Quite a bit of functionality is provided by the MCU connected to uart0.
> >   According to the model.conf there should be fan-control, a number of
> >   additional LEDs (status,locate,usb?)
> > 
> > 
> > Thanks to Qnap engineers adding an easily accessible header for maskrom
> > mode on the board, replacing the bootloader is also quite a breeze. A
> > branch on top of today's u-boot master branch can be found on [1]. I'll
> > submit that code to u-boot once I can cherry-pick the dts patches.
> > 
> > 
> > changes in v2:
> > - add patches for tsadc, gpio-keys, cpu-supply, pmic, gpu and io-domains
> > 
> > 
> > [0] I only have two drives right now, but I tested both the internal
> > sata connector as well as the PCIe connected sata controller in different
> > combinations.
> > [1] https://github.com/mmind/u-boot-rockchip/tree/dev/qnap-ts433/v2024.07
> > 
> > 
> > Heiko Stuebner (14):
> >   arm64: dts: rockchip: add PCIe supply regulator to Qnap-TS433
> >   arm64: dts: rockchip: enable second PCIe controller on the Qnap-TS433
> >   arm64: dts: rockchip: enable uart0 on Qnap-TS433
> >   arm64: dts: rockchip: enable usb ports on Qnap-TS433
> >   arm64: dts: rockchip: add stdout path on Qnap-TS433
> >   arm64: dts: rockchip: enable sata1+2 on Qnap-TS433
> >   arm64: dts: rockchip: add board-aliases for Qnap-TS433
> >   arm64: dts: rockchip: add hdd leds to Qnap-TS433
> >   arm64: dts: rockchip: enable the tsadc on the Qnap-TS433
> >   arm64: dts: rockchip: add gpio-keys to Qnap-TS433
> >   arm64: dts: rockchip: define cpu-supply on the Qnap-TS433
> >   arm64: dts: rockchip: add missing pmic information on Qnap-TS433
> >   arm64: dts: rockchip: enable gpu on Qnap-TS433
> >   arm64: dts: rockchip: add 2 pmu_io_domain supplies for Qnap-TS433
> > 
> >  .../boot/dts/rockchip/rk3568-qnap-ts433.dts   | 539 +++++++++++++++++-
> >  1 file changed, 536 insertions(+), 3 deletions(-)
> > 
> > --
> > 2.39.2
> > 
> > 
> > 
> 
> 
> My bot found new DTB warnings on the .dts files added or changed in this
> series.
> 
> Some warnings may be from an existing SoC .dtsi. Or perhaps the warnings
> are fixed by another series. Ultimately, it is up to the platform
> maintainer whether these warnings are acceptable or not. No need to reply
> unless the platform maintainer has comments.
> 
> If you already ran DT checks and didn't see these error(s), then
> make sure dt-schema is up to date:
> 
>   pip3 install dtschema --upgrade
> 
> 
> New warnings running 'make CHECK_DTBS=y rockchip/rk3568-qnap-ts433.dtb' for 20240721173723.919961-1-heiko@sntech.de:
> 
> arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dtb: sata@fc400000: Unevaluated properties are not allowed ('power-domains' was unexpected)
> 	from schema $id: http://devicetree.org/schemas/ata/rockchip,dwc-ahci.yaml#
> arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dtb: sata@fc800000: Unevaluated properties are not allowed ('power-domains' was unexpected)
> 	from schema $id: http://devicetree.org/schemas/ata/rockchip,dwc-ahci.yaml#

fixed (and queued as a fix for 6.11) by:
https://lore.kernel.org/all/20240720205705.776384-1-heiko@sntech.de/