[PATCH v2 0/5] ARM: shmobile: r8a7790: enable IIC(B) cores

[PATCH v2 0/5] ARM: shmobile: r8a7790: enable IIC(B) cores

[Wolfram Sang]

This series allows r8a7790 boards to use the alternative IIC(B) controller
handled by the i2c-sh_mobile driver. Since both i2c cores always use the same
pins only in a different function group, you can easily use this or that core
for your devices. For that reason, there is currently no enablement on the
Lager board, since it needs discussion which core we want to have on which bus.
sh_mobile seems more stable currently, so I'd vote for that. However, this can
be applied incrementally later.

This series is still based on renesas-devel-v3.14-rc5-20140307v2 and has been
tested on a Lager board. The main intention of this version is to gather
further comments or ACKs. Once all is good, I will then rebase the series onto
latest renesas-devel around next rc1 time as discussed with Magnus.

Branch is here: git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux.git renesas/r8a7790-iic

All comments from Laurent have been addressed since V1. Please review.

Thanks,

   Wolfram


Wolfram Sang (5):
  pinctrl: pfc: r8a7790: add i2c0 muxing
  pinctrl: pfc: r8a7790: add mux data for IIC(B) cores
  ARM: shmobile: r8a7790: add IIC0-2 clock macros
  ARM: shmobile: r8a7790: add IIC(B) clocks to dtsi
  ARM: shmobile: r8a7790: add IIC(B) cores to dtsi

 arch/arm/boot/dts/r8a7790.dtsi            |  71 ++++++++++++---
 drivers/pinctrl/sh-pfc/pfc-r8a7790.c      | 138 +++++++++++++++++++++++++++++-
 include/dt-bindings/clock/r8a7790-clock.h |   3 +
 3 files changed, 197 insertions(+), 15 deletions(-)

-- 
1.9.0

[PATCH v2 1/5] pinctrl: pfc: r8a7790: add i2c0 muxing

[Wolfram Sang]

From: Wolfram Sang <wsa@sang-engineering.com>

Add the muxing for the last missing i2c rcar core. Fix the sorting for
SH_PFC_PIN_NAMED while we are here.

Signed-off-by: Wolfram Sang <wsa@sang-engineering.com>
---
Change since V1:

* sorted SH_PFC_PIN_NAMED pins

 drivers/pinctrl/sh-pfc/pfc-r8a7790.c | 22 +++++++++++++++++++++-
 1 file changed, 21 insertions(+), 1 deletion(-)

diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
index c381ae63c508..bcb47d138b02 100644
--- a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
@@ -782,6 +782,7 @@ enum {
 	USB1_PWEN_MARK, AUDIO_CLKOUT_D_MARK, USB1_OVC_MARK,
 	TCLK1_B_MARK,
 
+	I2C0_SCL_MARK, I2C0_SDA_MARK,
 	I2C3_SCL_MARK, I2C3_SDA_MARK,
 	PINMUX_MARK_END,
 };
@@ -1722,6 +1723,9 @@ static const u16 pinmux_data[] = {
 	PINMUX_IPSR_DATA(IP16_7, USB1_OVC),
 	PINMUX_IPSR_MODSEL_DATA(IP16_7, TCLK1_B, SEL_TMU1_1),
 
+	PINMUX_DATA(I2C0_SCL_MARK, FN_SEL_IIC0_1),
+	PINMUX_DATA(I2C0_SDA_MARK, FN_SEL_IIC0_1),
+
 	PINMUX_DATA(I2C3_SCL_MARK, FN_SEL_IICDVFS_1),
 	PINMUX_DATA(I2C3_SDA_MARK, FN_SEL_IICDVFS_1),
 };
@@ -1735,8 +1739,10 @@ static const struct sh_pfc_pin pinmux_pins[] = {
 	PINMUX_GPIO_GP_ALL(),
 
 	/* Pins not associated with a GPIO port */
-	SH_PFC_PIN_NAMED(ROW_GROUP_A('J'), 15, AJ15),
+	SH_PFC_PIN_NAMED(ROW_GROUP_A('F'), 15, AF15),
+	SH_PFC_PIN_NAMED(ROW_GROUP_A('G'), 15, AG15),
 	SH_PFC_PIN_NAMED(ROW_GROUP_A('H'), 15, AH15),
+	SH_PFC_PIN_NAMED(ROW_GROUP_A('J'), 15, AJ15),
 };
 
 /* - AUDIO CLOCK ------------------------------------------------------------ */
@@ -2054,6 +2060,14 @@ static const unsigned int hscif1_ctrl_b_pins[] = {
 static const unsigned int hscif1_ctrl_b_mux[] = {
 	HRTS1_N_B_MARK, HCTS1_N_B_MARK,
 };
+/* - I2C0 ------------------------------------------------------------------- */
+static const unsigned int i2c0_pins[] = {
+	/* SCL, SDA */
+	PIN_A_NUMBER('G', 15), PIN_A_NUMBER('F', 15),
+};
+static const unsigned int i2c0_mux[] = {
+	I2C0_SCL_MARK, I2C0_SDA_MARK,
+};
 /* - I2C1 ------------------------------------------------------------------- */
 static const unsigned int i2c1_pins[] = {
 	/* SCL, SDA */
@@ -3626,6 +3640,7 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
 	SH_PFC_PIN_GROUP(hscif1_data_b),
 	SH_PFC_PIN_GROUP(hscif1_clk_b),
 	SH_PFC_PIN_GROUP(hscif1_ctrl_b),
+	SH_PFC_PIN_GROUP(i2c0),
 	SH_PFC_PIN_GROUP(i2c1),
 	SH_PFC_PIN_GROUP(i2c1_b),
 	SH_PFC_PIN_GROUP(i2c1_c),
@@ -3895,6 +3910,10 @@ static const char * const hscif1_groups[] = {
 	"hscif1_ctrl_b",
 };
 
+static const char * const i2c0_groups[] = {
+	"i2c0",
+};
+
 static const char * const i2c1_groups[] = {
 	"i2c1",
 	"i2c1_b",
@@ -4203,6 +4222,7 @@ static const struct sh_pfc_function pinmux_functions[] = {
 	SH_PFC_FUNCTION(eth),
 	SH_PFC_FUNCTION(hscif0),
 	SH_PFC_FUNCTION(hscif1),
+	SH_PFC_FUNCTION(i2c0),
 	SH_PFC_FUNCTION(i2c1),
 	SH_PFC_FUNCTION(i2c2),
 	SH_PFC_FUNCTION(i2c3),
-- 
1.9.0

[PATCH v2 1/5] pinctrl: pfc: r8a7790: add i2c0 muxing

[Laurent Pinchart]

Hi Wolfram,

Thank you for the patch.

On Tuesday 25 March 2014 19:56:25 Wolfram Sang wrote:
> From: Wolfram Sang <wsa@sang-engineering.com>
> 
> Add the muxing for the last missing i2c rcar core. Fix the sorting for
> SH_PFC_PIN_NAMED while we are here.
> 
> Signed-off-by: Wolfram Sang <wsa@sang-engineering.com>

Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>

> ---
> Change since V1:
> 
> * sorted SH_PFC_PIN_NAMED pins
> 
>  drivers/pinctrl/sh-pfc/pfc-r8a7790.c | 22 +++++++++++++++++++++-
>  1 file changed, 21 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
> b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c index c381ae63c508..bcb47d138b02
> 100644
> --- a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
> +++ b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
> @@ -782,6 +782,7 @@ enum {
>  	USB1_PWEN_MARK, AUDIO_CLKOUT_D_MARK, USB1_OVC_MARK,
>  	TCLK1_B_MARK,
> 
> +	I2C0_SCL_MARK, I2C0_SDA_MARK,
>  	I2C3_SCL_MARK, I2C3_SDA_MARK,
>  	PINMUX_MARK_END,
>  };
> @@ -1722,6 +1723,9 @@ static const u16 pinmux_data[] = {
>  	PINMUX_IPSR_DATA(IP16_7, USB1_OVC),
>  	PINMUX_IPSR_MODSEL_DATA(IP16_7, TCLK1_B, SEL_TMU1_1),
> 
> +	PINMUX_DATA(I2C0_SCL_MARK, FN_SEL_IIC0_1),
> +	PINMUX_DATA(I2C0_SDA_MARK, FN_SEL_IIC0_1),
> +
>  	PINMUX_DATA(I2C3_SCL_MARK, FN_SEL_IICDVFS_1),
>  	PINMUX_DATA(I2C3_SDA_MARK, FN_SEL_IICDVFS_1),
>  };
> @@ -1735,8 +1739,10 @@ static const struct sh_pfc_pin pinmux_pins[] = {
>  	PINMUX_GPIO_GP_ALL(),
> 
>  	/* Pins not associated with a GPIO port */
> -	SH_PFC_PIN_NAMED(ROW_GROUP_A('J'), 15, AJ15),
> +	SH_PFC_PIN_NAMED(ROW_GROUP_A('F'), 15, AF15),
> +	SH_PFC_PIN_NAMED(ROW_GROUP_A('G'), 15, AG15),
>  	SH_PFC_PIN_NAMED(ROW_GROUP_A('H'), 15, AH15),
> +	SH_PFC_PIN_NAMED(ROW_GROUP_A('J'), 15, AJ15),
>  };
> 
>  /* - AUDIO CLOCK
> ------------------------------------------------------------ */ @@ -2054,6
> +2060,14 @@ static const unsigned int hscif1_ctrl_b_pins[] = { static const
> unsigned int hscif1_ctrl_b_mux[] = {
>  	HRTS1_N_B_MARK, HCTS1_N_B_MARK,
>  };
> +/* - I2C0
> ------------------------------------------------------------------- */
> +static const unsigned int i2c0_pins[] = {
> +	/* SCL, SDA */
> +	PIN_A_NUMBER('G', 15), PIN_A_NUMBER('F', 15),
> +};
> +static const unsigned int i2c0_mux[] = {
> +	I2C0_SCL_MARK, I2C0_SDA_MARK,
> +};
>  /* - I2C1
> ------------------------------------------------------------------- */
> static const unsigned int i2c1_pins[] = {
>  	/* SCL, SDA */
> @@ -3626,6 +3640,7 @@ static const struct sh_pfc_pin_group pinmux_groups[] =
> { SH_PFC_PIN_GROUP(hscif1_data_b),
>  	SH_PFC_PIN_GROUP(hscif1_clk_b),
>  	SH_PFC_PIN_GROUP(hscif1_ctrl_b),
> +	SH_PFC_PIN_GROUP(i2c0),
>  	SH_PFC_PIN_GROUP(i2c1),
>  	SH_PFC_PIN_GROUP(i2c1_b),
>  	SH_PFC_PIN_GROUP(i2c1_c),
> @@ -3895,6 +3910,10 @@ static const char * const hscif1_groups[] = {
>  	"hscif1_ctrl_b",
>  };
> 
> +static const char * const i2c0_groups[] = {
> +	"i2c0",
> +};
> +
>  static const char * const i2c1_groups[] = {
>  	"i2c1",
>  	"i2c1_b",
> @@ -4203,6 +4222,7 @@ static const struct sh_pfc_function pinmux_functions[]
> = { SH_PFC_FUNCTION(eth),
>  	SH_PFC_FUNCTION(hscif0),
>  	SH_PFC_FUNCTION(hscif1),
> +	SH_PFC_FUNCTION(i2c0),
>  	SH_PFC_FUNCTION(i2c1),
>  	SH_PFC_FUNCTION(i2c2),
>  	SH_PFC_FUNCTION(i2c3),

-- 
Regards,

Laurent Pinchart

[PATCH v2 1/5] pinctrl: pfc: r8a7790: add i2c0 muxing

[Wolfram Sang]

On Wed, Mar 26, 2014 at 03:00:39PM +0100, Laurent Pinchart wrote:
> Hi Wolfram,
> 
> Thank you for the patch.
> 
> On Tuesday 25 March 2014 19:56:25 Wolfram Sang wrote:
> > From: Wolfram Sang <wsa@sang-engineering.com>
> > 
> > Add the muxing for the last missing i2c rcar core. Fix the sorting for
> > SH_PFC_PIN_NAMED while we are here.
> > 
> > Signed-off-by: Wolfram Sang <wsa@sang-engineering.com>
> 
> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>

Forgot to add LinusW to CC. Linus, shall I resend?

> 
> > ---
> > Change since V1:
> > 
> > * sorted SH_PFC_PIN_NAMED pins
> > 
> >  drivers/pinctrl/sh-pfc/pfc-r8a7790.c | 22 +++++++++++++++++++++-
> >  1 file changed, 21 insertions(+), 1 deletion(-)
> > 
> > diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
> > b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c index c381ae63c508..bcb47d138b02
> > 100644
> > --- a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
> > +++ b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
> > @@ -782,6 +782,7 @@ enum {
> >  	USB1_PWEN_MARK, AUDIO_CLKOUT_D_MARK, USB1_OVC_MARK,
> >  	TCLK1_B_MARK,
> > 
> > +	I2C0_SCL_MARK, I2C0_SDA_MARK,
> >  	I2C3_SCL_MARK, I2C3_SDA_MARK,
> >  	PINMUX_MARK_END,
> >  };
> > @@ -1722,6 +1723,9 @@ static const u16 pinmux_data[] = {
> >  	PINMUX_IPSR_DATA(IP16_7, USB1_OVC),
> >  	PINMUX_IPSR_MODSEL_DATA(IP16_7, TCLK1_B, SEL_TMU1_1),
> > 
> > +	PINMUX_DATA(I2C0_SCL_MARK, FN_SEL_IIC0_1),
> > +	PINMUX_DATA(I2C0_SDA_MARK, FN_SEL_IIC0_1),
> > +
> >  	PINMUX_DATA(I2C3_SCL_MARK, FN_SEL_IICDVFS_1),
> >  	PINMUX_DATA(I2C3_SDA_MARK, FN_SEL_IICDVFS_1),
> >  };
> > @@ -1735,8 +1739,10 @@ static const struct sh_pfc_pin pinmux_pins[] = {
> >  	PINMUX_GPIO_GP_ALL(),
> > 
> >  	/* Pins not associated with a GPIO port */
> > -	SH_PFC_PIN_NAMED(ROW_GROUP_A('J'), 15, AJ15),
> > +	SH_PFC_PIN_NAMED(ROW_GROUP_A('F'), 15, AF15),
> > +	SH_PFC_PIN_NAMED(ROW_GROUP_A('G'), 15, AG15),
> >  	SH_PFC_PIN_NAMED(ROW_GROUP_A('H'), 15, AH15),
> > +	SH_PFC_PIN_NAMED(ROW_GROUP_A('J'), 15, AJ15),
> >  };
> > 
> >  /* - AUDIO CLOCK
> > ------------------------------------------------------------ */ @@ -2054,6
> > +2060,14 @@ static const unsigned int hscif1_ctrl_b_pins[] = { static const
> > unsigned int hscif1_ctrl_b_mux[] = {
> >  	HRTS1_N_B_MARK, HCTS1_N_B_MARK,
> >  };
> > +/* - I2C0
> > ------------------------------------------------------------------- */
> > +static const unsigned int i2c0_pins[] = {
> > +	/* SCL, SDA */
> > +	PIN_A_NUMBER('G', 15), PIN_A_NUMBER('F', 15),
> > +};
> > +static const unsigned int i2c0_mux[] = {
> > +	I2C0_SCL_MARK, I2C0_SDA_MARK,
> > +};
> >  /* - I2C1
> > ------------------------------------------------------------------- */
> > static const unsigned int i2c1_pins[] = {
> >  	/* SCL, SDA */
> > @@ -3626,6 +3640,7 @@ static const struct sh_pfc_pin_group pinmux_groups[] =
> > { SH_PFC_PIN_GROUP(hscif1_data_b),
> >  	SH_PFC_PIN_GROUP(hscif1_clk_b),
> >  	SH_PFC_PIN_GROUP(hscif1_ctrl_b),
> > +	SH_PFC_PIN_GROUP(i2c0),
> >  	SH_PFC_PIN_GROUP(i2c1),
> >  	SH_PFC_PIN_GROUP(i2c1_b),
> >  	SH_PFC_PIN_GROUP(i2c1_c),
> > @@ -3895,6 +3910,10 @@ static const char * const hscif1_groups[] = {
> >  	"hscif1_ctrl_b",
> >  };
> > 
> > +static const char * const i2c0_groups[] = {
> > +	"i2c0",
> > +};
> > +
> >  static const char * const i2c1_groups[] = {
> >  	"i2c1",
> >  	"i2c1_b",
> > @@ -4203,6 +4222,7 @@ static const struct sh_pfc_function pinmux_functions[]
> > = { SH_PFC_FUNCTION(eth),
> >  	SH_PFC_FUNCTION(hscif0),
> >  	SH_PFC_FUNCTION(hscif1),
> > +	SH_PFC_FUNCTION(i2c0),
> >  	SH_PFC_FUNCTION(i2c1),
> >  	SH_PFC_FUNCTION(i2c2),
> >  	SH_PFC_FUNCTION(i2c3),
> 
> -- 
> Regards,
> 
> Laurent Pinchart
> 
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[PATCH v2 1/5] pinctrl: pfc: r8a7790: add i2c0 muxing

[Linus Walleij]

On Tue, Mar 25, 2014 at 7:56 PM, Wolfram Sang <wsa@the-dreams.de> wrote:

> From: Wolfram Sang <wsa@sang-engineering.com>
>
> Add the muxing for the last missing i2c rcar core. Fix the sorting for
> SH_PFC_PIN_NAMED while we are here.
>
> Signed-off-by: Wolfram Sang <wsa@sang-engineering.com>
> ---
> Change since V1:
>
> * sorted SH_PFC_PIN_NAMED pins

Patch applied with Laurent's ACK.

Yours,
Linus Walleij

[PATCH v2 2/5] pinctrl: pfc: r8a7790: add mux data for IIC(B) cores

[Wolfram Sang]

From: Wolfram Sang <wsa@sang-engineering.com>

Signed-off-by: Wolfram Sang <wsa@sang-engineering.com>
---
Change since V1:

* renamed i2c4-7 to iic0-3

 drivers/pinctrl/sh-pfc/pfc-r8a7790.c | 118 ++++++++++++++++++++++++++++++++++-
 1 file changed, 116 insertions(+), 2 deletions(-)

diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
index bcb47d138b02..99b62b1ee752 100644
--- a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
@@ -782,8 +782,8 @@ enum {
 	USB1_PWEN_MARK, AUDIO_CLKOUT_D_MARK, USB1_OVC_MARK,
 	TCLK1_B_MARK,
 
-	I2C0_SCL_MARK, I2C0_SDA_MARK,
-	I2C3_SCL_MARK, I2C3_SDA_MARK,
+	IIC0_SCL_MARK, IIC0_SDA_MARK, I2C0_SCL_MARK, I2C0_SDA_MARK,
+	IIC3_SCL_MARK, IIC3_SDA_MARK, I2C3_SCL_MARK, I2C3_SDA_MARK,
 	PINMUX_MARK_END,
 };
 
@@ -1723,9 +1723,13 @@ static const u16 pinmux_data[] = {
 	PINMUX_IPSR_DATA(IP16_7, USB1_OVC),
 	PINMUX_IPSR_MODSEL_DATA(IP16_7, TCLK1_B, SEL_TMU1_1),
 
+	PINMUX_DATA(IIC0_SCL_MARK, FN_SEL_IIC0_0),
+	PINMUX_DATA(IIC0_SDA_MARK, FN_SEL_IIC0_0),
 	PINMUX_DATA(I2C0_SCL_MARK, FN_SEL_IIC0_1),
 	PINMUX_DATA(I2C0_SDA_MARK, FN_SEL_IIC0_1),
 
+	PINMUX_DATA(IIC3_SCL_MARK, FN_SEL_IICDVFS_0),
+	PINMUX_DATA(IIC3_SDA_MARK, FN_SEL_IICDVFS_0),
 	PINMUX_DATA(I2C3_SCL_MARK, FN_SEL_IICDVFS_1),
 	PINMUX_DATA(I2C3_SDA_MARK, FN_SEL_IICDVFS_1),
 };
@@ -2134,6 +2138,80 @@ static const unsigned int i2c3_pins[] = {
 static const unsigned int i2c3_mux[] = {
 	I2C3_SCL_MARK, I2C3_SDA_MARK,
 };
+/* - IIC0 (I2C4) ------------------------------------------------------------ */
+static const unsigned int iic0_pins[] = {
+	/* SCL, SDA */
+	PIN_A_NUMBER('G', 15), PIN_A_NUMBER('F', 15),
+};
+static const unsigned int iic0_mux[] = {
+	IIC0_SCL_MARK, IIC0_SDA_MARK,
+};
+/* - IIC1 (I2C5) ------------------------------------------------------------ */
+static const unsigned int iic1_pins[] = {
+	/* SCL, SDA */
+	RCAR_GP_PIN(1, 16), RCAR_GP_PIN(1, 17),
+};
+static const unsigned int iic1_mux[] = {
+	IIC1_SCL_MARK, IIC1_SDA_MARK,
+};
+static const unsigned int iic1_b_pins[] = {
+	/* SCL, SDA */
+	RCAR_GP_PIN(3, 6), RCAR_GP_PIN(3, 7),
+};
+static const unsigned int iic1_b_mux[] = {
+	IIC1_SCL_B_MARK, IIC1_SDA_B_MARK,
+};
+static const unsigned int iic1_c_pins[] = {
+	/* SCL, SDA */
+	RCAR_GP_PIN(4, 30), RCAR_GP_PIN(4, 27),
+};
+static const unsigned int iic1_c_mux[] = {
+	IIC1_SCL_C_MARK, IIC1_SDA_C_MARK,
+};
+/* - IIC2 (I2C6) ------------------------------------------------------------ */
+static const unsigned int iic2_pins[] = {
+	/* SCL, SDA */
+	RCAR_GP_PIN(5, 5), RCAR_GP_PIN(5, 6),
+};
+static const unsigned int iic2_mux[] = {
+	IIC2_SCL_MARK, IIC2_SDA_MARK,
+};
+static const unsigned int iic2_b_pins[] = {
+	/* SCL, SDA */
+	RCAR_GP_PIN(4, 0), RCAR_GP_PIN(4, 1),
+};
+static const unsigned int iic2_b_mux[] = {
+	IIC2_SCL_B_MARK, IIC2_SDA_B_MARK,
+};
+static const unsigned int iic2_c_pins[] = {
+	/* SCL, SDA */
+	RCAR_GP_PIN(0, 6), RCAR_GP_PIN(0, 7),
+};
+static const unsigned int iic2_c_mux[] = {
+	IIC2_SCL_C_MARK, IIC2_SDA_C_MARK,
+};
+static const unsigned int iic2_d_pins[] = {
+	/* SCL, SDA */
+	RCAR_GP_PIN(3, 14), RCAR_GP_PIN(3, 15),
+};
+static const unsigned int iic2_d_mux[] = {
+	IIC2_SCL_D_MARK, IIC2_SDA_D_MARK,
+};
+static const unsigned int iic2_e_pins[] = {
+	/* SCL, SDA */
+	RCAR_GP_PIN(2, 18), RCAR_GP_PIN(2, 19),
+};
+static const unsigned int iic2_e_mux[] = {
+	IIC2_SCL_E_MARK, IIC2_SDA_E_MARK,
+};
+/* - IIC3 (I2C7) ------------------------------------------------------------ */
+static const unsigned int iic3_pins[] = {
+/* SCL, SDA */
+	PIN_A_NUMBER('J', 15), PIN_A_NUMBER('H', 15),
+};
+static const unsigned int iic3_mux[] = {
+	IIC3_SCL_MARK, IIC3_SDA_MARK,
+};
 /* - INTC ------------------------------------------------------------------- */
 static const unsigned int intc_irq0_pins[] = {
 	/* IRQ */
@@ -3650,6 +3728,16 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
 	SH_PFC_PIN_GROUP(i2c2_d),
 	SH_PFC_PIN_GROUP(i2c2_e),
 	SH_PFC_PIN_GROUP(i2c3),
+	SH_PFC_PIN_GROUP(iic0),
+	SH_PFC_PIN_GROUP(iic1),
+	SH_PFC_PIN_GROUP(iic1_b),
+	SH_PFC_PIN_GROUP(iic1_c),
+	SH_PFC_PIN_GROUP(iic2),
+	SH_PFC_PIN_GROUP(iic2_b),
+	SH_PFC_PIN_GROUP(iic2_c),
+	SH_PFC_PIN_GROUP(iic2_d),
+	SH_PFC_PIN_GROUP(iic2_e),
+	SH_PFC_PIN_GROUP(iic3),
 	SH_PFC_PIN_GROUP(intc_irq0),
 	SH_PFC_PIN_GROUP(intc_irq1),
 	SH_PFC_PIN_GROUP(intc_irq2),
@@ -3932,6 +4020,28 @@ static const char * const i2c3_groups[] = {
 	"i2c3",
 };
 
+static const char * const iic0_groups[] = {
+	"iic0",
+};
+
+static const char * const iic1_groups[] = {
+	"iic1",
+	"iic1_b",
+	"iic1_c",
+};
+
+static const char * const iic2_groups[] = {
+	"iic2",
+	"iic2_b",
+	"iic2_c",
+	"iic2_d",
+	"iic2_e",
+};
+
+static const char * const iic3_groups[] = {
+	"iic3",
+};
+
 static const char * const intc_groups[] = {
 	"intc_irq0",
 	"intc_irq1",
@@ -4226,6 +4336,10 @@ static const struct sh_pfc_function pinmux_functions[] = {
 	SH_PFC_FUNCTION(i2c1),
 	SH_PFC_FUNCTION(i2c2),
 	SH_PFC_FUNCTION(i2c3),
+	SH_PFC_FUNCTION(iic0),
+	SH_PFC_FUNCTION(iic1),
+	SH_PFC_FUNCTION(iic2),
+	SH_PFC_FUNCTION(iic3),
 	SH_PFC_FUNCTION(intc),
 	SH_PFC_FUNCTION(mmc0),
 	SH_PFC_FUNCTION(mmc1),
-- 
1.9.0

[PATCH v2 2/5] pinctrl: pfc: r8a7790: add mux data for IIC(B) cores

[Laurent Pinchart]

Hi Wolfram,

Thank you for the patch.

On Tuesday 25 March 2014 19:56:26 Wolfram Sang wrote:
> From: Wolfram Sang <wsa@sang-engineering.com>
> 
> Signed-off-by: Wolfram Sang <wsa@sang-engineering.com>

Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>

> ---
> Change since V1:
> 
> * renamed i2c4-7 to iic0-3
> 
>  drivers/pinctrl/sh-pfc/pfc-r8a7790.c | 118
> ++++++++++++++++++++++++++++++++++- 1 file changed, 116 insertions(+), 2
> deletions(-)
> 
> diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
> b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c index bcb47d138b02..99b62b1ee752
> 100644
> --- a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
> +++ b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
> @@ -782,8 +782,8 @@ enum {
>  	USB1_PWEN_MARK, AUDIO_CLKOUT_D_MARK, USB1_OVC_MARK,
>  	TCLK1_B_MARK,
> 
> -	I2C0_SCL_MARK, I2C0_SDA_MARK,
> -	I2C3_SCL_MARK, I2C3_SDA_MARK,
> +	IIC0_SCL_MARK, IIC0_SDA_MARK, I2C0_SCL_MARK, I2C0_SDA_MARK,
> +	IIC3_SCL_MARK, IIC3_SDA_MARK, I2C3_SCL_MARK, I2C3_SDA_MARK,
>  	PINMUX_MARK_END,
>  };
> 
> @@ -1723,9 +1723,13 @@ static const u16 pinmux_data[] = {
>  	PINMUX_IPSR_DATA(IP16_7, USB1_OVC),
>  	PINMUX_IPSR_MODSEL_DATA(IP16_7, TCLK1_B, SEL_TMU1_1),
> 
> +	PINMUX_DATA(IIC0_SCL_MARK, FN_SEL_IIC0_0),
> +	PINMUX_DATA(IIC0_SDA_MARK, FN_SEL_IIC0_0),
>  	PINMUX_DATA(I2C0_SCL_MARK, FN_SEL_IIC0_1),
>  	PINMUX_DATA(I2C0_SDA_MARK, FN_SEL_IIC0_1),
> 
> +	PINMUX_DATA(IIC3_SCL_MARK, FN_SEL_IICDVFS_0),
> +	PINMUX_DATA(IIC3_SDA_MARK, FN_SEL_IICDVFS_0),
>  	PINMUX_DATA(I2C3_SCL_MARK, FN_SEL_IICDVFS_1),
>  	PINMUX_DATA(I2C3_SDA_MARK, FN_SEL_IICDVFS_1),
>  };
> @@ -2134,6 +2138,80 @@ static const unsigned int i2c3_pins[] = {
>  static const unsigned int i2c3_mux[] = {
>  	I2C3_SCL_MARK, I2C3_SDA_MARK,
>  };
> +/* - IIC0 (I2C4)
> ------------------------------------------------------------ */ +static
> const unsigned int iic0_pins[] = {
> +	/* SCL, SDA */
> +	PIN_A_NUMBER('G', 15), PIN_A_NUMBER('F', 15),
> +};
> +static const unsigned int iic0_mux[] = {
> +	IIC0_SCL_MARK, IIC0_SDA_MARK,
> +};
> +/* - IIC1 (I2C5)
> ------------------------------------------------------------ */ +static
> const unsigned int iic1_pins[] = {
> +	/* SCL, SDA */
> +	RCAR_GP_PIN(1, 16), RCAR_GP_PIN(1, 17),
> +};
> +static const unsigned int iic1_mux[] = {
> +	IIC1_SCL_MARK, IIC1_SDA_MARK,
> +};
> +static const unsigned int iic1_b_pins[] = {
> +	/* SCL, SDA */
> +	RCAR_GP_PIN(3, 6), RCAR_GP_PIN(3, 7),
> +};
> +static const unsigned int iic1_b_mux[] = {
> +	IIC1_SCL_B_MARK, IIC1_SDA_B_MARK,
> +};
> +static const unsigned int iic1_c_pins[] = {
> +	/* SCL, SDA */
> +	RCAR_GP_PIN(4, 30), RCAR_GP_PIN(4, 27),
> +};
> +static const unsigned int iic1_c_mux[] = {
> +	IIC1_SCL_C_MARK, IIC1_SDA_C_MARK,
> +};
> +/* - IIC2 (I2C6)
> ------------------------------------------------------------ */ +static
> const unsigned int iic2_pins[] = {
> +	/* SCL, SDA */
> +	RCAR_GP_PIN(5, 5), RCAR_GP_PIN(5, 6),
> +};
> +static const unsigned int iic2_mux[] = {
> +	IIC2_SCL_MARK, IIC2_SDA_MARK,
> +};
> +static const unsigned int iic2_b_pins[] = {
> +	/* SCL, SDA */
> +	RCAR_GP_PIN(4, 0), RCAR_GP_PIN(4, 1),
> +};
> +static const unsigned int iic2_b_mux[] = {
> +	IIC2_SCL_B_MARK, IIC2_SDA_B_MARK,
> +};
> +static const unsigned int iic2_c_pins[] = {
> +	/* SCL, SDA */
> +	RCAR_GP_PIN(0, 6), RCAR_GP_PIN(0, 7),
> +};
> +static const unsigned int iic2_c_mux[] = {
> +	IIC2_SCL_C_MARK, IIC2_SDA_C_MARK,
> +};
> +static const unsigned int iic2_d_pins[] = {
> +	/* SCL, SDA */
> +	RCAR_GP_PIN(3, 14), RCAR_GP_PIN(3, 15),
> +};
> +static const unsigned int iic2_d_mux[] = {
> +	IIC2_SCL_D_MARK, IIC2_SDA_D_MARK,
> +};
> +static const unsigned int iic2_e_pins[] = {
> +	/* SCL, SDA */
> +	RCAR_GP_PIN(2, 18), RCAR_GP_PIN(2, 19),
> +};
> +static const unsigned int iic2_e_mux[] = {
> +	IIC2_SCL_E_MARK, IIC2_SDA_E_MARK,
> +};
> +/* - IIC3 (I2C7)
> ------------------------------------------------------------ */ +static
> const unsigned int iic3_pins[] = {
> +/* SCL, SDA */
> +	PIN_A_NUMBER('J', 15), PIN_A_NUMBER('H', 15),
> +};
> +static const unsigned int iic3_mux[] = {
> +	IIC3_SCL_MARK, IIC3_SDA_MARK,
> +};
>  /* - INTC
> ------------------------------------------------------------------- */
> static const unsigned int intc_irq0_pins[] = {
>  	/* IRQ */
> @@ -3650,6 +3728,16 @@ static const struct sh_pfc_pin_group pinmux_groups[]
> = { SH_PFC_PIN_GROUP(i2c2_d),
>  	SH_PFC_PIN_GROUP(i2c2_e),
>  	SH_PFC_PIN_GROUP(i2c3),
> +	SH_PFC_PIN_GROUP(iic0),
> +	SH_PFC_PIN_GROUP(iic1),
> +	SH_PFC_PIN_GROUP(iic1_b),
> +	SH_PFC_PIN_GROUP(iic1_c),
> +	SH_PFC_PIN_GROUP(iic2),
> +	SH_PFC_PIN_GROUP(iic2_b),
> +	SH_PFC_PIN_GROUP(iic2_c),
> +	SH_PFC_PIN_GROUP(iic2_d),
> +	SH_PFC_PIN_GROUP(iic2_e),
> +	SH_PFC_PIN_GROUP(iic3),
>  	SH_PFC_PIN_GROUP(intc_irq0),
>  	SH_PFC_PIN_GROUP(intc_irq1),
>  	SH_PFC_PIN_GROUP(intc_irq2),
> @@ -3932,6 +4020,28 @@ static const char * const i2c3_groups[] = {
>  	"i2c3",
>  };
> 
> +static const char * const iic0_groups[] = {
> +	"iic0",
> +};
> +
> +static const char * const iic1_groups[] = {
> +	"iic1",
> +	"iic1_b",
> +	"iic1_c",
> +};
> +
> +static const char * const iic2_groups[] = {
> +	"iic2",
> +	"iic2_b",
> +	"iic2_c",
> +	"iic2_d",
> +	"iic2_e",
> +};
> +
> +static const char * const iic3_groups[] = {
> +	"iic3",
> +};
> +
>  static const char * const intc_groups[] = {
>  	"intc_irq0",
>  	"intc_irq1",
> @@ -4226,6 +4336,10 @@ static const struct sh_pfc_function
> pinmux_functions[] = { SH_PFC_FUNCTION(i2c1),
>  	SH_PFC_FUNCTION(i2c2),
>  	SH_PFC_FUNCTION(i2c3),
> +	SH_PFC_FUNCTION(iic0),
> +	SH_PFC_FUNCTION(iic1),
> +	SH_PFC_FUNCTION(iic2),
> +	SH_PFC_FUNCTION(iic3),
>  	SH_PFC_FUNCTION(intc),
>  	SH_PFC_FUNCTION(mmc0),
>  	SH_PFC_FUNCTION(mmc1),

-- 
Regards,

Laurent Pinchart

[PATCH v2 2/5] pinctrl: pfc: r8a7790: add mux data for IIC(B) cores

[Wolfram Sang]

On Tue, Mar 25, 2014 at 07:56:26PM +0100, Wolfram Sang wrote:
> From: Wolfram Sang <wsa@sang-engineering.com>
> 
> Signed-off-by: Wolfram Sang <wsa@sang-engineering.com>

Forgot to add LinusW to CC. Linus, shall I resend?

> ---
> Change since V1:
> 
> * renamed i2c4-7 to iic0-3
> 
>  drivers/pinctrl/sh-pfc/pfc-r8a7790.c | 118 ++++++++++++++++++++++++++++++++++-
>  1 file changed, 116 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
> index bcb47d138b02..99b62b1ee752 100644
> --- a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
> +++ b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
> @@ -782,8 +782,8 @@ enum {
>  	USB1_PWEN_MARK, AUDIO_CLKOUT_D_MARK, USB1_OVC_MARK,
>  	TCLK1_B_MARK,
>  
> -	I2C0_SCL_MARK, I2C0_SDA_MARK,
> -	I2C3_SCL_MARK, I2C3_SDA_MARK,
> +	IIC0_SCL_MARK, IIC0_SDA_MARK, I2C0_SCL_MARK, I2C0_SDA_MARK,
> +	IIC3_SCL_MARK, IIC3_SDA_MARK, I2C3_SCL_MARK, I2C3_SDA_MARK,
>  	PINMUX_MARK_END,
>  };
>  
> @@ -1723,9 +1723,13 @@ static const u16 pinmux_data[] = {
>  	PINMUX_IPSR_DATA(IP16_7, USB1_OVC),
>  	PINMUX_IPSR_MODSEL_DATA(IP16_7, TCLK1_B, SEL_TMU1_1),
>  
> +	PINMUX_DATA(IIC0_SCL_MARK, FN_SEL_IIC0_0),
> +	PINMUX_DATA(IIC0_SDA_MARK, FN_SEL_IIC0_0),
>  	PINMUX_DATA(I2C0_SCL_MARK, FN_SEL_IIC0_1),
>  	PINMUX_DATA(I2C0_SDA_MARK, FN_SEL_IIC0_1),
>  
> +	PINMUX_DATA(IIC3_SCL_MARK, FN_SEL_IICDVFS_0),
> +	PINMUX_DATA(IIC3_SDA_MARK, FN_SEL_IICDVFS_0),
>  	PINMUX_DATA(I2C3_SCL_MARK, FN_SEL_IICDVFS_1),
>  	PINMUX_DATA(I2C3_SDA_MARK, FN_SEL_IICDVFS_1),
>  };
> @@ -2134,6 +2138,80 @@ static const unsigned int i2c3_pins[] = {
>  static const unsigned int i2c3_mux[] = {
>  	I2C3_SCL_MARK, I2C3_SDA_MARK,
>  };
> +/* - IIC0 (I2C4) ------------------------------------------------------------ */
> +static const unsigned int iic0_pins[] = {
> +	/* SCL, SDA */
> +	PIN_A_NUMBER('G', 15), PIN_A_NUMBER('F', 15),
> +};
> +static const unsigned int iic0_mux[] = {
> +	IIC0_SCL_MARK, IIC0_SDA_MARK,
> +};
> +/* - IIC1 (I2C5) ------------------------------------------------------------ */
> +static const unsigned int iic1_pins[] = {
> +	/* SCL, SDA */
> +	RCAR_GP_PIN(1, 16), RCAR_GP_PIN(1, 17),
> +};
> +static const unsigned int iic1_mux[] = {
> +	IIC1_SCL_MARK, IIC1_SDA_MARK,
> +};
> +static const unsigned int iic1_b_pins[] = {
> +	/* SCL, SDA */
> +	RCAR_GP_PIN(3, 6), RCAR_GP_PIN(3, 7),
> +};
> +static const unsigned int iic1_b_mux[] = {
> +	IIC1_SCL_B_MARK, IIC1_SDA_B_MARK,
> +};
> +static const unsigned int iic1_c_pins[] = {
> +	/* SCL, SDA */
> +	RCAR_GP_PIN(4, 30), RCAR_GP_PIN(4, 27),
> +};
> +static const unsigned int iic1_c_mux[] = {
> +	IIC1_SCL_C_MARK, IIC1_SDA_C_MARK,
> +};
> +/* - IIC2 (I2C6) ------------------------------------------------------------ */
> +static const unsigned int iic2_pins[] = {
> +	/* SCL, SDA */
> +	RCAR_GP_PIN(5, 5), RCAR_GP_PIN(5, 6),
> +};
> +static const unsigned int iic2_mux[] = {
> +	IIC2_SCL_MARK, IIC2_SDA_MARK,
> +};
> +static const unsigned int iic2_b_pins[] = {
> +	/* SCL, SDA */
> +	RCAR_GP_PIN(4, 0), RCAR_GP_PIN(4, 1),
> +};
> +static const unsigned int iic2_b_mux[] = {
> +	IIC2_SCL_B_MARK, IIC2_SDA_B_MARK,
> +};
> +static const unsigned int iic2_c_pins[] = {
> +	/* SCL, SDA */
> +	RCAR_GP_PIN(0, 6), RCAR_GP_PIN(0, 7),
> +};
> +static const unsigned int iic2_c_mux[] = {
> +	IIC2_SCL_C_MARK, IIC2_SDA_C_MARK,
> +};
> +static const unsigned int iic2_d_pins[] = {
> +	/* SCL, SDA */
> +	RCAR_GP_PIN(3, 14), RCAR_GP_PIN(3, 15),
> +};
> +static const unsigned int iic2_d_mux[] = {
> +	IIC2_SCL_D_MARK, IIC2_SDA_D_MARK,
> +};
> +static const unsigned int iic2_e_pins[] = {
> +	/* SCL, SDA */
> +	RCAR_GP_PIN(2, 18), RCAR_GP_PIN(2, 19),
> +};
> +static const unsigned int iic2_e_mux[] = {
> +	IIC2_SCL_E_MARK, IIC2_SDA_E_MARK,
> +};
> +/* - IIC3 (I2C7) ------------------------------------------------------------ */
> +static const unsigned int iic3_pins[] = {
> +/* SCL, SDA */
> +	PIN_A_NUMBER('J', 15), PIN_A_NUMBER('H', 15),
> +};
> +static const unsigned int iic3_mux[] = {
> +	IIC3_SCL_MARK, IIC3_SDA_MARK,
> +};
>  /* - INTC ------------------------------------------------------------------- */
>  static const unsigned int intc_irq0_pins[] = {
>  	/* IRQ */
> @@ -3650,6 +3728,16 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
>  	SH_PFC_PIN_GROUP(i2c2_d),
>  	SH_PFC_PIN_GROUP(i2c2_e),
>  	SH_PFC_PIN_GROUP(i2c3),
> +	SH_PFC_PIN_GROUP(iic0),
> +	SH_PFC_PIN_GROUP(iic1),
> +	SH_PFC_PIN_GROUP(iic1_b),
> +	SH_PFC_PIN_GROUP(iic1_c),
> +	SH_PFC_PIN_GROUP(iic2),
> +	SH_PFC_PIN_GROUP(iic2_b),
> +	SH_PFC_PIN_GROUP(iic2_c),
> +	SH_PFC_PIN_GROUP(iic2_d),
> +	SH_PFC_PIN_GROUP(iic2_e),
> +	SH_PFC_PIN_GROUP(iic3),
>  	SH_PFC_PIN_GROUP(intc_irq0),
>  	SH_PFC_PIN_GROUP(intc_irq1),
>  	SH_PFC_PIN_GROUP(intc_irq2),
> @@ -3932,6 +4020,28 @@ static const char * const i2c3_groups[] = {
>  	"i2c3",
>  };
>  
> +static const char * const iic0_groups[] = {
> +	"iic0",
> +};
> +
> +static const char * const iic1_groups[] = {
> +	"iic1",
> +	"iic1_b",
> +	"iic1_c",
> +};
> +
> +static const char * const iic2_groups[] = {
> +	"iic2",
> +	"iic2_b",
> +	"iic2_c",
> +	"iic2_d",
> +	"iic2_e",
> +};
> +
> +static const char * const iic3_groups[] = {
> +	"iic3",
> +};
> +
>  static const char * const intc_groups[] = {
>  	"intc_irq0",
>  	"intc_irq1",
> @@ -4226,6 +4336,10 @@ static const struct sh_pfc_function pinmux_functions[] = {
>  	SH_PFC_FUNCTION(i2c1),
>  	SH_PFC_FUNCTION(i2c2),
>  	SH_PFC_FUNCTION(i2c3),
> +	SH_PFC_FUNCTION(iic0),
> +	SH_PFC_FUNCTION(iic1),
> +	SH_PFC_FUNCTION(iic2),
> +	SH_PFC_FUNCTION(iic3),
>  	SH_PFC_FUNCTION(intc),
>  	SH_PFC_FUNCTION(mmc0),
>  	SH_PFC_FUNCTION(mmc1),
> -- 
> 1.9.0
> 
> --
> To unsubscribe from this list: send the line "unsubscribe linux-sh" in
> the body of a message to majordomo at vger.kernel.org
> More majordomo info at  http://vger.kernel.org/majordomo-info.html
> 
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[PATCH v2 2/5] pinctrl: pfc: r8a7790: add mux data for IIC(B) cores

[Linus Walleij]

On Tue, Mar 25, 2014 at 7:56 PM, Wolfram Sang <wsa@the-dreams.de> wrote:

> From: Wolfram Sang <wsa@sang-engineering.com>
>
> Signed-off-by: Wolfram Sang <wsa@sang-engineering.com>
> ---
> Change since V1:
>
> * renamed i2c4-7 to iic0-3

Patch applied with Laurent's ACK.

Yours,
Linus Walleij

[PATCH v2 3/5] ARM: shmobile: r8a7790: add IIC0-2 clock macros

[Wolfram Sang]

From: Wolfram Sang <wsa@sang-engineering.com>

Signed-off-by: Wolfram Sang <wsa@sang-engineering.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
---
Change since V1:

* added Ack

 include/dt-bindings/clock/r8a7790-clock.h | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/include/dt-bindings/clock/r8a7790-clock.h b/include/dt-bindings/clock/r8a7790-clock.h
index 6548a5fbcf4a..4d3e935b3f1b 100644
--- a/include/dt-bindings/clock/r8a7790-clock.h
+++ b/include/dt-bindings/clock/r8a7790-clock.h
@@ -50,6 +50,7 @@
 #define R8A7790_CLK_SYS_DMAC0		19
 
 /* MSTP3 */
+#define R8A7790_CLK_IIC2		0
 #define R8A7790_CLK_TPU0		4
 #define R8A7790_CLK_MMCIF1		5
 #define R8A7790_CLK_SDHI3		11
@@ -57,6 +58,8 @@
 #define R8A7790_CLK_SDHI1		13
 #define R8A7790_CLK_SDHI0		14
 #define R8A7790_CLK_MMCIF0		15
+#define R8A7790_CLK_IIC0		18
+#define R8A7790_CLK_IIC1		23
 #define R8A7790_CLK_SSUSB		28
 #define R8A7790_CLK_CMT1		29
 #define R8A7790_CLK_USBDMAC0		30
-- 
1.9.0

[PATCH v2 3/5] ARM: shmobile: r8a7790: add IIC0-2 clock macros

[Simon Horman]

On Tue, Mar 25, 2014 at 07:56:27PM +0100, Wolfram Sang wrote:
> From: Wolfram Sang <wsa@sang-engineering.com>
> 
> Signed-off-by: Wolfram Sang <wsa@sang-engineering.com>
> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>

Thanks, I have queued this up.

> ---
> Change since V1:
> 
> * added Ack
> 
>  include/dt-bindings/clock/r8a7790-clock.h | 3 +++
>  1 file changed, 3 insertions(+)
> 
> diff --git a/include/dt-bindings/clock/r8a7790-clock.h b/include/dt-bindings/clock/r8a7790-clock.h
> index 6548a5fbcf4a..4d3e935b3f1b 100644
> --- a/include/dt-bindings/clock/r8a7790-clock.h
> +++ b/include/dt-bindings/clock/r8a7790-clock.h
> @@ -50,6 +50,7 @@
>  #define R8A7790_CLK_SYS_DMAC0		19
>  
>  /* MSTP3 */
> +#define R8A7790_CLK_IIC2		0
>  #define R8A7790_CLK_TPU0		4
>  #define R8A7790_CLK_MMCIF1		5
>  #define R8A7790_CLK_SDHI3		11
> @@ -57,6 +58,8 @@
>  #define R8A7790_CLK_SDHI1		13
>  #define R8A7790_CLK_SDHI0		14
>  #define R8A7790_CLK_MMCIF0		15
> +#define R8A7790_CLK_IIC0		18
> +#define R8A7790_CLK_IIC1		23
>  #define R8A7790_CLK_SSUSB		28
>  #define R8A7790_CLK_CMT1		29
>  #define R8A7790_CLK_USBDMAC0		30
> -- 
> 1.9.0
> 
> --
> To unsubscribe from this list: send the line "unsubscribe linux-sh" in
> the body of a message to majordomo at vger.kernel.org
> More majordomo info at  http://vger.kernel.org/majordomo-info.html
> 

[PATCH v2 4/5] ARM: shmobile: r8a7790: add IIC(B) clocks to dtsi

[Wolfram Sang]

From: Wolfram Sang <wsa@sang-engineering.com>

Signed-off-by: Wolfram Sang <wsa@sang-engineering.com>
---
Change since V1:

* renamed i2c4-7 to iic0-3

 arch/arm/boot/dts/r8a7790.dtsi | 27 ++++++++++++++-------------
 1 file changed, 14 insertions(+), 13 deletions(-)

diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
index da69afc9e5cb..21e6602c630b 100644
--- a/arch/arm/boot/dts/r8a7790.dtsi
+++ b/arch/arm/boot/dts/r8a7790.dtsi
@@ -702,18 +702,19 @@
 		mstp3_clks: mstp3_clks at e615013c {
 			compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
 			reg = <0 0xe615013c 0 4>, <0 0xe6150048 0 4>;
-			clocks = <&cp_clk>, <&mmc1_clk>, <&sd3_clk>, <&sd2_clk>,
-				 <&cpg_clocks R8A7790_CLK_SD1>, <&cpg_clocks R8A7790_CLK_SD0>,
-				 <&mmc0_clk>, <&rclk_clk>;
+			clocks = <&hp_clk>, <&cp_clk>, <&mmc1_clk>, <&sd3_clk>,
+				 <&sd2_clk>, <&cpg_clocks R8A7790_CLK_SD1>, <&cpg_clocks R8A7790_CLK_SD0>, <&mmc0_clk>,
+				 <&hp_clk>, <&hp_clk>, <&rclk_clk>;
 			#clock-cells = <1>;
 			renesas,clock-indices = <
-				R8A7790_CLK_TPU0 R8A7790_CLK_MMCIF1 R8A7790_CLK_SDHI3
-				R8A7790_CLK_SDHI2 R8A7790_CLK_SDHI1 R8A7790_CLK_SDHI0
-				R8A7790_CLK_MMCIF0 R8A7790_CLK_CMT1
+				R8A7790_CLK_IIC2 R8A7790_CLK_TPU0 R8A7790_CLK_MMCIF1 R8A7790_CLK_SDHI3
+				R8A7790_CLK_SDHI2 R8A7790_CLK_SDHI1 R8A7790_CLK_SDHI0 R8A7790_CLK_MMCIF0
+				R8A7790_CLK_IIC0 R8A7790_CLK_IIC1 R8A7790_CLK_CMT1
 			>;
 			clock-output-names =
-				"tpu0", "mmcif1", "sdhi3", "sdhi2",
-				"sdhi1", "sdhi0", "mmcif0", "cmt1";
+				"iic2", "tpu0", "mmcif1", "sdhi3",
+				"sdhi2", "sdhi1", "sdhi0", "mmcif0",
+				"iic0", "iic1", "cmt1";
 		};
 		mstp5_clks: mstp5_clks at e6150144 {
 			compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
@@ -757,16 +758,16 @@
 		mstp9_clks: mstp9_clks at e6150994 {
 			compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
 			reg = <0 0xe6150994 0 4>, <0 0xe61509a4 0 4>;
-			clocks = <&p_clk>, <&p_clk>, <&cpg_clocks R8A7790_CLK_QSPI>,
+			clocks = <&p_clk>, <&p_clk>, <&cpg_clocks R8A7790_CLK_QSPI>, <&cp_clk>,
 				 <&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>;
 			#clock-cells = <1>;
 			renesas,clock-indices = <
-				R8A7790_CLK_RCAN1 R8A7790_CLK_RCAN0 R8A7790_CLK_QSPI_MOD
-				R8A7790_CLK_I2C3 R8A7790_CLK_I2C2 R8A7790_CLK_I2C1
-				R8A7790_CLK_I2C0
+				R8A7790_CLK_RCAN1 R8A7790_CLK_RCAN0 R8A7790_CLK_QSPI_MOD R8A7790_CLK_IICDVFS
+				R8A7790_CLK_I2C3 R8A7790_CLK_I2C2 R8A7790_CLK_I2C1 R8A7790_CLK_I2C0
 			>;
 			clock-output-names =
-				"rcan1", "rcan0", "qspi_mod", "i2c3", "i2c2", "i2c1", "i2c0";
+				"rcan1", "rcan0", "qspi_mod", "iic3",
+				"i2c3",	"i2c2", "i2c1", "i2c0";
 		};
 	};
 
-- 
1.9.0

[PATCH v2 4/5] ARM: shmobile: r8a7790: add IIC(B) clocks to dtsi

[Laurent Pinchart]

Hi Wolfram,

Thank you for the patch.

On Tuesday 25 March 2014 19:56:28 Wolfram Sang wrote:
> From: Wolfram Sang <wsa@sang-engineering.com>
> 
> Signed-off-by: Wolfram Sang <wsa@sang-engineering.com>

Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>

> ---
> Change since V1:
> 
> * renamed i2c4-7 to iic0-3
> 
>  arch/arm/boot/dts/r8a7790.dtsi | 27 ++++++++++++++-------------
>  1 file changed, 14 insertions(+), 13 deletions(-)
> 
> diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
> index da69afc9e5cb..21e6602c630b 100644
> --- a/arch/arm/boot/dts/r8a7790.dtsi
> +++ b/arch/arm/boot/dts/r8a7790.dtsi
> @@ -702,18 +702,19 @@
>  		mstp3_clks: mstp3_clks at e615013c {
>  			compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-
clocks";
>  			reg = <0 0xe615013c 0 4>, <0 0xe6150048 0 4>;
> -			clocks = <&cp_clk>, <&mmc1_clk>, <&sd3_clk>, <&sd2_clk>,
> -				 <&cpg_clocks R8A7790_CLK_SD1>, <&cpg_clocks 
R8A7790_CLK_SD0>,
> -				 <&mmc0_clk>, <&rclk_clk>;
> +			clocks = <&hp_clk>, <&cp_clk>, <&mmc1_clk>, <&sd3_clk>,
> +				 <&sd2_clk>, <&cpg_clocks R8A7790_CLK_SD1>, <&cpg_clocks
> R8A7790_CLK_SD0>, <&mmc0_clk>, +				 <&hp_clk>, <&hp_clk>, 
<&rclk_clk>;
>  			#clock-cells = <1>;
>  			renesas,clock-indices = <
> -				R8A7790_CLK_TPU0 R8A7790_CLK_MMCIF1 R8A7790_CLK_SDHI3
> -				R8A7790_CLK_SDHI2 R8A7790_CLK_SDHI1 R8A7790_CLK_SDHI0
> -				R8A7790_CLK_MMCIF0 R8A7790_CLK_CMT1
> +				R8A7790_CLK_IIC2 R8A7790_CLK_TPU0 R8A7790_CLK_MMCIF1 
R8A7790_CLK_SDHI3
> +				R8A7790_CLK_SDHI2 R8A7790_CLK_SDHI1 R8A7790_CLK_SDHI0
> R8A7790_CLK_MMCIF0 +				R8A7790_CLK_IIC0 R8A7790_CLK_IIC1 
R8A7790_CLK_CMT1
> 
>  			>;
> 
>  			clock-output-names =
> -				"tpu0", "mmcif1", "sdhi3", "sdhi2",
> -				"sdhi1", "sdhi0", "mmcif0", "cmt1";
> +				"iic2", "tpu0", "mmcif1", "sdhi3",
> +				"sdhi2", "sdhi1", "sdhi0", "mmcif0",
> +				"iic0", "iic1", "cmt1";
>  		};
>  		mstp5_clks: mstp5_clks at e6150144 {
>  			compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-
clocks";
> @@ -757,16 +758,16 @@
>  		mstp9_clks: mstp9_clks at e6150994 {
>  			compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-
clocks";
>  			reg = <0 0xe6150994 0 4>, <0 0xe61509a4 0 4>;
> -			clocks = <&p_clk>, <&p_clk>, <&cpg_clocks R8A7790_CLK_QSPI>,
> +			clocks = <&p_clk>, <&p_clk>, <&cpg_clocks R8A7790_CLK_QSPI>, 
<&cp_clk>,
>  				 <&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>;
>  			#clock-cells = <1>;
>  			renesas,clock-indices = <
> -				R8A7790_CLK_RCAN1 R8A7790_CLK_RCAN0 R8A7790_CLK_QSPI_MOD
> -				R8A7790_CLK_I2C3 R8A7790_CLK_I2C2 R8A7790_CLK_I2C1
> -				R8A7790_CLK_I2C0
> +				R8A7790_CLK_RCAN1 R8A7790_CLK_RCAN0 R8A7790_CLK_QSPI_MOD
> R8A7790_CLK_IICDVFS +				R8A7790_CLK_I2C3 R8A7790_CLK_I2C2 
R8A7790_CLK_I2C1
> R8A7790_CLK_I2C0
>  			>;
> 
>  			clock-output-names =
> -				"rcan1", "rcan0", "qspi_mod", "i2c3", "i2c2", "i2c1", "i2c0";
> +				"rcan1", "rcan0", "qspi_mod", "iic3",
> +				"i2c3",	"i2c2", "i2c1", "i2c0";
>  		};
>  	};

-- 
Regards,

Laurent Pinchart

[PATCH v2 4/5] ARM: shmobile: r8a7790: add IIC(B) clocks to dtsi

[Simon Horman]

On Wed, Mar 26, 2014 at 03:04:41PM +0100, Laurent Pinchart wrote:
> Hi Wolfram,
> 
> Thank you for the patch.
> 
> On Tuesday 25 March 2014 19:56:28 Wolfram Sang wrote:
> > From: Wolfram Sang <wsa@sang-engineering.com>
> > 
> > Signed-off-by: Wolfram Sang <wsa@sang-engineering.com>
> 
> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>

Thanks.

I had to resolve a minor conflict when queueing this up.
And I also replaced a tab with a whitspace as a separator
on the line that (now) contains ""i2c3", "i2c2", "i2c1", "i2c0";".

Please check the result to make sure I didn't introduce errors.

From: Wolfram Sang <wsa@sang-engineering.com>

ARM: shmobile: r8a7790: add IIC(B) clocks to dtsi

Signed-off-by: Wolfram Sang <wsa@sang-engineering.com>
[horms+renesas at verge.net.au resolved conflicts]
[horms+renesas at verge.net.au consistently use space as separator]
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
 arch/arm/boot/dts/r8a7790.dtsi | 27 ++++++++++++++-------------
 1 file changed, 14 insertions(+), 13 deletions(-)

diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
index b74631e..903efe7 100644
--- a/arch/arm/boot/dts/r8a7790.dtsi
+++ b/arch/arm/boot/dts/r8a7790.dtsi
@@ -679,18 +679,19 @@
 		mstp3_clks: mstp3_clks at e615013c {
 			compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
 			reg = <0 0xe615013c 0 4>, <0 0xe6150048 0 4>;
-			clocks = <&cp_clk>, <&mmc1_clk>, <&sd3_clk>, <&sd2_clk>,
-				 <&cpg_clocks R8A7790_CLK_SD1>, <&cpg_clocks R8A7790_CLK_SD0>,
-				 <&mmc0_clk>, <&rclk_clk>;
+			clocks = <&hp_clk>, <&cp_clk>, <&mmc1_clk>, <&sd3_clk>,
+				 <&sd2_clk>, <&cpg_clocks R8A7790_CLK_SD1>, <&cpg_clocks R8A7790_CLK_SD0>, <&mmc0_clk>,
+				 <&hp_clk>, <&hp_clk>, <&rclk_clk>;
 			#clock-cells = <1>;
 			renesas,clock-indices = <
-				R8A7790_CLK_TPU0 R8A7790_CLK_MMCIF1 R8A7790_CLK_SDHI3
-				R8A7790_CLK_SDHI2 R8A7790_CLK_SDHI1 R8A7790_CLK_SDHI0
-				R8A7790_CLK_MMCIF0 R8A7790_CLK_CMT1
+				R8A7790_CLK_IIC2 R8A7790_CLK_TPU0 R8A7790_CLK_MMCIF1 R8A7790_CLK_SDHI3
+				R8A7790_CLK_SDHI2 R8A7790_CLK_SDHI1 R8A7790_CLK_SDHI0 R8A7790_CLK_MMCIF0
+				R8A7790_CLK_IIC0 R8A7790_CLK_IIC1 R8A7790_CLK_CMT1
 			>;
 			clock-output-names =
-				"tpu0", "mmcif1", "sdhi3", "sdhi2",
-				"sdhi1", "sdhi0", "mmcif0", "cmt1";
+				"iic2", "tpu0", "mmcif1", "sdhi3",
+				"sdhi2", "sdhi1", "sdhi0", "mmcif0",
+				"iic0", "iic1", "cmt1";
 		};
 		mstp5_clks: mstp5_clks at e6150144 {
 			compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
@@ -734,16 +735,16 @@
 		mstp9_clks: mstp9_clks at e6150994 {
 			compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
 			reg = <0 0xe6150994 0 4>, <0 0xe61509a4 0 4>;
-			clocks = <&p_clk>, <&p_clk>, <&cpg_clocks R8A7790_CLK_QSPI>,
+			clocks = <&p_clk>, <&p_clk>, <&cpg_clocks R8A7790_CLK_QSPI>, <&cp_clk>,
 				 <&hp_clk>, <&hp_clk>, <&hp_clk>, <&hp_clk>;
 			#clock-cells = <1>;
 			renesas,clock-indices = <
-				R8A7790_CLK_RCAN1 R8A7790_CLK_RCAN0 R8A7790_CLK_QSPI_MOD
-				R8A7790_CLK_I2C3 R8A7790_CLK_I2C2 R8A7790_CLK_I2C1
-				R8A7790_CLK_I2C0
+				R8A7790_CLK_RCAN1 R8A7790_CLK_RCAN0 R8A7790_CLK_QSPI_MOD R8A7790_CLK_IICDVFS
+				R8A7790_CLK_I2C3 R8A7790_CLK_I2C2 R8A7790_CLK_I2C1 R8A7790_CLK_I2C0
 			>;
 			clock-output-names =
-				"rcan1", "rcan0", "qspi_mod", "i2c3", "i2c2", "i2c1", "i2c0";
+				"rcan1", "rcan0", "qspi_mod", "iic3",
+				"i2c3", "i2c2", "i2c1", "i2c0";
 		};
 	};
 
-- 
1.8.5.2

[PATCH v2 4/5] ARM: shmobile: r8a7790: add IIC(B) clocks to dtsi

[Wolfram Sang]

> I had to resolve a minor conflict when queueing this up.
> And I also replaced a tab with a whitspace as a separator
> on the line that (now) contains ""i2c3", "i2c2", "i2c1", "i2c0";".

Thanks for fixing!
 
> Please check the result to make sure I didn't introduce errors.

Looks good to me!

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[PATCH v2 4/5] ARM: shmobile: r8a7790: add IIC(B) clocks to dtsi

[Laurent Pinchart]

Hi Simon,

On Thursday 10 April 2014 17:57:46 Simon Horman wrote:
> On Wed, Mar 26, 2014 at 03:04:41PM +0100, Laurent Pinchart wrote:
> > Hi Wolfram,
> > 
> > Thank you for the patch.
> > 
> > On Tuesday 25 March 2014 19:56:28 Wolfram Sang wrote:
> > > From: Wolfram Sang <wsa@sang-engineering.com>
> > > 
> > > Signed-off-by: Wolfram Sang <wsa@sang-engineering.com>
> > 
> > Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
> 
> Thanks.
> 
> I had to resolve a minor conflict when queueing this up.
> And I also replaced a tab with a whitspace as a separator
> on the line that (now) contains ""i2c3", "i2c2", "i2c1", "i2c0";".
> 
> Please check the result to make sure I didn't introduce errors.

It still looks good to me.

> From: Wolfram Sang <wsa@sang-engineering.com>
> 
> ARM: shmobile: r8a7790: add IIC(B) clocks to dtsi
> 
> Signed-off-by: Wolfram Sang <wsa@sang-engineering.com>
> [horms+renesas at verge.net.au resolved conflicts]
> [horms+renesas at verge.net.au consistently use space as separator]
> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
> ---
>  arch/arm/boot/dts/r8a7790.dtsi | 27 ++++++++++++++-------------
>  1 file changed, 14 insertions(+), 13 deletions(-)
> 
> diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
> index b74631e..903efe7 100644
> --- a/arch/arm/boot/dts/r8a7790.dtsi
> +++ b/arch/arm/boot/dts/r8a7790.dtsi
> @@ -679,18 +679,19 @@
>  		mstp3_clks: mstp3_clks at e615013c {
>  			compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-
clocks";
>  			reg = <0 0xe615013c 0 4>, <0 0xe6150048 0 4>;
> -			clocks = <&cp_clk>, <&mmc1_clk>, <&sd3_clk>, <&sd2_clk>,
> -				 <&cpg_clocks R8A7790_CLK_SD1>, <&cpg_clocks 
R8A7790_CLK_SD0>,
> -				 <&mmc0_clk>, <&rclk_clk>;
> +			clocks = <&hp_clk>, <&cp_clk>, <&mmc1_clk>, <&sd3_clk>,
> +				 <&sd2_clk>, <&cpg_clocks R8A7790_CLK_SD1>, <&cpg_clocks
> R8A7790_CLK_SD0>, <&mmc0_clk>, +				 <&hp_clk>, <&hp_clk>, 
<&rclk_clk>;
>  			#clock-cells = <1>;
>  			renesas,clock-indices = <
> -				R8A7790_CLK_TPU0 R8A7790_CLK_MMCIF1 R8A7790_CLK_SDHI3
> -				R8A7790_CLK_SDHI2 R8A7790_CLK_SDHI1 R8A7790_CLK_SDHI0
> -				R8A7790_CLK_MMCIF0 R8A7790_CLK_CMT1
> +				R8A7790_CLK_IIC2 R8A7790_CLK_TPU0 R8A7790_CLK_MMCIF1 
R8A7790_CLK_SDHI3
> +				R8A7790_CLK_SDHI2 R8A7790_CLK_SDHI1 R8A7790_CLK_SDHI0
> R8A7790_CLK_MMCIF0 +				R8A7790_CLK_IIC0 R8A7790_CLK_IIC1 
R8A7790_CLK_CMT1
> 
>  			>;
> 
>  			clock-output-names =
> -				"tpu0", "mmcif1", "sdhi3", "sdhi2",
> -				"sdhi1", "sdhi0", "mmcif0", "cmt1";
> +				"iic2", "tpu0", "mmcif1", "sdhi3",
> +				"sdhi2", "sdhi1", "sdhi0", "mmcif0",
> +				"iic0", "iic1", "cmt1";
>  		};
>  		mstp5_clks: mstp5_clks at e6150144 {
>  			compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-
clocks";
> @@ -734,16 +735,16 @@
>  		mstp9_clks: mstp9_clks at e6150994 {
>  			compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-
clocks";
>  			reg = <0 0xe6150994 0 4>, <0 0xe61509a4 0 4>;
> -			clocks = <&p_clk>, <&p_clk>, <&cpg_clocks R8A7790_CLK_QSPI>,
> +			clocks = <&p_clk>, <&p_clk>, <&cpg_clocks R8A7790_CLK_QSPI>, 
<&cp_clk>,
>  				 <&hp_clk>, <&hp_clk>, <&hp_clk>, <&hp_clk>;
>  			#clock-cells = <1>;
>  			renesas,clock-indices = <
> -				R8A7790_CLK_RCAN1 R8A7790_CLK_RCAN0 R8A7790_CLK_QSPI_MOD
> -				R8A7790_CLK_I2C3 R8A7790_CLK_I2C2 R8A7790_CLK_I2C1
> -				R8A7790_CLK_I2C0
> +				R8A7790_CLK_RCAN1 R8A7790_CLK_RCAN0 R8A7790_CLK_QSPI_MOD
> R8A7790_CLK_IICDVFS +				R8A7790_CLK_I2C3 R8A7790_CLK_I2C2 
R8A7790_CLK_I2C1
> R8A7790_CLK_I2C0
>  			>;
> 
>  			clock-output-names =
> -				"rcan1", "rcan0", "qspi_mod", "i2c3", "i2c2", "i2c1", "i2c0";
> +				"rcan1", "rcan0", "qspi_mod", "iic3",
> +				"i2c3", "i2c2", "i2c1", "i2c0";
>  		};
>  	};

-- 
Regards,

Laurent Pinchart

[PATCH v2 5/5] ARM: shmobile: r8a7790: add IIC(B) cores to dtsi

[Wolfram Sang]

From: Wolfram Sang <wsa@sang-engineering.com>

Signed-off-by: Wolfram Sang <wsa@sang-engineering.com>
---
Change since V1:

* renamed i2c4-7 to iic0-3

 arch/arm/boot/dts/r8a7790.dtsi | 44 ++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 44 insertions(+)

diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
index 21e6602c630b..b78d718479e0 100644
--- a/arch/arm/boot/dts/r8a7790.dtsi
+++ b/arch/arm/boot/dts/r8a7790.dtsi
@@ -24,6 +24,10 @@
 		i2c1 = &i2c1;
 		i2c2 = &i2c2;
 		i2c3 = &i2c3;
+		i2c4 = &iic0;
+		i2c5 = &iic1;
+		i2c6 = &iic2;
+		i2c7 = &iic3;
 		spi0 = &qspi;
 		spi1 = &msiof0;
 		spi2 = &msiof1;
@@ -236,6 +240,46 @@
 		status = "disabled";
 	};
 
+	iic0: i2c at e6500000 {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		compatible = "renesas,iic-r8a7790", "renesas,rmobile-iic";
+		reg = <0 0xe6500000 0 0x425>;
+		interrupts = <0 174 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&mstp3_clks R8A7790_CLK_IIC0>;
+		status = "disabled";
+	};
+
+	iic1: i2c at e6510000 {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		compatible = "renesas,iic-r8a7790", "renesas,rmobile-iic";
+		reg = <0 0xe6510000 0 0x425>;
+		interrupts = <0 175 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&mstp3_clks R8A7790_CLK_IIC1>;
+		status = "disabled";
+	};
+
+	iic2: i2c at e6520000 {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		compatible = "renesas,iic-r8a7790", "renesas,rmobile-iic";
+		reg = <0 0xe6520000 0 0x425>;
+		interrupts = <0 176 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&mstp3_clks R8A7790_CLK_IIC2>;
+		status = "disabled";
+	};
+
+	iic3: i2c at e60b0000 {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		compatible = "renesas,iic-r8a7790", "renesas,rmobile-iic";
+		reg = <0 0xe60b0000 0 0x425>;
+		interrupts = <0 173 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&mstp9_clks R8A7790_CLK_IICDVFS>;
+		status = "disabled";
+	};
+
 	mmcif0: mmcif at ee200000 {
 		compatible = "renesas,mmcif-r8a7790", "renesas,sh-mmcif";
 		reg = <0 0xee200000 0 0x80>;
-- 
1.9.0

[PATCH v2 5/5] ARM: shmobile: r8a7790: add IIC(B) cores to dtsi

[Laurent Pinchart]

Hi Wolfram,

Thank you for the patch.

On Tuesday 25 March 2014 19:56:29 Wolfram Sang wrote:
> From: Wolfram Sang <wsa@sang-engineering.com>
> 
> Signed-off-by: Wolfram Sang <wsa@sang-engineering.com>

Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>

> ---
> Change since V1:
> 
> * renamed i2c4-7 to iic0-3
> 
>  arch/arm/boot/dts/r8a7790.dtsi | 44
> ++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 44 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
> index 21e6602c630b..b78d718479e0 100644
> --- a/arch/arm/boot/dts/r8a7790.dtsi
> +++ b/arch/arm/boot/dts/r8a7790.dtsi
> @@ -24,6 +24,10 @@
>  		i2c1 = &i2c1;
>  		i2c2 = &i2c2;
>  		i2c3 = &i2c3;
> +		i2c4 = &iic0;
> +		i2c5 = &iic1;
> +		i2c6 = &iic2;
> +		i2c7 = &iic3;
>  		spi0 = &qspi;
>  		spi1 = &msiof0;
>  		spi2 = &msiof1;
> @@ -236,6 +240,46 @@
>  		status = "disabled";
>  	};
> 
> +	iic0: i2c at e6500000 {
> +		#address-cells = <1>;
> +		#size-cells = <0>;
> +		compatible = "renesas,iic-r8a7790", "renesas,rmobile-iic";
> +		reg = <0 0xe6500000 0 0x425>;
> +		interrupts = <0 174 IRQ_TYPE_LEVEL_HIGH>;
> +		clocks = <&mstp3_clks R8A7790_CLK_IIC0>;
> +		status = "disabled";
> +	};
> +
> +	iic1: i2c at e6510000 {
> +		#address-cells = <1>;
> +		#size-cells = <0>;
> +		compatible = "renesas,iic-r8a7790", "renesas,rmobile-iic";
> +		reg = <0 0xe6510000 0 0x425>;
> +		interrupts = <0 175 IRQ_TYPE_LEVEL_HIGH>;
> +		clocks = <&mstp3_clks R8A7790_CLK_IIC1>;
> +		status = "disabled";
> +	};
> +
> +	iic2: i2c at e6520000 {
> +		#address-cells = <1>;
> +		#size-cells = <0>;
> +		compatible = "renesas,iic-r8a7790", "renesas,rmobile-iic";
> +		reg = <0 0xe6520000 0 0x425>;
> +		interrupts = <0 176 IRQ_TYPE_LEVEL_HIGH>;
> +		clocks = <&mstp3_clks R8A7790_CLK_IIC2>;
> +		status = "disabled";
> +	};
> +
> +	iic3: i2c at e60b0000 {
> +		#address-cells = <1>;
> +		#size-cells = <0>;
> +		compatible = "renesas,iic-r8a7790", "renesas,rmobile-iic";
> +		reg = <0 0xe60b0000 0 0x425>;
> +		interrupts = <0 173 IRQ_TYPE_LEVEL_HIGH>;
> +		clocks = <&mstp9_clks R8A7790_CLK_IICDVFS>;
> +		status = "disabled";
> +	};
> +
>  	mmcif0: mmcif at ee200000 {
>  		compatible = "renesas,mmcif-r8a7790", "renesas,sh-mmcif";
>  		reg = <0 0xee200000 0 0x80>;

-- 
Regards,

Laurent Pinchart

[PATCH v2 5/5] ARM: shmobile: r8a7790: add IIC(B) cores to dtsi

[Simon Horman]

On Wed, Mar 26, 2014 at 03:05:34PM +0100, Laurent Pinchart wrote:
> Hi Wolfram,
> 
> Thank you for the patch.
> 
> On Tuesday 25 March 2014 19:56:29 Wolfram Sang wrote:
> > From: Wolfram Sang <wsa@sang-engineering.com>
> > 
> > Signed-off-by: Wolfram Sang <wsa@sang-engineering.com>
> 
> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>

Thanks, I will queue this up.