From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 7E781C27C44 for ; Fri, 31 May 2024 06:33:10 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=zmvz+mZGQaS+kx/Qz5mTYGqODl7ZBnr1xKYmudAo+jI=; b=PCCylCQDPFwJNA 8JnYuWU/GkWnQnwA2M1MeXG2dYkPDmHfFdScfMAPZnKH8Z6w4JU+8FLJKdcn+O6xf/ePHPPO51SbE jtyyDsvUO7FPMVYBLZC90L5z00WaDm1EpbcYGMTj21KfxGskPy6emUkuvQ8BFxxQUZjxCMeV+j3oQ zhY1cChbzeynqPeWlPpkSbjxnxHNwrvcsi8aoAbACLs5xCSc106CXisKe8nnGeyQWjQJcI8Qbk5e+ op640K/tpL8vSdZ+Oxhm/21gkvhHz5af2fiNLgGQhZTLwaFGN8iGsC//AFrdXk0HLWKCbCHa5FEDE rAzCvheOxIzFWCxedpzw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sCvou-00000009OiU-1BXR; Fri, 31 May 2024 06:32:56 +0000 Received: from mx1.tq-group.com ([93.104.207.81]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sCvoq-00000009Oi2-0hrf for linux-arm-kernel@lists.infradead.org; Fri, 31 May 2024 06:32:54 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=tq-group.com; i=@tq-group.com; q=dns/txt; s=key1; t=1717137172; x=1748673172; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=Yxhy+lgIkgKBNI7vIDVh7UOrpF+bSmn9/vQclJLbSlU=; b=bSBxxShANE3u/usO/+V1GCs6o1KaiD1pWjaU4jQ6gBnFZf4t/j0EzoH2 eYbU7bA597Mz8iw18q9/m4gD/55xhQxzkZ7titYmNWmyHi8dFft2edby4 PAOkosG2BVljZ9BADBtIdYWms5dDkOnwCXKWYNBY6LmzIK05s/m4+wGjt rZxqIUFt/hQ8d4+aux/d+MxLW53IVwyjdXs6SWG3gtOwV+JUnRbdGsu0J Mo37nMCNjKgmf+I3PfDRRZuhPZzwb+d1NX9GoNw55J5uW3jJsMb39k9J6 7PEAan14K/OZp6FrUiceD04LHBCG1UjP/93/JhSZjb2nZtasp01ujsFV3 A==; X-CSE-ConnectionGUID: p1+aEhYhRJKk6H/MobMNLA== X-CSE-MsgGUID: 333r38qDTS201iM4aUMemQ== X-IronPort-AV: E=Sophos;i="6.08,203,1712613600"; d="scan'208";a="37152648" Received: from vmailcow01.tq-net.de ([10.150.86.48]) by mx1.tq-group.com with ESMTP; 31 May 2024 08:32:49 +0200 Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id 94B7E165F00; Fri, 31 May 2024 08:32:44 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ew.tq-group.com; s=dkim; t=1717137165; h=from:subject:date:message-id:to:cc:mime-version:content-type: content-transfer-encoding:in-reply-to:references; bh=Yxhy+lgIkgKBNI7vIDVh7UOrpF+bSmn9/vQclJLbSlU=; b=lw3/VR9PiO5roQceuizF5xXrSm48jTqU9oAnsOSp97GJS+o6w2dYuQYhkp6NvysJF5XElL XFqS4ZwpnB9GiA2OHKKT8XvFCX45mL9ok547OVLdhjz6C6P3Sbtq+fz+mnzAuLwDK+6A03 lH0PyH4mYJ7X2NdYVeq4Nds20BIrJ9O5dHaTdf4K4uO7uSZk/eI61CCB9z5tgG7GRNoVKU ZCN26HbpEvjnE1RwUanzgfuiDrD7JnI/ZgpQW3yYT8PbHIhqRnA+QVLhu4TuRvpoRIOpmE 6Cyc6tiR0oy4WXpc4/yC3WEnbcNXpToVQ9FWIC5iaAgcRuYoX2KfKWuAVt49Tw== From: Alexander Stein To: Shawn Guo , Rob Herring , Krzysztof Kozlowski , Conor Dooley , linux-arm-kernel@lists.infradead.org Cc: Rasmus Villemoes , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Esben Haabendal , Esben Haabendal Subject: Re: [PATCH] ARM: dts: ls1021a: add QUICC Engine node Date: Fri, 31 May 2024 08:32:44 +0200 Message-ID: <3380831.44csPzL39Z@steina-w> Organization: TQ-Systems GmbH In-Reply-To: <20240530-arm-ls1021a-qe-dts-v1-1-2eda23bdf8c5@geanix.com> References: <20240530-arm-ls1021a-qe-dts-v1-1-2eda23bdf8c5@geanix.com> MIME-Version: 1.0 X-Last-TLS-Session-Version: TLSv1.3 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240530_233252_933456_3D15E120 X-CRM114-Status: GOOD ( 15.59 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi Esben, thanks for the patch. Would you consider current converting into YAML format? Am Donnerstag, 30. Mai 2024, 16:22:54 CEST schrieb Esben Haabendal: > The LS1021A contains a QUICC Engine Block, so add a node to device > tree describing that. > = > Signed-off-by: Esben Haabendal > --- > arch/arm/boot/dts/nxp/ls/ls1021a.dtsi | 51 +++++++++++++++++++++++++++++= ++++++ > 1 file changed, 51 insertions(+) > = > diff --git a/arch/arm/boot/dts/nxp/ls/ls1021a.dtsi b/arch/arm/boot/dts/nx= p/ls/ls1021a.dtsi > index e86998ca77d6..ff7be69acdd5 100644 > --- a/arch/arm/boot/dts/nxp/ls/ls1021a.dtsi > +++ b/arch/arm/boot/dts/nxp/ls/ls1021a.dtsi > @@ -460,6 +460,57 @@ gpio3: gpio@2330000 { > #interrupt-cells =3D <2>; > }; > = > + uqe: uqe@2400000 { > + #address-cells =3D <1>; > + #size-cells =3D <1>; > + device_type =3D "qe"; > + compatible =3D "fsl,qe", "simple-bus"; > + ranges =3D <0x0 0x0 0x2400000 0x40000>; > + reg =3D <0x0 0x2400000 0x0 0x480>; Properties please in this order: * compatible * reg * #address-cells * #size-cells * ranges * device_type > + brg-frequency =3D <150000000>; > + bus-frequency =3D <300000000>; Mh, aren't these values depending on your actual RCW configuration? > + fsl,qe-num-riscs =3D <1>; > + fsl,qe-num-snums =3D <28>; Current bindings defines: > fsl,qe-snums: This property has to be specified as '/bits/ 8' value, > defining the array of serial number (SNUM) values for the virtual > threads. So '/bits/ 8' is missing. > + qeic: qeic@80 { > + compatible =3D "fsl,qe-ic"; > + reg =3D <0x80 0x80>; > + #address-cells =3D <0>; > + interrupt-controller; > + #interrupt-cells =3D <1>; > + interrupts =3D + GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; > + }; > + > + ucc@2000 { > + cell-index =3D <1>; > + reg =3D <0x2000 0x200>; > + interrupts =3D <32>; > + interrupt-parent =3D <&qeic>; Move cell-index to last position. > + }; > + > + ucc@2200 { > + cell-index =3D <3>; > + reg =3D <0x2200 0x200>; > + interrupts =3D <34>; > + interrupt-parent =3D <&qeic>; Same here. > + }; > + > + muram@10000 { > + #address-cells =3D <1>; > + #size-cells =3D <1>; > + compatible =3D "fsl,qe-muram", "fsl,cpm-muram"; > + ranges =3D <0x0 0x10000 0x6000>; Node address but no 'reg' property? I have no idea if this is okay. Also compatible (and possibly reg) first. Thanks and best regards. Alexander > + data-only@0 { > + compatible =3D "fsl,qe-muram-data", > + "fsl,cpm-muram-data"; > + reg =3D <0x0 0x6000>; > + }; > + }; > + }; > + > lpuart0: serial@2950000 { > compatible =3D "fsl,ls1021a-lpuart"; > reg =3D <0x0 0x2950000 0x0 0x1000>; > = > --- > base-commit: 1613e604df0cd359cf2a7fbd9be7a0bcfacfabd0 > change-id: 20240530-arm-ls1021a-qe-dts-093381110793 > = > Best regards, > = -- = TQ-Systems GmbH | M=FChlstra=DFe 2, Gut Delling | 82229 Seefeld, Germany Amtsgericht M=FCnchen, HRB 105018 Gesch=E4ftsf=FChrer: Detlef Schneider, R=FCdiger Stahl, Stefan Schneider http://www.tq-group.com/ _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel