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Tue, 13 Apr 2021 09:48:13 +0200 Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 7C30510002A; Tue, 13 Apr 2021 09:48:12 +0200 (CEST) Received: from Webmail-eu.st.com (sfhdag2node3.st.com [10.75.127.6]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 6D1D721EAAC; Tue, 13 Apr 2021 09:48:12 +0200 (CEST) Received: from lmecxl0912.lme.st.com (10.75.127.46) by SFHDAG2NODE3.st.com (10.75.127.6) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Tue, 13 Apr 2021 09:48:11 +0200 Subject: Re: [PATCH 0/7] ARM: dts: stm32: clk: Switch ETHRX clock parent from ETHCK_K to MCO2 on DHCOM SoM To: Marek Vasut , CC: Christophe Roullier , Gabriel Fernandez , Patrice Chotard , Patrick Delaunay , Stephen Boyd , , , Stephen Boyd References: <20210408185731.135511-1-marex@denx.de> <2c410c1b-2a1d-b291-a128-c5d5979be1ef@denx.de> From: Alexandre TORGUE Message-ID: <340d32f1-3afb-2159-fa94-70a45aecd88c@foss.st.com> Date: Tue, 13 Apr 2021 09:48:10 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.10.0 MIME-Version: 1.0 In-Reply-To: <2c410c1b-2a1d-b291-a128-c5d5979be1ef@denx.de> Content-Language: en-US X-Originating-IP: [10.75.127.46] X-ClientProxiedBy: SFHDAG2NODE2.st.com (10.75.127.5) To SFHDAG2NODE3.st.com (10.75.127.6) X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.391, 18.0.761 definitions=2021-04-13_03:2021-04-13, 2021-04-13 signatures=0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210413_004821_569493_8588C9C5 X-CRM114-Status: GOOD ( 21.64 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="us-ascii"; Format="flowed" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi Marek On 4/12/21 8:44 PM, Marek Vasut wrote: > On 4/12/21 10:09 AM, Alexandre TORGUE wrote: >> Hi Marek > > Hello Alex, > > [...] > >>> All the above still only discusses the clock part of the problem. >>> Even if >>> the clock cyclic dependencies could be solved, it would be necessary to >>> resolve legacy dwmac st,eth-clk-sel and st,eth-ref-clk-sel DT properties >>> and avoid DT ABI break. >> >> Thanks for those clear explanations and for this series. As discussed, >> this approach looks good to me as it doesn't break our current >> strategy for dwmac clock integration. I don't know if those cyclic >> redundancies will be fixed one day but we can have a look on dwmac DT >> properties (the gain to change them, the effort to keep the backward >> compatibility, code readability, ...). >> >> Your DT patches looks good. I'll merge them soon. > +CC Stephen ; the DT patches depend on the clock driver changes. Would > it make sense to pick the clock patches through the same tree or how > should that be handled ? In this situation, I prefer to wait that Stephen takes clock patches in his tree. Then I'll take DT ones in mine. (I assume that taking only clock patches will not break mp1 boot or Ethernet usage). Regards Alex > > [...] > > _______________________________________________ > linux-arm-kernel mailing list > linux-arm-kernel@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-arm-kernel _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel