* [PATCH 0/3] TQMa93xx on MBa93xxLA-Mini support
@ 2026-03-17 11:16 Alexander Stein
2026-03-17 11:17 ` [PATCH 1/3] dt-bindings: arm: fsl: add MBa93xxLA-MINI Alexander Stein
` (2 more replies)
0 siblings, 3 replies; 16+ messages in thread
From: Alexander Stein @ 2026-03-17 11:16 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Frank Li,
Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam, Shawn Guo
Cc: Alexander Stein, devicetree, linux-kernel, imx, linux-arm-kernel,
linux
Hi all,
this series adds support for TQMa93xxLA on MBa93xxLA-Mini [1],
a single board computer board in small form factor.
It has a reduced feature set compared to MBa93xxLA, with WiFi/Bluetooth and
WWAN applicaitons in mind.
An overlay for Ezurio WiFi module is added as well.
Best regards,
Alexander
[1] https://www.tq-group.com/en/products/tq-embedded/arm-architecture/mba93xxla-mini/
Martin Schmiedel (3):
dt-bindings: arm: fsl: add MBa93xxLA-MINI
arm64: dts: freescale: add initial device tree for
TQMa93xx/MBa93xxLA-MINI
arm64: dts: freescale: imx93-tqma9352-mba93xxla-mini: Add WLAN/BT
overlay
.../devicetree/bindings/arm/fsl.yaml | 3 +
arch/arm64/boot/dts/freescale/Makefile | 5 +
...3-tqma9352-mba93xxla-mini-ezurio-wlan.dtso | 35 +
.../imx93-tqma9352-mba93xxla-mini.dts | 637 ++++++++++++++++++
4 files changed, 680 insertions(+)
create mode 100644 arch/arm64/boot/dts/freescale/imx93-tqma9352-mba93xxla-mini-ezurio-wlan.dtso
create mode 100644 arch/arm64/boot/dts/freescale/imx93-tqma9352-mba93xxla-mini.dts
--
2.43.0
^ permalink raw reply [flat|nested] 16+ messages in thread* [PATCH 1/3] dt-bindings: arm: fsl: add MBa93xxLA-MINI 2026-03-17 11:16 [PATCH 0/3] TQMa93xx on MBa93xxLA-Mini support Alexander Stein @ 2026-03-17 11:17 ` Alexander Stein 2026-03-17 13:03 ` Daniel Baluta 2026-03-17 11:17 ` [PATCH 2/3] arm64: dts: freescale: add initial device tree for TQMa93xx/MBa93xxLA-MINI Alexander Stein 2026-03-17 11:17 ` [PATCH 3/3] arm64: dts: freescale: imx93-tqma9352-mba93xxla-mini: Add WLAN/BT overlay Alexander Stein 2 siblings, 1 reply; 16+ messages in thread From: Alexander Stein @ 2026-03-17 11:17 UTC (permalink / raw) To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Frank Li, Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam, Shawn Guo Cc: Martin Schmiedel, devicetree, linux-kernel, imx, linux-arm-kernel, linux, Alexander Stein From: Martin Schmiedel <Martin.Schmiedel@tq-group.com> Adds support for the MBa93xxLA-MINI SBC. https://www.tq-group.com/en/products/tq-embedded/arm-architecture/mba93xxla-mini/ Signed-off-by: Martin Schmiedel <Martin.Schmiedel@tq-group.com> Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com> --- Documentation/devicetree/bindings/arm/fsl.yaml | 3 +++ 1 file changed, 3 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/fsl.yaml b/Documentation/devicetree/bindings/arm/fsl.yaml index da2be7114f641..2c86d2381d95a 100644 --- a/Documentation/devicetree/bindings/arm/fsl.yaml +++ b/Documentation/devicetree/bindings/arm/fsl.yaml @@ -1558,11 +1558,14 @@ properties: soldered on an adapter board or for the connector variant MBa93xxLA mainboard is a single board computer using the solderable SOM variant + MBa93xxLA-MINI mainboard is a single board computer using the solderable + SOM variant items: - enum: - tq,imx93-tqma9352-mba91xxca # TQ-Systems GmbH i.MX93 TQMa93xxCA/LA SOM on MBa91xxCA - tq,imx93-tqma9352-mba93xxca # TQ-Systems GmbH i.MX93 TQMa93xxCA/LA SOM on MBa93xxCA - tq,imx93-tqma9352-mba93xxla # TQ-Systems GmbH i.MX93 TQMa93xxLA SOM on MBa93xxLA SBC + - tq,imx93-tqma9352-mba93xxla-mini # TQ-Systems GmbH i.MX93 TQMa93xxLA SOM on MBa93xxLA-MINI SBC - const: tq,imx93-tqma9352 # TQ-Systems GmbH i.MX93 TQMa93xxCA/LA SOM - const: fsl,imx93 -- 2.43.0 ^ permalink raw reply related [flat|nested] 16+ messages in thread
* Re: [PATCH 1/3] dt-bindings: arm: fsl: add MBa93xxLA-MINI 2026-03-17 11:17 ` [PATCH 1/3] dt-bindings: arm: fsl: add MBa93xxLA-MINI Alexander Stein @ 2026-03-17 13:03 ` Daniel Baluta 0 siblings, 0 replies; 16+ messages in thread From: Daniel Baluta @ 2026-03-17 13:03 UTC (permalink / raw) To: Alexander Stein, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Frank Li, Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam, Shawn Guo Cc: Martin Schmiedel, devicetree, linux-kernel, imx, linux-arm-kernel, linux On 3/17/26 13:17, Alexander Stein wrote: > From: Martin Schmiedel <Martin.Schmiedel@tq-group.com> > > Adds support for the MBa93xxLA-MINI SBC. > https://www.tq-group.com/en/products/tq-embedded/arm-architecture/mba93xxla-mini/ > > Signed-off-by: Martin Schmiedel <Martin.Schmiedel@tq-group.com> > Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com> Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com> ^ permalink raw reply [flat|nested] 16+ messages in thread
* [PATCH 2/3] arm64: dts: freescale: add initial device tree for TQMa93xx/MBa93xxLA-MINI 2026-03-17 11:16 [PATCH 0/3] TQMa93xx on MBa93xxLA-Mini support Alexander Stein 2026-03-17 11:17 ` [PATCH 1/3] dt-bindings: arm: fsl: add MBa93xxLA-MINI Alexander Stein @ 2026-03-17 11:17 ` Alexander Stein 2026-03-17 12:10 ` Krzysztof Kozlowski ` (2 more replies) 2026-03-17 11:17 ` [PATCH 3/3] arm64: dts: freescale: imx93-tqma9352-mba93xxla-mini: Add WLAN/BT overlay Alexander Stein 2 siblings, 3 replies; 16+ messages in thread From: Alexander Stein @ 2026-03-17 11:17 UTC (permalink / raw) To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Frank Li, Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam, Shawn Guo Cc: Martin Schmiedel, devicetree, linux-kernel, imx, linux-arm-kernel, linux, Alexander Stein From: Martin Schmiedel <Martin.Schmiedel@tq-group.com> This adds support for TQMa93xx module attached to MBa93xxLA-MINI board. TQMa93xx is a SOM series using i.MX93 SOC. The MBa93xxLA-MINI has a small form factor and is designed with WLAN, Bluetooth and WWAN applications in mind. Signed-off-by: Martin Schmiedel <Martin.Schmiedel@tq-group.com> Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com> --- arch/arm64/boot/dts/freescale/Makefile | 1 + .../imx93-tqma9352-mba93xxla-mini.dts | 637 ++++++++++++++++++ 2 files changed, 638 insertions(+) create mode 100644 arch/arm64/boot/dts/freescale/imx93-tqma9352-mba93xxla-mini.dts diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile index 31bc80586c682..db536522600ac 100644 --- a/arch/arm64/boot/dts/freescale/Makefile +++ b/arch/arm64/boot/dts/freescale/Makefile @@ -461,6 +461,7 @@ dtb-$(CONFIG_ARCH_MXC) += imx93-phycore-rpmsg.dtb dtb-$(CONFIG_ARCH_MXC) += imx93-tqma9352-mba91xxca.dtb dtb-$(CONFIG_ARCH_MXC) += imx93-tqma9352-mba93xxca.dtb dtb-$(CONFIG_ARCH_MXC) += imx93-tqma9352-mba93xxla.dtb +dtb-$(CONFIG_ARCH_MXC) += imx93-tqma9352-mba93xxla-mini.dtb imx93-tqma9352-mba91xxca-lvds-tm070jvhg33-dtbs := imx93-tqma9352-mba91xxca.dtb imx93-tqma9352-mba91xxca-lvds-tm070jvhg33.dtbo imx93-tqma9352-mba91xxca-rgb-cdtech-dc44-dtbs := imx93-tqma9352-mba91xxca.dtb imx93-tqma9352-mba91xxca-rgb-cdtech-dc44.dtbo diff --git a/arch/arm64/boot/dts/freescale/imx93-tqma9352-mba93xxla-mini.dts b/arch/arm64/boot/dts/freescale/imx93-tqma9352-mba93xxla-mini.dts new file mode 100644 index 0000000000000..97693aa5e904d --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx93-tqma9352-mba93xxla-mini.dts @@ -0,0 +1,637 @@ +// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT) +/* + * Copyright (c) 2025-2026 TQ-Systems GmbH <linux@ew.tq-group.com>, + * D-82229 Seefeld, Germany. + * Author: Martin Schmiedel + */ +/dts-v1/; + +#include <dt-bindings/input/input.h> +#include <dt-bindings/leds/common.h> +#include <dt-bindings/net/ti-dp83867.h> +#include <dt-bindings/pwm/pwm.h> +#include <dt-bindings/usb/pd.h> +#include "imx93-tqma9352.dtsi" + +/{ + model = "TQ-Systems i.MX93 TQMa93xxLA on MBa93xxLA-MINI SBC"; + compatible = "tq,imx93-tqma9352-mba93xxla-mini", + "tq,imx93-tqma9352", "fsl,imx93"; + chassis-type = "embedded"; + + chosen { + stdout-path = &lpuart1; + }; + + aliases { + eeprom0 = &eeprom0; + ethernet0 = &eqos; + ethernet1 = &fec; + gpio0 = &gpio1; + gpio1 = &gpio2; + gpio2 = &gpio3; + gpio3 = &gpio4; + i2c0 = &lpi2c1; + i2c1 = &lpi2c2; + i2c2 = &lpi2c3; + i2c3 = &lpi2c4; + i2c4 = &lpi2c5; + mmc0 = &usdhc1; + mmc1 = &usdhc2; + mmc2 = &usdhc3; + rtc0 = &pcf85063; + rtc1 = &bbnsm_rtc; + serial0 = &lpuart1; + serial1 = &lpuart2; + serial2 = &lpuart3; + serial3 = &lpuart4; + serial4 = &lpuart5; + serial5 = &lpuart6; + serial6 = &lpuart7; + serial7 = &lpuart8; + spi0 = &lpspi1; + spi1 = &lpspi2; + spi2 = &lpspi3; + spi3 = &lpspi4; + spi4 = &lpspi5; + spi5 = &lpspi6; + }; + + backlight_lvds: backlight { + compatible = "pwm-backlight"; + pwms = <&tpm5 0 5000000 0>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_backlight>; + brightness-levels = <0 4 8 16 32 64 128 255>; + default-brightness-level = <7>; + power-supply = <®_12v0>; + enable-gpios = <&gpio2 5 GPIO_ACTIVE_HIGH>; + status = "disabled"; + }; + + display: display { + /* + * Display is not fixed, so compatible has to be added from + * DT overlay + */ + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_display>; + power-supply = <®_3v3>; + enable-gpios = <&gpio2 7 GPIO_ACTIVE_HIGH>; + backlight = <&backlight_lvds>; + status = "disabled"; + + port { + panel_in_lvds0: endpoint { + }; + }; + }; + + iio-hwmon { + compatible = "iio-hwmon"; + io-channels = <&adc1 0>, <&adc1 1>, <&adc1 2>, <&adc1 3>; + }; + + reg_3v3: regulator-3v3 { + compatible = "regulator-fixed"; + regulator-name = "V_3V3_MB"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + + reg_5v0_usb: regulator-5v0-usb { + compatible = "regulator-fixed"; + regulator-name = "V_5V0_HUB"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&expander1 0 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + + reg_12v0: regulator-12v0 { + compatible = "regulator-fixed"; + regulator-name = "V_12V"; + regulator-min-microvolt = <12000000>; + regulator-max-microvolt = <12000000>; + gpio = <&expander0 7 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; +}; + +&adc1 { + status = "okay"; +}; + +&eqos { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_eqos>; + phy-mode = "rgmii-id"; + phy-handle = <ðphy_eqos>; + status = "okay"; + + mdio { + compatible = "snps,dwmac-mdio"; + #address-cells = <1>; + #size-cells = <0>; + + ethphy_eqos: ethernet-phy@0 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <0>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_eqos_phy>; + interrupt-parent = <&gpio3>; + interrupts = <26 IRQ_TYPE_EDGE_FALLING>; + reset-gpios = <&expander0 0 GPIO_ACTIVE_LOW>; + reset-assert-us = <500000>; + reset-deassert-us = <50000>; + enet-phy-lane-no-swap; + ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_25_NS>; + ti,tx-internal-delay = <DP83867_RGMIIDCTL_2_25_NS>; + ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>; + ti,dp83867-rxctrl-strap-quirk; + ti,clk-output-sel = <DP83867_CLK_O_SEL_OFF>; + }; + }; +}; + +&fec { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_fec>; + phy-mode = "rgmii-id"; + phy-handle = <ðphy_fec>; + fsl,magic-packet; + status = "okay"; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + clock-frequency = <5000000>; + + ethphy_fec: ethernet-phy@0 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <0>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_fec_phy>; + interrupt-parent = <&gpio3>; + interrupts = <27 IRQ_TYPE_EDGE_FALLING>; + reset-gpios = <&expander0 1 GPIO_ACTIVE_LOW>; + reset-assert-us = <500000>; + reset-deassert-us = <50000>; + enet-phy-lane-no-swap; + ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_25_NS>; + ti,tx-internal-delay = <DP83867_RGMIIDCTL_2_25_NS>; + ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>; + ti,dp83867-rxctrl-strap-quirk; + ti,clk-output-sel = <DP83867_CLK_O_SEL_OFF>; + }; + }; +}; + +&flexcan1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_flexcan1>; + status = "okay"; +}; + +&flexcan2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_flexcan2>; + status = "okay"; +}; + +/* deactivated because pins are used for SDIO */ +&flexspi1 { + status = "disabled"; +}; + +&gpio1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_m2_key_b>, <&pinctrl_m2_key_e>; + + gpio-line-names = + /* 00 */ "", "", "M2_KEYE_ALERT#", "", + /* 04 */ "", "", "M2_KEYE_UART_WAKE#", "BM1_M2_KEYE_SDIO_WAKE#", + /* 08 */ "", "", "", "BM2_M2_KEYE_SDIO_RST#", + /* 12 */ "M2_KEYB_WOWWAN#", "BM3_M2_KEYB_PEWAKE#", "", "", + /* 16 */ "", "", "", "", + /* 20 */ "", "", "", "", + /* 24 */ "", "", "", "", + /* 28 */ "", "", "", ""; +}; + +&gpio2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gpio2>; + + gpio-line-names = + /* 00 */ "", "", "", "", + /* 04 */ "LVDS_RESET#", "LVDS_BLT_EN", "", "LVDS_PWR_EN", + /* 08 */ "", "", "", "", + /* 12 */ "", "", "", "", + /* 16 */ "X1_9", "X1_19", "X1_15", "X1_11", + /* 20 */ "X1_13", "X1_7", "", "CAM_TRIGGER", + /* 24 */ "CAM_SYNC", "", "X1_5", "", + /* 28 */ "", "", "", ""; +}; + +&gpio4 { + gpio-line-names = + /* 00 */ "", "", "", "", + /* 04 */ "", "", "", "", + /* 08 */ "", "", "", "", + /* 12 */ "", "", "", "", + /* 16 */ "", "", "", "", + /* 20 */ "", "", "", "", + /* 24 */ "", "", "", "", + /* 28 */ "", "DSI_GPIO", "", ""; +}; + +&lpi2c3 { + #address-cells = <1>; + #size-cells = <0>; + clock-frequency = <400000>; + pinctrl-names = "default", "gpio"; + pinctrl-0 = <&pinctrl_lpi2c3>; + pinctrl-1 = <&pinctrl_lpi2c3_gpio>; + scl-gpios = <&gpio2 29 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + sda-gpios = <&gpio2 28 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + status = "okay"; + + expander0: gpio@70 { + compatible = "nxp,pca9538"; + reg = <0x70>; + gpio-controller; + #gpio-cells = <2>; + vcc-supply = <®_3v3>; + gpio-line-names = "ENET1_RESET#", "ENET2_RESET#", + "M2_KEYE_PERST#", "M2_KEYB_PERST#", + "M2_KEYE_W_DISABLE1#", "M2_KEYE_W_DISABLE2#", + "M2_KEYA_W_DISABLE1#", "12V_EN"; + }; + + expander1: gpio@71 { + compatible = "nxp,pca9538"; + reg = <0x71>; + gpio-controller; + #gpio-cells = <2>; + vcc-supply = <®_3v3>; + gpio-line-names = "USB_HUB_PWR", "DSI_RST#", + "CAM_PWR#", "CAMRST#", + "M2_KEYB_FULL_CARD_PWR_OFF#", "M2_KEYB_W_DISABLE2#", + "M2_KEYB_RST#", "M2_KEYB_DPR"; + + /* + * Controls the LTE card FULL_CARD_PWR_OFF pin which is low active + * as power down signal. The output-low states, the signal + * is inactive, e.g. not power down + */ + full-card-power-off-hog { + gpio-hog; + gpios = <4 GPIO_ACTIVE_LOW>; + output-low; + line-name = "M2_KEYB_FULL_CARD_PWR_OFF#"; + }; + + /* + * Controls the LTE card reset pin which is low active + * as reset signal. The output-low states, the signal + * is inactive, e.g. not in reset + */ + wlan-perst-hog { + gpio-hog; + gpios = <6 GPIO_ACTIVE_LOW>; + output-low; + line-name = "M2_KEYB_RST#"; + }; + }; +}; + +&lpspi6 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_lpspi6>, <&pinctrl_lpspi6_cs>; + cs-gpios = <&gpio2 0 GPIO_ACTIVE_LOW>; + status = "okay"; +}; + +&lpuart1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart1>; + status = "okay"; +}; + +/* disabled per default, console for M33 */ +&lpuart3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart3>; + status = "disabled"; +}; + +/* disabled per default, used for bluetooth on M.2 slot */ +&lpuart7 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart7>; + uart-has-rtscts; + status = "disabled"; +}; + +&lpuart8 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart8>; + status = "okay"; +}; + +&pcf85063 { + /* RTC_EVENT# from SoM is connected on mainboard */ + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pcf85063>; + interrupt-parent = <&gpio1>; + interrupts = <14 IRQ_TYPE_EDGE_FALLING>; +}; + +&tpm5 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_tpm5>; +}; + +&usbotg1 { + disable-over-current; + dr_mode = "peripheral"; + samsung,picophy-pre-emp-curr-control = <3>; + samsung,picophy-dc-vol-level-adjust = <7>; + status = "okay"; +}; + +&usbotg2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usbhub>; + #address-cells = <1>; + #size-cells = <0>; + disable-over-current; + dr_mode = "host"; + vbus-supply = <®_5v0_usb>; + samsung,picophy-pre-emp-curr-control = <3>; + samsung,picophy-dc-vol-level-adjust = <7>; + status = "okay"; + + hub_2_0: usb-hub@1 { + compatible = "usb424,2517"; + reg = <1>; + reset-gpios = <&gpio2 22 GPIO_ACTIVE_LOW>; + vdd-supply = <®_3v3>; + }; +}; + +&usdhc2 { + pinctrl-names = "default", "state_100mhz", "state_200mhz"; + pinctrl-0 = <&pinctrl_usdhc2_hs>, <&pinctrl_usdhc2_gpio>; + pinctrl-1 = <&pinctrl_usdhc2_uhs>, <&pinctrl_usdhc2_gpio>; + pinctrl-2 = <&pinctrl_usdhc2_uhs>, <&pinctrl_usdhc2_gpio>; + bus-width = <4>; + cd-gpios = <&gpio3 0 GPIO_ACTIVE_LOW>; + disable-wp; + no-sdio; + no-mmc; + vmmc-supply = <®_usdhc2_vmmc>; + status = "okay"; +}; + +&usdhc3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc3>; + bus-width = <4>; + non-removable; + vmmc-supply = <®_3v3>; +}; + +&iomuxc { + pinctrl_backlight: backlightgrp { + fsl,pins = /* HYS | PD | FSEL_2 | DSE X4 */ + <MX93_PAD_GPIO_IO05__GPIO2_IO05 0x011e>; + }; + + pinctrl_display: displaygrp { + fsl,pins = /* HYS | PD | FSEL_2 | DSE X4 */ + <MX93_PAD_GPIO_IO07__GPIO2_IO07 0x011e>; + }; + + pinctrl_eqos: eqosgrp { + fsl,pins = /* PD | FSEL_2 | DSE X4 */ + <MX93_PAD_ENET1_MDC__ENET_QOS_MDC 0x51e>, + /* SION | HYS | FSEL_2 | DSE X4 */ + <MX93_PAD_ENET1_MDIO__ENET_QOS_MDIO 0x4000111e>, + /* HYS | FSEL_0 | DSE no drive */ + <MX93_PAD_ENET1_RD0__ENET_QOS_RGMII_RD0 0x1000>, + <MX93_PAD_ENET1_RD1__ENET_QOS_RGMII_RD1 0x1000>, + <MX93_PAD_ENET1_RD2__ENET_QOS_RGMII_RD2 0x1000>, + <MX93_PAD_ENET1_RD3__ENET_QOS_RGMII_RD3 0x1000>, + <MX93_PAD_ENET1_RX_CTL__ENET_QOS_RGMII_RX_CTL 0x1000>, + /* HYS | PD | FSEL_0 | DSE no drive */ + <MX93_PAD_ENET1_RXC__CCM_ENET_QOS_CLOCK_GENERATE_RX_CLK 0x1400>, + /* PD | FSEL_2 | DSE X5 */ + <MX93_PAD_ENET1_TD0__ENET_QOS_RGMII_TD0 0x53e>, + <MX93_PAD_ENET1_TD1__ENET_QOS_RGMII_TD1 0x53e>, + <MX93_PAD_ENET1_TD2__ENET_QOS_RGMII_TD2 0x53e>, + <MX93_PAD_ENET1_TD3__ENET_QOS_RGMII_TD3 0x53e>, + <MX93_PAD_ENET1_TX_CTL__ENET_QOS_RGMII_TX_CTL 0x53e>, + /* PD | FSEL_3 | DSE X4 */ + <MX93_PAD_ENET1_TXC__CCM_ENET_QOS_CLOCK_GENERATE_TX_CLK 0x59e>; + }; + + pinctrl_eqos_phy: eqosphygrp { + fsl,pins = /* HYS | FSEL_0 | DSE no drive */ + <MX93_PAD_CCM_CLKO1__GPIO3_IO26 0x1000>; + }; + + pinctrl_fec: fecgrp { + fsl,pins = /* PD | FSEL_2 | DSE X4 */ + <MX93_PAD_ENET2_MDC__ENET1_MDC 0x51e>, + /* SION | HYS | FSEL_2 | DSE X4 */ + <MX93_PAD_ENET2_MDIO__ENET1_MDIO 0x4000111e>, + /* HYS | FSEL_0 | DSE no drive */ + <MX93_PAD_ENET2_RD0__ENET1_RGMII_RD0 0x1000>, + <MX93_PAD_ENET2_RD1__ENET1_RGMII_RD1 0x1000>, + <MX93_PAD_ENET2_RD2__ENET1_RGMII_RD2 0x1000>, + <MX93_PAD_ENET2_RD3__ENET1_RGMII_RD3 0x1000>, + <MX93_PAD_ENET2_RX_CTL__ENET1_RGMII_RX_CTL 0x1000>, + /* HYS | PD | FSEL_0 | DSE no drive */ + <MX93_PAD_ENET2_RXC__ENET1_RGMII_RXC 0x1400>, + /* PD | FSEL_2 | DSE X5 */ + <MX93_PAD_ENET2_TD0__ENET1_RGMII_TD0 0x53e>, + <MX93_PAD_ENET2_TD1__ENET1_RGMII_TD1 0x53e>, + <MX93_PAD_ENET2_TD2__ENET1_RGMII_TD2 0x53e>, + <MX93_PAD_ENET2_TD3__ENET1_RGMII_TD3 0x53e>, + <MX93_PAD_ENET2_TX_CTL__ENET1_RGMII_TX_CTL 0x53e>, + /* PD | FSEL_3 | DSE X4 */ + <MX93_PAD_ENET2_TXC__ENET1_RGMII_TXC 0x59e>; + }; + + pinctrl_fec_phy: fecphygrp { + fsl,pins = /* HYS | FSEL_0 | DSE no drive */ + <MX93_PAD_CCM_CLKO2__GPIO3_IO27 0x1000>; + }; + + pinctrl_flexcan1: flexcan1grp { + fsl,pins = /* HYS | PU | FSEL_0 | DSE no drive */ + <MX93_PAD_PDM_BIT_STREAM0__CAN1_RX 0x1200>, + /* PU | FSEL_3 | DSE X4 */ + <MX93_PAD_PDM_CLK__CAN1_TX 0x039e>; + }; + + pinctrl_flexcan2: flexcan2grp { + fsl,pins = /* HYS | PU | FSEL_0 | DSE no drive */ + <MX93_PAD_GPIO_IO27__CAN2_RX 0x1200>, + /* PU | FSEL_3 | DSE X4 */ + <MX93_PAD_GPIO_IO25__CAN2_TX 0x039e>; + }; + + pinctrl_gpio2: gpio2grp { + fsl,pins = /* HYS | PD | FSEL_2 | DSE X4 */ + <MX93_PAD_GPIO_IO16__GPIO2_IO16 0x151e>, + <MX93_PAD_GPIO_IO17__GPIO2_IO17 0x151e>, + <MX93_PAD_GPIO_IO18__GPIO2_IO18 0x151e>, + <MX93_PAD_GPIO_IO19__GPIO2_IO19 0x151e>, + <MX93_PAD_GPIO_IO20__GPIO2_IO20 0x151e>, + <MX93_PAD_GPIO_IO21__GPIO2_IO21 0x151e>, + <MX93_PAD_GPIO_IO26__GPIO2_IO26 0x151e>; + }; + + pinctrl_jtag: jtaggrp { + fsl,pins = <MX93_PAD_DAP_TCLK_SWCLK__JTAG_MUX_TCK 0x051e>, + <MX93_PAD_DAP_TDI__JTAG_MUX_TDI 0x1200>, + <MX93_PAD_DAP_TDO_TRACESWO__JTAG_MUX_TDO 0x031e>, + <MX93_PAD_DAP_TMS_SWDIO__JTAG_MUX_TMS 0x1200>; + }; + + pinctrl_lpi2c3: lpi2c3grp { + fsl,pins = /* SION | HYS | OD | FSEL_3 | DSE X4 */ + <MX93_PAD_GPIO_IO28__LPI2C3_SDA 0x4000199e>, + <MX93_PAD_GPIO_IO29__LPI2C3_SCL 0x4000199e>; + }; + + pinctrl_lpi2c3_gpio: lpi2c3-gpiogrp { + fsl,pins = /* SION | HYS | OD | FSEL_3 | DSE X4 */ + <MX93_PAD_GPIO_IO28__GPIO2_IO28 0x4000199e>, + <MX93_PAD_GPIO_IO29__GPIO2_IO29 0x4000199e>; + }; + + pinctrl_lpspi6: lpspi6grp { + fsl,pins = /* HYS | PD | FSEL_0 | DSE no drive */ + <MX93_PAD_GPIO_IO01__LPSPI6_SIN 0x1400>, + /* PD | FSEL_2 | DSE X4 */ + <MX93_PAD_GPIO_IO02__LPSPI6_SOUT 0x051e>, + <MX93_PAD_GPIO_IO03__LPSPI6_SCK 0x051e>; + }; + + pinctrl_lpspi6_cs: lpspi6csgrp { + fsl,pins = /* FSEL_2 | DSE X4 */ + <MX93_PAD_GPIO_IO00__GPIO2_IO00 0x011e>; + }; + + pinctrl_m2_key_b: m2keybgrp { + fsl,pins = <MX93_PAD_SAI1_TXC__GPIO1_IO12 0x00001000>, + <MX93_PAD_SAI1_TXD0__GPIO1_IO13 0x00001000>; + }; + + pinctrl_m2_key_e: m2keyegrp { + fsl,pins = <MX93_PAD_I2C2_SCL__GPIO1_IO02 0x00001000>, + <MX93_PAD_UART2_RXD__GPIO1_IO06 0x00001000>, + <MX93_PAD_UART2_TXD__GPIO1_IO07 0x00001000>, + <MX93_PAD_SAI1_TXFS__GPIO1_IO11 0x00001000>; + }; + + /*CAM_MCLK, DSI_GPIO, CAM_TRIGGER, CAM_SYNC*/ + pinctrl_mipi_csi_dsi: mipi_csi_dsigrp { + fsl,pins = <MX93_PAD_CCM_CLKO3__CCMSRCGPCMIX_CLKO3 0x0000011e>, + <MX93_PAD_CCM_CLKO4__GPIO4_IO29 0x0000011e>, + <MX93_PAD_GPIO_IO23__GPIO2_IO23 0x0000011e>, + <MX93_PAD_GPIO_IO24__GPIO2_IO24 0x0000111e>; + }; + + pinctrl_pcf85063: pcf85063grp { + fsl,pins = /* HYS | FSEL_0 | No DSE */ + <MX93_PAD_SAI1_RXD0__GPIO1_IO14 0x1000>; + }; + + pinctrl_tpm5: tpm5grp { + fsl,pins = <MX93_PAD_GPIO_IO06__TPM5_CH0 0x57e>; + }; + + pinctrl_uart1: uart1grp { + fsl,pins = /* HYS | FSEL_0 | No DSE */ + <MX93_PAD_UART1_RXD__LPUART1_RX 0x1000>, + /* FSEL_2 | DSE X4 */ + <MX93_PAD_UART1_TXD__LPUART1_TX 0x011e>; + }; + + pinctrl_uart3: uart3grp { + fsl,pins = /* HYS | FSEL_0 | No DSE */ + <MX93_PAD_GPIO_IO15__LPUART3_RX 0x1000>, + /* FSEL_2 | DSE X4 */ + <MX93_PAD_GPIO_IO14__LPUART3_TX 0x011e>; + }; + + pinctrl_uart7: uart7grp { + fsl,pins = <MX93_PAD_GPIO_IO08__LPUART7_TX 0x031e>, + <MX93_PAD_GPIO_IO09__LPUART7_RX 0x031e>, + <MX93_PAD_GPIO_IO10__LPUART7_CTS_B 0x031e>, + <MX93_PAD_GPIO_IO11__LPUART7_RTS_B 0x031e>; + }; + + pinctrl_uart8: uart8grp { + fsl,pins = /* HYS | FSEL_0 | No DSE */ + <MX93_PAD_GPIO_IO13__LPUART8_RX 0x1000>, + /* FSEL_2 | DSE X4 */ + <MX93_PAD_GPIO_IO12__LPUART8_TX 0x011e>; + }; + + pinctrl_usbhub: usbhubgrp { + fsl,pins = /* HYS | PD | FSEL_2 | DSE X4 */ + <MX93_PAD_GPIO_IO22__GPIO2_IO22 0x151e>; + }; + + pinctrl_usdhc2_gpio: usdhc2gpiogrp { + fsl,pins = /* HYS | FSEL_0 | No DSE */ + <MX93_PAD_SD2_CD_B__GPIO3_IO00 0x1000>; + }; + + /* enable SION for data and cmd pad due to ERR052021 */ + pinctrl_usdhc2_hs: usdhc2hsgrp { + fsl,pins = /* PD | FSEL_3 | DSE X5 */ + <MX93_PAD_SD2_CLK__USDHC2_CLK 0x05be>, + /* HYS | PU | FSEL_3 | DSE X4 */ + <MX93_PAD_SD2_CMD__USDHC2_CMD 0x4000139e>, + /* HYS | PU | FSEL_3 | DSE X3 */ + <MX93_PAD_SD2_DATA0__USDHC2_DATA0 0x4000138e>, + <MX93_PAD_SD2_DATA1__USDHC2_DATA1 0x4000138e>, + <MX93_PAD_SD2_DATA2__USDHC2_DATA2 0x4000138e>, + <MX93_PAD_SD2_DATA3__USDHC2_DATA3 0x4000138e>, + /* FSEL_2 | DSE X3 */ + <MX93_PAD_SD2_VSELECT__USDHC2_VSELECT 0x010e>; + }; + + /* enable SION for data and cmd pad due to ERR052021 */ + pinctrl_usdhc2_uhs: usdhc2uhsgrp { + fsl,pins = /* PD | FSEL_3 | DSE X6 */ + <MX93_PAD_SD2_CLK__USDHC2_CLK 0x05fe>, + /* HYS | PU | FSEL_3 | DSE X4 */ + <MX93_PAD_SD2_CMD__USDHC2_CMD 0x4000139e>, + <MX93_PAD_SD2_DATA0__USDHC2_DATA0 0x4000139e>, + <MX93_PAD_SD2_DATA1__USDHC2_DATA1 0x4000139e>, + <MX93_PAD_SD2_DATA2__USDHC2_DATA2 0x4000139e>, + <MX93_PAD_SD2_DATA3__USDHC2_DATA3 0x4000139e>, + /* FSEL_2 | DSE X3 */ + <MX93_PAD_SD2_VSELECT__USDHC2_VSELECT 0x010e>; + }; + + /* enable SION for data and cmd pad due to ERR052021 */ + pinctrl_usdhc3: usdhc3grp { + fsl,pins = /* PD | FSEL_3 | DSE X6 */ + <MX93_PAD_SD3_CLK__USDHC3_CLK 0x05fe>, + /* HYS | PU | FSEL_3 | DSE X4 */ + <MX93_PAD_SD3_CMD__USDHC3_CMD 0x4000139e>, + <MX93_PAD_SD3_DATA0__USDHC3_DATA0 0x4000139e>, + <MX93_PAD_SD3_DATA1__USDHC3_DATA1 0x4000139e>, + <MX93_PAD_SD3_DATA2__USDHC3_DATA2 0x4000139e>, + <MX93_PAD_SD3_DATA3__USDHC3_DATA3 0x4000139e>; + }; +}; -- 2.43.0 ^ permalink raw reply related [flat|nested] 16+ messages in thread
* Re: [PATCH 2/3] arm64: dts: freescale: add initial device tree for TQMa93xx/MBa93xxLA-MINI 2026-03-17 11:17 ` [PATCH 2/3] arm64: dts: freescale: add initial device tree for TQMa93xx/MBa93xxLA-MINI Alexander Stein @ 2026-03-17 12:10 ` Krzysztof Kozlowski 2026-03-17 12:14 ` Alexander Stein 2026-03-18 14:49 ` Andrew Lunn 2026-03-19 14:01 ` Frank Li 2 siblings, 1 reply; 16+ messages in thread From: Krzysztof Kozlowski @ 2026-03-17 12:10 UTC (permalink / raw) To: Alexander Stein, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Frank Li, Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam, Shawn Guo Cc: Martin Schmiedel, devicetree, linux-kernel, imx, linux-arm-kernel, linux On 17/03/2026 12:17, Alexander Stein wrote: > From: Martin Schmiedel <Martin.Schmiedel@tq-group.com> > > This adds support for TQMa93xx module attached to MBa93xxLA-MINI board. Please do not use "This commit/patch/change", but imperative mood. See longer explanation here: https://elixir.bootlin.com/linux/v6.16/source/Documentation/process/submitting-patches.rst#L94 > TQMa93xx is a SOM series using i.MX93 SOC. > The MBa93xxLA-MINI has a small form factor and is designed with > WLAN, Bluetooth and WWAN applications in mind. > > Signed-off-by: Martin Schmiedel <Martin.Schmiedel@tq-group.com> > Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com> > --- > arch/arm64/boot/dts/freescale/Makefile | 1 + > .../imx93-tqma9352-mba93xxla-mini.dts | 637 ++++++++++++++++++ > 2 files changed, 638 insertions(+) > create mode 100644 arch/arm64/boot/dts/freescale/imx93-tqma9352-mba93xxla-mini.dts > > diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile > index 31bc80586c682..db536522600ac 100644 > --- a/arch/arm64/boot/dts/freescale/Makefile > +++ b/arch/arm64/boot/dts/freescale/Makefile > @@ -461,6 +461,7 @@ dtb-$(CONFIG_ARCH_MXC) += imx93-phycore-rpmsg.dtb > dtb-$(CONFIG_ARCH_MXC) += imx93-tqma9352-mba91xxca.dtb > dtb-$(CONFIG_ARCH_MXC) += imx93-tqma9352-mba93xxca.dtb > dtb-$(CONFIG_ARCH_MXC) += imx93-tqma9352-mba93xxla.dtb > +dtb-$(CONFIG_ARCH_MXC) += imx93-tqma9352-mba93xxla-mini.dtb > > imx93-tqma9352-mba91xxca-lvds-tm070jvhg33-dtbs := imx93-tqma9352-mba91xxca.dtb imx93-tqma9352-mba91xxca-lvds-tm070jvhg33.dtbo > imx93-tqma9352-mba91xxca-rgb-cdtech-dc44-dtbs := imx93-tqma9352-mba91xxca.dtb imx93-tqma9352-mba91xxca-rgb-cdtech-dc44.dtbo > diff --git a/arch/arm64/boot/dts/freescale/imx93-tqma9352-mba93xxla-mini.dts b/arch/arm64/boot/dts/freescale/imx93-tqma9352-mba93xxla-mini.dts > new file mode 100644 > index 0000000000000..97693aa5e904d > --- /dev/null > +++ b/arch/arm64/boot/dts/freescale/imx93-tqma9352-mba93xxla-mini.dts > @@ -0,0 +1,637 @@ > +// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT) > +/* > + * Copyright (c) 2025-2026 TQ-Systems GmbH <linux@ew.tq-group.com>, > + * D-82229 Seefeld, Germany. > + * Author: Martin Schmiedel > + */ > +/dts-v1/; > + > +#include <dt-bindings/input/input.h> > +#include <dt-bindings/leds/common.h> > +#include <dt-bindings/net/ti-dp83867.h> > +#include <dt-bindings/pwm/pwm.h> > +#include <dt-bindings/usb/pd.h> > +#include "imx93-tqma9352.dtsi" > + > +/{ > + model = "TQ-Systems i.MX93 TQMa93xxLA on MBa93xxLA-MINI SBC"; > + compatible = "tq,imx93-tqma9352-mba93xxla-mini", > + "tq,imx93-tqma9352", "fsl,imx93"; > + chassis-type = "embedded"; > + > + chosen { > + stdout-path = &lpuart1; > + }; > + > + aliases { > + eeprom0 = &eeprom0; > + ethernet0 = &eqos; > + ethernet1 = &fec; > + gpio0 = &gpio1; > + gpio1 = &gpio2; > + gpio2 = &gpio3; > + gpio3 = &gpio4; > + i2c0 = &lpi2c1; > + i2c1 = &lpi2c2; > + i2c2 = &lpi2c3; > + i2c3 = &lpi2c4; > + i2c4 = &lpi2c5; > + mmc0 = &usdhc1; > + mmc1 = &usdhc2; > + mmc2 = &usdhc3; > + rtc0 = &pcf85063; > + rtc1 = &bbnsm_rtc; > + serial0 = &lpuart1; > + serial1 = &lpuart2; > + serial2 = &lpuart3; > + serial3 = &lpuart4; > + serial4 = &lpuart5; > + serial5 = &lpuart6; > + serial6 = &lpuart7; > + serial7 = &lpuart8; > + spi0 = &lpspi1; > + spi1 = &lpspi2; > + spi2 = &lpspi3; > + spi3 = &lpspi4; > + spi4 = &lpspi5; > + spi5 = &lpspi6; > + }; > + > + backlight_lvds: backlight { > + compatible = "pwm-backlight"; > + pwms = <&tpm5 0 5000000 0>; > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_backlight>; > + brightness-levels = <0 4 8 16 32 64 128 255>; > + default-brightness-level = <7>; > + power-supply = <®_12v0>; > + enable-gpios = <&gpio2 5 GPIO_ACTIVE_HIGH>; > + status = "disabled"; Why do you add disabled nodes? If the display is not on the board, then the node should not be here. There is no user of that in patch 3/3, either. Best regards, Krzysztof ^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH 2/3] arm64: dts: freescale: add initial device tree for TQMa93xx/MBa93xxLA-MINI 2026-03-17 12:10 ` Krzysztof Kozlowski @ 2026-03-17 12:14 ` Alexander Stein 0 siblings, 0 replies; 16+ messages in thread From: Alexander Stein @ 2026-03-17 12:14 UTC (permalink / raw) To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Frank Li, Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam, Shawn Guo, Krzysztof Kozlowski Cc: Martin Schmiedel, devicetree, linux-kernel, imx, linux-arm-kernel, linux Hi, Am Dienstag, 17. März 2026, 13:10:06 CET schrieb Krzysztof Kozlowski: > On 17/03/2026 12:17, Alexander Stein wrote: > > From: Martin Schmiedel <Martin.Schmiedel@tq-group.com> > > > > This adds support for TQMa93xx module attached to MBa93xxLA-MINI board. > > > Please do not use "This commit/patch/change", but imperative mood. See > longer explanation here: > https://elixir.bootlin.com/linux/v6.16/source/Documentation/process/submitting-patches.rst#L94 Sure, will do in v2. Thanks. > > TQMa93xx is a SOM series using i.MX93 SOC. > > The MBa93xxLA-MINI has a small form factor and is designed with > > WLAN, Bluetooth and WWAN applications in mind. > > > > Signed-off-by: Martin Schmiedel <Martin.Schmiedel@tq-group.com> > > Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com> > > --- > > arch/arm64/boot/dts/freescale/Makefile | 1 + > > .../imx93-tqma9352-mba93xxla-mini.dts | 637 ++++++++++++++++++ > > 2 files changed, 638 insertions(+) > > create mode 100644 arch/arm64/boot/dts/freescale/imx93-tqma9352-mba93xxla-mini.dts > > > > diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile > > index 31bc80586c682..db536522600ac 100644 > > --- a/arch/arm64/boot/dts/freescale/Makefile > > +++ b/arch/arm64/boot/dts/freescale/Makefile > > @@ -461,6 +461,7 @@ dtb-$(CONFIG_ARCH_MXC) += imx93-phycore-rpmsg.dtb > > dtb-$(CONFIG_ARCH_MXC) += imx93-tqma9352-mba91xxca.dtb > > dtb-$(CONFIG_ARCH_MXC) += imx93-tqma9352-mba93xxca.dtb > > dtb-$(CONFIG_ARCH_MXC) += imx93-tqma9352-mba93xxla.dtb > > +dtb-$(CONFIG_ARCH_MXC) += imx93-tqma9352-mba93xxla-mini.dtb > > > > imx93-tqma9352-mba91xxca-lvds-tm070jvhg33-dtbs := imx93-tqma9352-mba91xxca.dtb imx93-tqma9352-mba91xxca-lvds-tm070jvhg33.dtbo > > imx93-tqma9352-mba91xxca-rgb-cdtech-dc44-dtbs := imx93-tqma9352-mba91xxca.dtb imx93-tqma9352-mba91xxca-rgb-cdtech-dc44.dtbo > > diff --git a/arch/arm64/boot/dts/freescale/imx93-tqma9352-mba93xxla-mini.dts b/arch/arm64/boot/dts/freescale/imx93-tqma9352-mba93xxla-mini.dts > > new file mode 100644 > > index 0000000000000..97693aa5e904d > > --- /dev/null > > +++ b/arch/arm64/boot/dts/freescale/imx93-tqma9352-mba93xxla-mini.dts > > @@ -0,0 +1,637 @@ > > +// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT) > > +/* > > + * Copyright (c) 2025-2026 TQ-Systems GmbH <linux@ew.tq-group.com>, > > + * D-82229 Seefeld, Germany. > > + * Author: Martin Schmiedel > > + */ > > +/dts-v1/; > > + > > +#include <dt-bindings/input/input.h> > > +#include <dt-bindings/leds/common.h> > > +#include <dt-bindings/net/ti-dp83867.h> > > +#include <dt-bindings/pwm/pwm.h> > > +#include <dt-bindings/usb/pd.h> > > +#include "imx93-tqma9352.dtsi" > > + > > +/{ > > + model = "TQ-Systems i.MX93 TQMa93xxLA on MBa93xxLA-MINI SBC"; > > + compatible = "tq,imx93-tqma9352-mba93xxla-mini", > > + "tq,imx93-tqma9352", "fsl,imx93"; > > + chassis-type = "embedded"; > > + > > + chosen { > > + stdout-path = &lpuart1; > > + }; > > + > > + aliases { > > + eeprom0 = &eeprom0; > > + ethernet0 = &eqos; > > + ethernet1 = &fec; > > + gpio0 = &gpio1; > > + gpio1 = &gpio2; > > + gpio2 = &gpio3; > > + gpio3 = &gpio4; > > + i2c0 = &lpi2c1; > > + i2c1 = &lpi2c2; > > + i2c2 = &lpi2c3; > > + i2c3 = &lpi2c4; > > + i2c4 = &lpi2c5; > > + mmc0 = &usdhc1; > > + mmc1 = &usdhc2; > > + mmc2 = &usdhc3; > > + rtc0 = &pcf85063; > > + rtc1 = &bbnsm_rtc; > > + serial0 = &lpuart1; > > + serial1 = &lpuart2; > > + serial2 = &lpuart3; > > + serial3 = &lpuart4; > > + serial4 = &lpuart5; > > + serial5 = &lpuart6; > > + serial6 = &lpuart7; > > + serial7 = &lpuart8; > > + spi0 = &lpspi1; > > + spi1 = &lpspi2; > > + spi2 = &lpspi3; > > + spi3 = &lpspi4; > > + spi4 = &lpspi5; > > + spi5 = &lpspi6; > > + }; > > + > > + backlight_lvds: backlight { > > + compatible = "pwm-backlight"; > > + pwms = <&tpm5 0 5000000 0>; > > + pinctrl-names = "default"; > > + pinctrl-0 = <&pinctrl_backlight>; > > + brightness-levels = <0 4 8 16 32 64 128 255>; > > + default-brightness-level = <7>; > > + power-supply = <®_12v0>; > > + enable-gpios = <&gpio2 5 GPIO_ACTIVE_HIGH>; > > + status = "disabled"; > > Why do you add disabled nodes? If the display is not on the board, then > the node should not be here. > > There is no user of that in patch 3/3, either. Well, LVDS (via LDB) on i.MX93 is not yet in mainline, patches are pending. So there is no user yet. But the wiring for the backlight and panel is fixed already on the mainboard, e.g. LVDS channels, PWM channels, GPIOs etc. So this node will be enabled on a later display overlay. Right now everything is setup already. Thanks and best regards, Alexander -- TQ-Systems GmbH | Mühlstraße 2, Gut Delling | 82229 Seefeld, Germany Amtsgericht München, HRB 105018 Geschäftsführer: Detlef Schneider, Rüdiger Stahl, Stefan Schneider http://www.tq-group.com/ ^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH 2/3] arm64: dts: freescale: add initial device tree for TQMa93xx/MBa93xxLA-MINI 2026-03-17 11:17 ` [PATCH 2/3] arm64: dts: freescale: add initial device tree for TQMa93xx/MBa93xxLA-MINI Alexander Stein 2026-03-17 12:10 ` Krzysztof Kozlowski @ 2026-03-18 14:49 ` Andrew Lunn 2026-03-19 11:25 ` Alexander Stein 2026-03-19 14:01 ` Frank Li 2 siblings, 1 reply; 16+ messages in thread From: Andrew Lunn @ 2026-03-18 14:49 UTC (permalink / raw) To: Alexander Stein Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Frank Li, Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam, Shawn Guo, Martin Schmiedel, devicetree, linux-kernel, imx, linux-arm-kernel, linux On Tue, Mar 17, 2026 at 12:17:01PM +0100, Alexander Stein wrote: > + mdio { > + compatible = "snps,dwmac-mdio"; > + #address-cells = <1>; > + #size-cells = <0>; > + > + ethphy_eqos: ethernet-phy@0 { > + compatible = "ethernet-phy-ieee802.3-c22"; > + reg = <0>; > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_eqos_phy>; > + interrupt-parent = <&gpio3>; > + interrupts = <26 IRQ_TYPE_EDGE_FALLING>; Hi Alexander Haven't we been here before? EDGE interrupts are generally wrong for PHYs. > + reset-gpios = <&expander0 0 GPIO_ACTIVE_LOW>; > + reset-assert-us = <500000>; > + reset-deassert-us = <50000>; > + enet-phy-lane-no-swap; > + ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_25_NS>; > + ti,tx-internal-delay = <DP83867_RGMIIDCTL_2_25_NS>; > + ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>; > + ti,dp83867-rxctrl-strap-quirk; > + ti,clk-output-sel = <DP83867_CLK_O_SEL_OFF>; > + }; > + }; > +}; > + > +&fec { > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_fec>; > + phy-mode = "rgmii-id"; > + phy-handle = <ðphy_fec>; > + fsl,magic-packet; Has WoL been tested? Andrew ^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH 2/3] arm64: dts: freescale: add initial device tree for TQMa93xx/MBa93xxLA-MINI 2026-03-18 14:49 ` Andrew Lunn @ 2026-03-19 11:25 ` Alexander Stein 2026-03-19 13:30 ` Andrew Lunn 0 siblings, 1 reply; 16+ messages in thread From: Alexander Stein @ 2026-03-19 11:25 UTC (permalink / raw) To: Andrew Lunn Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Frank Li, Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam, Shawn Guo, Martin Schmiedel, devicetree, linux-kernel, imx, linux-arm-kernel, linux Hi Andrew, Am Mittwoch, 18. März 2026, 15:49:38 CET schrieb Andrew Lunn: > On Tue, Mar 17, 2026 at 12:17:01PM +0100, Alexander Stein wrote: > > + mdio { > > + compatible = "snps,dwmac-mdio"; > > + #address-cells = <1>; > > + #size-cells = <0>; > > + > > + ethphy_eqos: ethernet-phy@0 { > > + compatible = "ethernet-phy-ieee802.3-c22"; > > + reg = <0>; > > + pinctrl-names = "default"; > > + pinctrl-0 = <&pinctrl_eqos_phy>; > > + interrupt-parent = <&gpio3>; > > + interrupts = <26 IRQ_TYPE_EDGE_FALLING>; > > Hi Alexander > > Haven't we been here before? EDGE interrupts are generally wrong for > PHYs. Whoops. Sorry, this slipped in from the downstream kernel. Will fix that. > > + reset-gpios = <&expander0 0 GPIO_ACTIVE_LOW>; > > + reset-assert-us = <500000>; > > + reset-deassert-us = <50000>; > > + enet-phy-lane-no-swap; > > + ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_25_NS>; > > + ti,tx-internal-delay = <DP83867_RGMIIDCTL_2_25_NS>; > > + ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>; > > + ti,dp83867-rxctrl-strap-quirk; > > + ti,clk-output-sel = <DP83867_CLK_O_SEL_OFF>; > > + }; > > + }; > > +}; > > + > > +&fec { > > + pinctrl-names = "default"; > > + pinctrl-0 = <&pinctrl_fec>; > > + phy-mode = "rgmii-id"; > > + phy-handle = <ðphy_fec>; > > + fsl,magic-packet; > > Has WoL been tested? Yes, it works for both interfaces. &eqos doesn't need that property though. Best regards, Alexander -- TQ-Systems GmbH | Mühlstraße 2, Gut Delling | 82229 Seefeld, Germany Amtsgericht München, HRB 105018 Geschäftsführer: Detlef Schneider, Rüdiger Stahl, Stefan Schneider http://www.tq-group.com/ ^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH 2/3] arm64: dts: freescale: add initial device tree for TQMa93xx/MBa93xxLA-MINI 2026-03-19 11:25 ` Alexander Stein @ 2026-03-19 13:30 ` Andrew Lunn 0 siblings, 0 replies; 16+ messages in thread From: Andrew Lunn @ 2026-03-19 13:30 UTC (permalink / raw) To: Alexander Stein Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Frank Li, Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam, Shawn Guo, Martin Schmiedel, devicetree, linux-kernel, imx, linux-arm-kernel, linux On Thu, Mar 19, 2026 at 12:25:11PM +0100, Alexander Stein wrote: > Hi Andrew, > > Am Mittwoch, 18. März 2026, 15:49:38 CET schrieb Andrew Lunn: > > On Tue, Mar 17, 2026 at 12:17:01PM +0100, Alexander Stein wrote: > > > + mdio { > > > + compatible = "snps,dwmac-mdio"; > > > + #address-cells = <1>; > > > + #size-cells = <0>; > > > + > > > + ethphy_eqos: ethernet-phy@0 { > > > + compatible = "ethernet-phy-ieee802.3-c22"; > > > + reg = <0>; > > > + pinctrl-names = "default"; > > > + pinctrl-0 = <&pinctrl_eqos_phy>; > > > + interrupt-parent = <&gpio3>; > > > + interrupts = <26 IRQ_TYPE_EDGE_FALLING>; > > > > Hi Alexander > > > > Haven't we been here before? EDGE interrupts are generally wrong for > > PHYs. > > Whoops. Sorry, this slipped in from the downstream kernel. Will fix that. You might want to fix your downstream as well, since this is not a Mainline thing. > > > +&fec { > > > + pinctrl-names = "default"; > > > + pinctrl-0 = <&pinctrl_fec>; > > > + phy-mode = "rgmii-id"; > > > + phy-handle = <ðphy_fec>; > > > + fsl,magic-packet; > > > > Has WoL been tested? > > Yes, it works for both interfaces. &eqos doesn't need that property though. Great. For the next year or two, i might be asking this all the time, so maybe call it out in the commit message. Andrew ^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH 2/3] arm64: dts: freescale: add initial device tree for TQMa93xx/MBa93xxLA-MINI 2026-03-17 11:17 ` [PATCH 2/3] arm64: dts: freescale: add initial device tree for TQMa93xx/MBa93xxLA-MINI Alexander Stein 2026-03-17 12:10 ` Krzysztof Kozlowski 2026-03-18 14:49 ` Andrew Lunn @ 2026-03-19 14:01 ` Frank Li 2026-03-19 14:20 ` Alexander Stein 2 siblings, 1 reply; 16+ messages in thread From: Frank Li @ 2026-03-19 14:01 UTC (permalink / raw) To: Alexander Stein Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam, Shawn Guo, Martin Schmiedel, devicetree, linux-kernel, imx, linux-arm-kernel, linux On Tue, Mar 17, 2026 at 12:17:01PM +0100, Alexander Stein wrote: > From: Martin Schmiedel <Martin.Schmiedel@tq-group.com> > > This adds support for TQMa93xx module attached to MBa93xxLA-MINI board. Just said "Add support ..." > TQMa93xx is a SOM series using i.MX93 SOC. Need extra empty line between two paragraph. > The MBa93xxLA-MINI has a small form factor and is designed with > WLAN, Bluetooth and WWAN applications in mind. > > Signed-off-by: Martin Schmiedel <Martin.Schmiedel@tq-group.com> > Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com> > --- > arch/arm64/boot/dts/freescale/Makefile | 1 + > .../imx93-tqma9352-mba93xxla-mini.dts | 637 ++++++++++++++++++ New dts, please run dt-format. iomux is not necessary at last one. Frank > 2 files changed, 638 insertions(+) > create mode 100644 arch/arm64/boot/dts/freescale/imx93-tqma9352-mba93xxla-mini.dts > > diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile > index 31bc80586c682..db536522600ac 100644 > --- a/arch/arm64/boot/dts/freescale/Makefile > +++ b/arch/arm64/boot/dts/freescale/Makefile > @@ -461,6 +461,7 @@ dtb-$(CONFIG_ARCH_MXC) += imx93-phycore-rpmsg.dtb > dtb-$(CONFIG_ARCH_MXC) += imx93-tqma9352-mba91xxca.dtb > dtb-$(CONFIG_ARCH_MXC) += imx93-tqma9352-mba93xxca.dtb > dtb-$(CONFIG_ARCH_MXC) += imx93-tqma9352-mba93xxla.dtb > +dtb-$(CONFIG_ARCH_MXC) += imx93-tqma9352-mba93xxla-mini.dtb > > imx93-tqma9352-mba91xxca-lvds-tm070jvhg33-dtbs := imx93-tqma9352-mba91xxca.dtb imx93-tqma9352-mba91xxca-lvds-tm070jvhg33.dtbo > imx93-tqma9352-mba91xxca-rgb-cdtech-dc44-dtbs := imx93-tqma9352-mba91xxca.dtb imx93-tqma9352-mba91xxca-rgb-cdtech-dc44.dtbo > diff --git a/arch/arm64/boot/dts/freescale/imx93-tqma9352-mba93xxla-mini.dts b/arch/arm64/boot/dts/freescale/imx93-tqma9352-mba93xxla-mini.dts > new file mode 100644 > index 0000000000000..97693aa5e904d > --- /dev/null > +++ b/arch/arm64/boot/dts/freescale/imx93-tqma9352-mba93xxla-mini.dts > @@ -0,0 +1,637 @@ > +// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT) > +/* > + * Copyright (c) 2025-2026 TQ-Systems GmbH <linux@ew.tq-group.com>, > + * D-82229 Seefeld, Germany. > + * Author: Martin Schmiedel > + */ > +/dts-v1/; > + > +#include <dt-bindings/input/input.h> > +#include <dt-bindings/leds/common.h> > +#include <dt-bindings/net/ti-dp83867.h> > +#include <dt-bindings/pwm/pwm.h> > +#include <dt-bindings/usb/pd.h> > +#include "imx93-tqma9352.dtsi" > + > +/{ > + model = "TQ-Systems i.MX93 TQMa93xxLA on MBa93xxLA-MINI SBC"; > + compatible = "tq,imx93-tqma9352-mba93xxla-mini", > + "tq,imx93-tqma9352", "fsl,imx93"; > + chassis-type = "embedded"; > + > + chosen { > + stdout-path = &lpuart1; > + }; > + > + aliases { > + eeprom0 = &eeprom0; > + ethernet0 = &eqos; > + ethernet1 = &fec; > + gpio0 = &gpio1; > + gpio1 = &gpio2; > + gpio2 = &gpio3; > + gpio3 = &gpio4; > + i2c0 = &lpi2c1; > + i2c1 = &lpi2c2; > + i2c2 = &lpi2c3; > + i2c3 = &lpi2c4; > + i2c4 = &lpi2c5; > + mmc0 = &usdhc1; > + mmc1 = &usdhc2; > + mmc2 = &usdhc3; > + rtc0 = &pcf85063; > + rtc1 = &bbnsm_rtc; > + serial0 = &lpuart1; > + serial1 = &lpuart2; > + serial2 = &lpuart3; > + serial3 = &lpuart4; > + serial4 = &lpuart5; > + serial5 = &lpuart6; > + serial6 = &lpuart7; > + serial7 = &lpuart8; > + spi0 = &lpspi1; > + spi1 = &lpspi2; > + spi2 = &lpspi3; > + spi3 = &lpspi4; > + spi4 = &lpspi5; > + spi5 = &lpspi6; > + }; > + > + backlight_lvds: backlight { > + compatible = "pwm-backlight"; > + pwms = <&tpm5 0 5000000 0>; > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_backlight>; > + brightness-levels = <0 4 8 16 32 64 128 255>; > + default-brightness-level = <7>; > + power-supply = <®_12v0>; > + enable-gpios = <&gpio2 5 GPIO_ACTIVE_HIGH>; > + status = "disabled"; > + }; > + > + display: display { > + /* > + * Display is not fixed, so compatible has to be added from > + * DT overlay > + */ > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_display>; > + power-supply = <®_3v3>; > + enable-gpios = <&gpio2 7 GPIO_ACTIVE_HIGH>; > + backlight = <&backlight_lvds>; > + status = "disabled"; > + > + port { > + panel_in_lvds0: endpoint { > + }; > + }; > + }; > + > + iio-hwmon { > + compatible = "iio-hwmon"; > + io-channels = <&adc1 0>, <&adc1 1>, <&adc1 2>, <&adc1 3>; > + }; > + > + reg_3v3: regulator-3v3 { > + compatible = "regulator-fixed"; > + regulator-name = "V_3V3_MB"; > + regulator-min-microvolt = <3300000>; > + regulator-max-microvolt = <3300000>; > + }; > + > + reg_5v0_usb: regulator-5v0-usb { > + compatible = "regulator-fixed"; > + regulator-name = "V_5V0_HUB"; > + regulator-min-microvolt = <5000000>; > + regulator-max-microvolt = <5000000>; > + gpio = <&expander1 0 GPIO_ACTIVE_HIGH>; > + enable-active-high; > + }; > + > + reg_12v0: regulator-12v0 { > + compatible = "regulator-fixed"; > + regulator-name = "V_12V"; > + regulator-min-microvolt = <12000000>; > + regulator-max-microvolt = <12000000>; > + gpio = <&expander0 7 GPIO_ACTIVE_HIGH>; > + enable-active-high; > + }; > +}; > + > +&adc1 { > + status = "okay"; > +}; > + > +&eqos { > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_eqos>; > + phy-mode = "rgmii-id"; > + phy-handle = <ðphy_eqos>; > + status = "okay"; > + > + mdio { > + compatible = "snps,dwmac-mdio"; > + #address-cells = <1>; > + #size-cells = <0>; > + > + ethphy_eqos: ethernet-phy@0 { > + compatible = "ethernet-phy-ieee802.3-c22"; > + reg = <0>; > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_eqos_phy>; > + interrupt-parent = <&gpio3>; > + interrupts = <26 IRQ_TYPE_EDGE_FALLING>; > + reset-gpios = <&expander0 0 GPIO_ACTIVE_LOW>; > + reset-assert-us = <500000>; > + reset-deassert-us = <50000>; > + enet-phy-lane-no-swap; > + ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_25_NS>; > + ti,tx-internal-delay = <DP83867_RGMIIDCTL_2_25_NS>; > + ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>; > + ti,dp83867-rxctrl-strap-quirk; > + ti,clk-output-sel = <DP83867_CLK_O_SEL_OFF>; > + }; > + }; > +}; > + > +&fec { > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_fec>; > + phy-mode = "rgmii-id"; > + phy-handle = <ðphy_fec>; > + fsl,magic-packet; > + status = "okay"; > + > + mdio { > + #address-cells = <1>; > + #size-cells = <0>; > + clock-frequency = <5000000>; > + > + ethphy_fec: ethernet-phy@0 { > + compatible = "ethernet-phy-ieee802.3-c22"; > + reg = <0>; > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_fec_phy>; > + interrupt-parent = <&gpio3>; > + interrupts = <27 IRQ_TYPE_EDGE_FALLING>; > + reset-gpios = <&expander0 1 GPIO_ACTIVE_LOW>; > + reset-assert-us = <500000>; > + reset-deassert-us = <50000>; > + enet-phy-lane-no-swap; > + ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_25_NS>; > + ti,tx-internal-delay = <DP83867_RGMIIDCTL_2_25_NS>; > + ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>; > + ti,dp83867-rxctrl-strap-quirk; > + ti,clk-output-sel = <DP83867_CLK_O_SEL_OFF>; > + }; > + }; > +}; > + > +&flexcan1 { > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_flexcan1>; > + status = "okay"; > +}; > + > +&flexcan2 { > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_flexcan2>; > + status = "okay"; > +}; > + > +/* deactivated because pins are used for SDIO */ > +&flexspi1 { > + status = "disabled"; > +}; > + > +&gpio1 { > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_m2_key_b>, <&pinctrl_m2_key_e>; > + > + gpio-line-names = > + /* 00 */ "", "", "M2_KEYE_ALERT#", "", > + /* 04 */ "", "", "M2_KEYE_UART_WAKE#", "BM1_M2_KEYE_SDIO_WAKE#", > + /* 08 */ "", "", "", "BM2_M2_KEYE_SDIO_RST#", > + /* 12 */ "M2_KEYB_WOWWAN#", "BM3_M2_KEYB_PEWAKE#", "", "", > + /* 16 */ "", "", "", "", > + /* 20 */ "", "", "", "", > + /* 24 */ "", "", "", "", > + /* 28 */ "", "", "", ""; > +}; > + > +&gpio2 { > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_gpio2>; > + > + gpio-line-names = > + /* 00 */ "", "", "", "", > + /* 04 */ "LVDS_RESET#", "LVDS_BLT_EN", "", "LVDS_PWR_EN", > + /* 08 */ "", "", "", "", > + /* 12 */ "", "", "", "", > + /* 16 */ "X1_9", "X1_19", "X1_15", "X1_11", > + /* 20 */ "X1_13", "X1_7", "", "CAM_TRIGGER", > + /* 24 */ "CAM_SYNC", "", "X1_5", "", > + /* 28 */ "", "", "", ""; > +}; > + > +&gpio4 { > + gpio-line-names = > + /* 00 */ "", "", "", "", > + /* 04 */ "", "", "", "", > + /* 08 */ "", "", "", "", > + /* 12 */ "", "", "", "", > + /* 16 */ "", "", "", "", > + /* 20 */ "", "", "", "", > + /* 24 */ "", "", "", "", > + /* 28 */ "", "DSI_GPIO", "", ""; > +}; > + > +&lpi2c3 { > + #address-cells = <1>; > + #size-cells = <0>; > + clock-frequency = <400000>; > + pinctrl-names = "default", "gpio"; > + pinctrl-0 = <&pinctrl_lpi2c3>; > + pinctrl-1 = <&pinctrl_lpi2c3_gpio>; > + scl-gpios = <&gpio2 29 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; > + sda-gpios = <&gpio2 28 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; > + status = "okay"; > + > + expander0: gpio@70 { > + compatible = "nxp,pca9538"; > + reg = <0x70>; > + gpio-controller; > + #gpio-cells = <2>; > + vcc-supply = <®_3v3>; > + gpio-line-names = "ENET1_RESET#", "ENET2_RESET#", > + "M2_KEYE_PERST#", "M2_KEYB_PERST#", > + "M2_KEYE_W_DISABLE1#", "M2_KEYE_W_DISABLE2#", > + "M2_KEYA_W_DISABLE1#", "12V_EN"; > + }; > + > + expander1: gpio@71 { > + compatible = "nxp,pca9538"; > + reg = <0x71>; > + gpio-controller; > + #gpio-cells = <2>; > + vcc-supply = <®_3v3>; > + gpio-line-names = "USB_HUB_PWR", "DSI_RST#", > + "CAM_PWR#", "CAMRST#", > + "M2_KEYB_FULL_CARD_PWR_OFF#", "M2_KEYB_W_DISABLE2#", > + "M2_KEYB_RST#", "M2_KEYB_DPR"; > + > + /* > + * Controls the LTE card FULL_CARD_PWR_OFF pin which is low active > + * as power down signal. The output-low states, the signal > + * is inactive, e.g. not power down > + */ > + full-card-power-off-hog { > + gpio-hog; > + gpios = <4 GPIO_ACTIVE_LOW>; > + output-low; > + line-name = "M2_KEYB_FULL_CARD_PWR_OFF#"; > + }; > + > + /* > + * Controls the LTE card reset pin which is low active > + * as reset signal. The output-low states, the signal > + * is inactive, e.g. not in reset > + */ > + wlan-perst-hog { > + gpio-hog; > + gpios = <6 GPIO_ACTIVE_LOW>; > + output-low; > + line-name = "M2_KEYB_RST#"; > + }; > + }; > +}; > + > +&lpspi6 { > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_lpspi6>, <&pinctrl_lpspi6_cs>; > + cs-gpios = <&gpio2 0 GPIO_ACTIVE_LOW>; > + status = "okay"; > +}; > + > +&lpuart1 { > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_uart1>; > + status = "okay"; > +}; > + > +/* disabled per default, console for M33 */ > +&lpuart3 { > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_uart3>; > + status = "disabled"; > +}; > + > +/* disabled per default, used for bluetooth on M.2 slot */ > +&lpuart7 { > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_uart7>; > + uart-has-rtscts; > + status = "disabled"; > +}; > + > +&lpuart8 { > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_uart8>; > + status = "okay"; > +}; > + > +&pcf85063 { > + /* RTC_EVENT# from SoM is connected on mainboard */ > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_pcf85063>; > + interrupt-parent = <&gpio1>; > + interrupts = <14 IRQ_TYPE_EDGE_FALLING>; > +}; > + > +&tpm5 { > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_tpm5>; > +}; > + > +&usbotg1 { > + disable-over-current; > + dr_mode = "peripheral"; > + samsung,picophy-pre-emp-curr-control = <3>; > + samsung,picophy-dc-vol-level-adjust = <7>; > + status = "okay"; > +}; > + > +&usbotg2 { > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_usbhub>; > + #address-cells = <1>; > + #size-cells = <0>; > + disable-over-current; > + dr_mode = "host"; > + vbus-supply = <®_5v0_usb>; > + samsung,picophy-pre-emp-curr-control = <3>; > + samsung,picophy-dc-vol-level-adjust = <7>; > + status = "okay"; > + > + hub_2_0: usb-hub@1 { > + compatible = "usb424,2517"; > + reg = <1>; > + reset-gpios = <&gpio2 22 GPIO_ACTIVE_LOW>; > + vdd-supply = <®_3v3>; > + }; > +}; > + > +&usdhc2 { > + pinctrl-names = "default", "state_100mhz", "state_200mhz"; > + pinctrl-0 = <&pinctrl_usdhc2_hs>, <&pinctrl_usdhc2_gpio>; > + pinctrl-1 = <&pinctrl_usdhc2_uhs>, <&pinctrl_usdhc2_gpio>; > + pinctrl-2 = <&pinctrl_usdhc2_uhs>, <&pinctrl_usdhc2_gpio>; > + bus-width = <4>; > + cd-gpios = <&gpio3 0 GPIO_ACTIVE_LOW>; > + disable-wp; > + no-sdio; > + no-mmc; > + vmmc-supply = <®_usdhc2_vmmc>; > + status = "okay"; > +}; > + > +&usdhc3 { > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_usdhc3>; > + bus-width = <4>; > + non-removable; > + vmmc-supply = <®_3v3>; > +}; > + > +&iomuxc { > + pinctrl_backlight: backlightgrp { > + fsl,pins = /* HYS | PD | FSEL_2 | DSE X4 */ > + <MX93_PAD_GPIO_IO05__GPIO2_IO05 0x011e>; > + }; > + > + pinctrl_display: displaygrp { > + fsl,pins = /* HYS | PD | FSEL_2 | DSE X4 */ > + <MX93_PAD_GPIO_IO07__GPIO2_IO07 0x011e>; > + }; > + > + pinctrl_eqos: eqosgrp { > + fsl,pins = /* PD | FSEL_2 | DSE X4 */ > + <MX93_PAD_ENET1_MDC__ENET_QOS_MDC 0x51e>, > + /* SION | HYS | FSEL_2 | DSE X4 */ > + <MX93_PAD_ENET1_MDIO__ENET_QOS_MDIO 0x4000111e>, > + /* HYS | FSEL_0 | DSE no drive */ > + <MX93_PAD_ENET1_RD0__ENET_QOS_RGMII_RD0 0x1000>, > + <MX93_PAD_ENET1_RD1__ENET_QOS_RGMII_RD1 0x1000>, > + <MX93_PAD_ENET1_RD2__ENET_QOS_RGMII_RD2 0x1000>, > + <MX93_PAD_ENET1_RD3__ENET_QOS_RGMII_RD3 0x1000>, > + <MX93_PAD_ENET1_RX_CTL__ENET_QOS_RGMII_RX_CTL 0x1000>, > + /* HYS | PD | FSEL_0 | DSE no drive */ > + <MX93_PAD_ENET1_RXC__CCM_ENET_QOS_CLOCK_GENERATE_RX_CLK 0x1400>, > + /* PD | FSEL_2 | DSE X5 */ > + <MX93_PAD_ENET1_TD0__ENET_QOS_RGMII_TD0 0x53e>, > + <MX93_PAD_ENET1_TD1__ENET_QOS_RGMII_TD1 0x53e>, > + <MX93_PAD_ENET1_TD2__ENET_QOS_RGMII_TD2 0x53e>, > + <MX93_PAD_ENET1_TD3__ENET_QOS_RGMII_TD3 0x53e>, > + <MX93_PAD_ENET1_TX_CTL__ENET_QOS_RGMII_TX_CTL 0x53e>, > + /* PD | FSEL_3 | DSE X4 */ > + <MX93_PAD_ENET1_TXC__CCM_ENET_QOS_CLOCK_GENERATE_TX_CLK 0x59e>; > + }; > + > + pinctrl_eqos_phy: eqosphygrp { > + fsl,pins = /* HYS | FSEL_0 | DSE no drive */ > + <MX93_PAD_CCM_CLKO1__GPIO3_IO26 0x1000>; > + }; > + > + pinctrl_fec: fecgrp { > + fsl,pins = /* PD | FSEL_2 | DSE X4 */ > + <MX93_PAD_ENET2_MDC__ENET1_MDC 0x51e>, > + /* SION | HYS | FSEL_2 | DSE X4 */ > + <MX93_PAD_ENET2_MDIO__ENET1_MDIO 0x4000111e>, > + /* HYS | FSEL_0 | DSE no drive */ > + <MX93_PAD_ENET2_RD0__ENET1_RGMII_RD0 0x1000>, > + <MX93_PAD_ENET2_RD1__ENET1_RGMII_RD1 0x1000>, > + <MX93_PAD_ENET2_RD2__ENET1_RGMII_RD2 0x1000>, > + <MX93_PAD_ENET2_RD3__ENET1_RGMII_RD3 0x1000>, > + <MX93_PAD_ENET2_RX_CTL__ENET1_RGMII_RX_CTL 0x1000>, > + /* HYS | PD | FSEL_0 | DSE no drive */ > + <MX93_PAD_ENET2_RXC__ENET1_RGMII_RXC 0x1400>, > + /* PD | FSEL_2 | DSE X5 */ > + <MX93_PAD_ENET2_TD0__ENET1_RGMII_TD0 0x53e>, > + <MX93_PAD_ENET2_TD1__ENET1_RGMII_TD1 0x53e>, > + <MX93_PAD_ENET2_TD2__ENET1_RGMII_TD2 0x53e>, > + <MX93_PAD_ENET2_TD3__ENET1_RGMII_TD3 0x53e>, > + <MX93_PAD_ENET2_TX_CTL__ENET1_RGMII_TX_CTL 0x53e>, > + /* PD | FSEL_3 | DSE X4 */ > + <MX93_PAD_ENET2_TXC__ENET1_RGMII_TXC 0x59e>; > + }; > + > + pinctrl_fec_phy: fecphygrp { > + fsl,pins = /* HYS | FSEL_0 | DSE no drive */ > + <MX93_PAD_CCM_CLKO2__GPIO3_IO27 0x1000>; > + }; > + > + pinctrl_flexcan1: flexcan1grp { > + fsl,pins = /* HYS | PU | FSEL_0 | DSE no drive */ > + <MX93_PAD_PDM_BIT_STREAM0__CAN1_RX 0x1200>, > + /* PU | FSEL_3 | DSE X4 */ > + <MX93_PAD_PDM_CLK__CAN1_TX 0x039e>; > + }; > + > + pinctrl_flexcan2: flexcan2grp { > + fsl,pins = /* HYS | PU | FSEL_0 | DSE no drive */ > + <MX93_PAD_GPIO_IO27__CAN2_RX 0x1200>, > + /* PU | FSEL_3 | DSE X4 */ > + <MX93_PAD_GPIO_IO25__CAN2_TX 0x039e>; > + }; > + > + pinctrl_gpio2: gpio2grp { > + fsl,pins = /* HYS | PD | FSEL_2 | DSE X4 */ > + <MX93_PAD_GPIO_IO16__GPIO2_IO16 0x151e>, > + <MX93_PAD_GPIO_IO17__GPIO2_IO17 0x151e>, > + <MX93_PAD_GPIO_IO18__GPIO2_IO18 0x151e>, > + <MX93_PAD_GPIO_IO19__GPIO2_IO19 0x151e>, > + <MX93_PAD_GPIO_IO20__GPIO2_IO20 0x151e>, > + <MX93_PAD_GPIO_IO21__GPIO2_IO21 0x151e>, > + <MX93_PAD_GPIO_IO26__GPIO2_IO26 0x151e>; > + }; > + > + pinctrl_jtag: jtaggrp { > + fsl,pins = <MX93_PAD_DAP_TCLK_SWCLK__JTAG_MUX_TCK 0x051e>, > + <MX93_PAD_DAP_TDI__JTAG_MUX_TDI 0x1200>, > + <MX93_PAD_DAP_TDO_TRACESWO__JTAG_MUX_TDO 0x031e>, > + <MX93_PAD_DAP_TMS_SWDIO__JTAG_MUX_TMS 0x1200>; > + }; > + > + pinctrl_lpi2c3: lpi2c3grp { > + fsl,pins = /* SION | HYS | OD | FSEL_3 | DSE X4 */ > + <MX93_PAD_GPIO_IO28__LPI2C3_SDA 0x4000199e>, > + <MX93_PAD_GPIO_IO29__LPI2C3_SCL 0x4000199e>; > + }; > + > + pinctrl_lpi2c3_gpio: lpi2c3-gpiogrp { > + fsl,pins = /* SION | HYS | OD | FSEL_3 | DSE X4 */ > + <MX93_PAD_GPIO_IO28__GPIO2_IO28 0x4000199e>, > + <MX93_PAD_GPIO_IO29__GPIO2_IO29 0x4000199e>; > + }; > + > + pinctrl_lpspi6: lpspi6grp { > + fsl,pins = /* HYS | PD | FSEL_0 | DSE no drive */ > + <MX93_PAD_GPIO_IO01__LPSPI6_SIN 0x1400>, > + /* PD | FSEL_2 | DSE X4 */ > + <MX93_PAD_GPIO_IO02__LPSPI6_SOUT 0x051e>, > + <MX93_PAD_GPIO_IO03__LPSPI6_SCK 0x051e>; > + }; > + > + pinctrl_lpspi6_cs: lpspi6csgrp { > + fsl,pins = /* FSEL_2 | DSE X4 */ > + <MX93_PAD_GPIO_IO00__GPIO2_IO00 0x011e>; > + }; > + > + pinctrl_m2_key_b: m2keybgrp { > + fsl,pins = <MX93_PAD_SAI1_TXC__GPIO1_IO12 0x00001000>, > + <MX93_PAD_SAI1_TXD0__GPIO1_IO13 0x00001000>; > + }; > + > + pinctrl_m2_key_e: m2keyegrp { > + fsl,pins = <MX93_PAD_I2C2_SCL__GPIO1_IO02 0x00001000>, > + <MX93_PAD_UART2_RXD__GPIO1_IO06 0x00001000>, > + <MX93_PAD_UART2_TXD__GPIO1_IO07 0x00001000>, > + <MX93_PAD_SAI1_TXFS__GPIO1_IO11 0x00001000>; > + }; > + > + /*CAM_MCLK, DSI_GPIO, CAM_TRIGGER, CAM_SYNC*/ > + pinctrl_mipi_csi_dsi: mipi_csi_dsigrp { > + fsl,pins = <MX93_PAD_CCM_CLKO3__CCMSRCGPCMIX_CLKO3 0x0000011e>, > + <MX93_PAD_CCM_CLKO4__GPIO4_IO29 0x0000011e>, > + <MX93_PAD_GPIO_IO23__GPIO2_IO23 0x0000011e>, > + <MX93_PAD_GPIO_IO24__GPIO2_IO24 0x0000111e>; > + }; > + > + pinctrl_pcf85063: pcf85063grp { > + fsl,pins = /* HYS | FSEL_0 | No DSE */ > + <MX93_PAD_SAI1_RXD0__GPIO1_IO14 0x1000>; > + }; > + > + pinctrl_tpm5: tpm5grp { > + fsl,pins = <MX93_PAD_GPIO_IO06__TPM5_CH0 0x57e>; > + }; > + > + pinctrl_uart1: uart1grp { > + fsl,pins = /* HYS | FSEL_0 | No DSE */ > + <MX93_PAD_UART1_RXD__LPUART1_RX 0x1000>, > + /* FSEL_2 | DSE X4 */ > + <MX93_PAD_UART1_TXD__LPUART1_TX 0x011e>; > + }; > + > + pinctrl_uart3: uart3grp { > + fsl,pins = /* HYS | FSEL_0 | No DSE */ > + <MX93_PAD_GPIO_IO15__LPUART3_RX 0x1000>, > + /* FSEL_2 | DSE X4 */ > + <MX93_PAD_GPIO_IO14__LPUART3_TX 0x011e>; > + }; > + > + pinctrl_uart7: uart7grp { > + fsl,pins = <MX93_PAD_GPIO_IO08__LPUART7_TX 0x031e>, > + <MX93_PAD_GPIO_IO09__LPUART7_RX 0x031e>, > + <MX93_PAD_GPIO_IO10__LPUART7_CTS_B 0x031e>, > + <MX93_PAD_GPIO_IO11__LPUART7_RTS_B 0x031e>; > + }; > + > + pinctrl_uart8: uart8grp { > + fsl,pins = /* HYS | FSEL_0 | No DSE */ > + <MX93_PAD_GPIO_IO13__LPUART8_RX 0x1000>, > + /* FSEL_2 | DSE X4 */ > + <MX93_PAD_GPIO_IO12__LPUART8_TX 0x011e>; > + }; > + > + pinctrl_usbhub: usbhubgrp { > + fsl,pins = /* HYS | PD | FSEL_2 | DSE X4 */ > + <MX93_PAD_GPIO_IO22__GPIO2_IO22 0x151e>; > + }; > + > + pinctrl_usdhc2_gpio: usdhc2gpiogrp { > + fsl,pins = /* HYS | FSEL_0 | No DSE */ > + <MX93_PAD_SD2_CD_B__GPIO3_IO00 0x1000>; > + }; > + > + /* enable SION for data and cmd pad due to ERR052021 */ > + pinctrl_usdhc2_hs: usdhc2hsgrp { > + fsl,pins = /* PD | FSEL_3 | DSE X5 */ > + <MX93_PAD_SD2_CLK__USDHC2_CLK 0x05be>, > + /* HYS | PU | FSEL_3 | DSE X4 */ > + <MX93_PAD_SD2_CMD__USDHC2_CMD 0x4000139e>, > + /* HYS | PU | FSEL_3 | DSE X3 */ > + <MX93_PAD_SD2_DATA0__USDHC2_DATA0 0x4000138e>, > + <MX93_PAD_SD2_DATA1__USDHC2_DATA1 0x4000138e>, > + <MX93_PAD_SD2_DATA2__USDHC2_DATA2 0x4000138e>, > + <MX93_PAD_SD2_DATA3__USDHC2_DATA3 0x4000138e>, > + /* FSEL_2 | DSE X3 */ > + <MX93_PAD_SD2_VSELECT__USDHC2_VSELECT 0x010e>; > + }; > + > + /* enable SION for data and cmd pad due to ERR052021 */ > + pinctrl_usdhc2_uhs: usdhc2uhsgrp { > + fsl,pins = /* PD | FSEL_3 | DSE X6 */ > + <MX93_PAD_SD2_CLK__USDHC2_CLK 0x05fe>, > + /* HYS | PU | FSEL_3 | DSE X4 */ > + <MX93_PAD_SD2_CMD__USDHC2_CMD 0x4000139e>, > + <MX93_PAD_SD2_DATA0__USDHC2_DATA0 0x4000139e>, > + <MX93_PAD_SD2_DATA1__USDHC2_DATA1 0x4000139e>, > + <MX93_PAD_SD2_DATA2__USDHC2_DATA2 0x4000139e>, > + <MX93_PAD_SD2_DATA3__USDHC2_DATA3 0x4000139e>, > + /* FSEL_2 | DSE X3 */ > + <MX93_PAD_SD2_VSELECT__USDHC2_VSELECT 0x010e>; > + }; > + > + /* enable SION for data and cmd pad due to ERR052021 */ > + pinctrl_usdhc3: usdhc3grp { > + fsl,pins = /* PD | FSEL_3 | DSE X6 */ > + <MX93_PAD_SD3_CLK__USDHC3_CLK 0x05fe>, > + /* HYS | PU | FSEL_3 | DSE X4 */ > + <MX93_PAD_SD3_CMD__USDHC3_CMD 0x4000139e>, > + <MX93_PAD_SD3_DATA0__USDHC3_DATA0 0x4000139e>, > + <MX93_PAD_SD3_DATA1__USDHC3_DATA1 0x4000139e>, > + <MX93_PAD_SD3_DATA2__USDHC3_DATA2 0x4000139e>, > + <MX93_PAD_SD3_DATA3__USDHC3_DATA3 0x4000139e>; > + }; > +}; > -- > 2.43.0 > ^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH 2/3] arm64: dts: freescale: add initial device tree for TQMa93xx/MBa93xxLA-MINI 2026-03-19 14:01 ` Frank Li @ 2026-03-19 14:20 ` Alexander Stein 2026-03-21 16:05 ` Francesco Dolcini 0 siblings, 1 reply; 16+ messages in thread From: Alexander Stein @ 2026-03-19 14:20 UTC (permalink / raw) To: Frank Li Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam, Shawn Guo, Martin Schmiedel, devicetree, linux-kernel, imx, linux-arm-kernel, linux [-- Attachment #1: Type: text/plain, Size: 24250 bytes --] Am Donnerstag, 19. März 2026, 15:01:04 CET schrieb Frank Li: > On Tue, Mar 17, 2026 at 12:17:01PM +0100, Alexander Stein wrote: > > From: Martin Schmiedel <Martin.Schmiedel@tq-group.com> > > > > This adds support for TQMa93xx module attached to MBa93xxLA-MINI board. > > Just said "Add support ..." Yup, already fixed in v2. > > > TQMa93xx is a SOM series using i.MX93 SOC. > > Need extra empty line between two paragraph. This one I missed. Thanks. > > > The MBa93xxLA-MINI has a small form factor and is designed with > > WLAN, Bluetooth and WWAN applications in mind. > > > > Signed-off-by: Martin Schmiedel <Martin.Schmiedel@tq-group.com> > > Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com> > > --- > > arch/arm64/boot/dts/freescale/Makefile | 1 + > > .../imx93-tqma9352-mba93xxla-mini.dts | 637 ++++++++++++++++++ > > New dts, please run dt-format. iomux is not necessary at last one. Sorry, running dt-format on imx93-tqma9352-mba93xxla-mini.dts segfaults. AFAIK iomux being the last node is/was a common pattern for imx based platforms. Best regards, Alexander > > Frank > > > 2 files changed, 638 insertions(+) > > create mode 100644 arch/arm64/boot/dts/freescale/imx93-tqma9352-mba93xxla-mini.dts > > > > diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile > > index 31bc80586c682..db536522600ac 100644 > > --- a/arch/arm64/boot/dts/freescale/Makefile > > +++ b/arch/arm64/boot/dts/freescale/Makefile > > @@ -461,6 +461,7 @@ dtb-$(CONFIG_ARCH_MXC) += imx93-phycore-rpmsg.dtb > > dtb-$(CONFIG_ARCH_MXC) += imx93-tqma9352-mba91xxca.dtb > > dtb-$(CONFIG_ARCH_MXC) += imx93-tqma9352-mba93xxca.dtb > > dtb-$(CONFIG_ARCH_MXC) += imx93-tqma9352-mba93xxla.dtb > > +dtb-$(CONFIG_ARCH_MXC) += imx93-tqma9352-mba93xxla-mini.dtb > > > > imx93-tqma9352-mba91xxca-lvds-tm070jvhg33-dtbs := imx93-tqma9352-mba91xxca.dtb imx93-tqma9352-mba91xxca-lvds-tm070jvhg33.dtbo > > imx93-tqma9352-mba91xxca-rgb-cdtech-dc44-dtbs := imx93-tqma9352-mba91xxca.dtb imx93-tqma9352-mba91xxca-rgb-cdtech-dc44.dtbo > > diff --git a/arch/arm64/boot/dts/freescale/imx93-tqma9352-mba93xxla-mini.dts b/arch/arm64/boot/dts/freescale/imx93-tqma9352-mba93xxla-mini.dts > > new file mode 100644 > > index 0000000000000..97693aa5e904d > > --- /dev/null > > +++ b/arch/arm64/boot/dts/freescale/imx93-tqma9352-mba93xxla-mini.dts > > @@ -0,0 +1,637 @@ > > +// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT) > > +/* > > + * Copyright (c) 2025-2026 TQ-Systems GmbH <linux@ew.tq-group.com>, > > + * D-82229 Seefeld, Germany. > > + * Author: Martin Schmiedel > > + */ > > +/dts-v1/; > > + > > +#include <dt-bindings/input/input.h> > > +#include <dt-bindings/leds/common.h> > > +#include <dt-bindings/net/ti-dp83867.h> > > +#include <dt-bindings/pwm/pwm.h> > > +#include <dt-bindings/usb/pd.h> > > +#include "imx93-tqma9352.dtsi" > > + > > +/{ > > + model = "TQ-Systems i.MX93 TQMa93xxLA on MBa93xxLA-MINI SBC"; > > + compatible = "tq,imx93-tqma9352-mba93xxla-mini", > > + "tq,imx93-tqma9352", "fsl,imx93"; > > + chassis-type = "embedded"; > > + > > + chosen { > > + stdout-path = &lpuart1; > > + }; > > + > > + aliases { > > + eeprom0 = &eeprom0; > > + ethernet0 = &eqos; > > + ethernet1 = &fec; > > + gpio0 = &gpio1; > > + gpio1 = &gpio2; > > + gpio2 = &gpio3; > > + gpio3 = &gpio4; > > + i2c0 = &lpi2c1; > > + i2c1 = &lpi2c2; > > + i2c2 = &lpi2c3; > > + i2c3 = &lpi2c4; > > + i2c4 = &lpi2c5; > > + mmc0 = &usdhc1; > > + mmc1 = &usdhc2; > > + mmc2 = &usdhc3; > > + rtc0 = &pcf85063; > > + rtc1 = &bbnsm_rtc; > > + serial0 = &lpuart1; > > + serial1 = &lpuart2; > > + serial2 = &lpuart3; > > + serial3 = &lpuart4; > > + serial4 = &lpuart5; > > + serial5 = &lpuart6; > > + serial6 = &lpuart7; > > + serial7 = &lpuart8; > > + spi0 = &lpspi1; > > + spi1 = &lpspi2; > > + spi2 = &lpspi3; > > + spi3 = &lpspi4; > > + spi4 = &lpspi5; > > + spi5 = &lpspi6; > > + }; > > + > > + backlight_lvds: backlight { > > + compatible = "pwm-backlight"; > > + pwms = <&tpm5 0 5000000 0>; > > + pinctrl-names = "default"; > > + pinctrl-0 = <&pinctrl_backlight>; > > + brightness-levels = <0 4 8 16 32 64 128 255>; > > + default-brightness-level = <7>; > > + power-supply = <®_12v0>; > > + enable-gpios = <&gpio2 5 GPIO_ACTIVE_HIGH>; > > + status = "disabled"; > > + }; > > + > > + display: display { > > + /* > > + * Display is not fixed, so compatible has to be added from > > + * DT overlay > > + */ > > + pinctrl-names = "default"; > > + pinctrl-0 = <&pinctrl_display>; > > + power-supply = <®_3v3>; > > + enable-gpios = <&gpio2 7 GPIO_ACTIVE_HIGH>; > > + backlight = <&backlight_lvds>; > > + status = "disabled"; > > + > > + port { > > + panel_in_lvds0: endpoint { > > + }; > > + }; > > + }; > > + > > + iio-hwmon { > > + compatible = "iio-hwmon"; > > + io-channels = <&adc1 0>, <&adc1 1>, <&adc1 2>, <&adc1 3>; > > + }; > > + > > + reg_3v3: regulator-3v3 { > > + compatible = "regulator-fixed"; > > + regulator-name = "V_3V3_MB"; > > + regulator-min-microvolt = <3300000>; > > + regulator-max-microvolt = <3300000>; > > + }; > > + > > + reg_5v0_usb: regulator-5v0-usb { > > + compatible = "regulator-fixed"; > > + regulator-name = "V_5V0_HUB"; > > + regulator-min-microvolt = <5000000>; > > + regulator-max-microvolt = <5000000>; > > + gpio = <&expander1 0 GPIO_ACTIVE_HIGH>; > > + enable-active-high; > > + }; > > + > > + reg_12v0: regulator-12v0 { > > + compatible = "regulator-fixed"; > > + regulator-name = "V_12V"; > > + regulator-min-microvolt = <12000000>; > > + regulator-max-microvolt = <12000000>; > > + gpio = <&expander0 7 GPIO_ACTIVE_HIGH>; > > + enable-active-high; > > + }; > > +}; > > + > > +&adc1 { > > + status = "okay"; > > +}; > > + > > +&eqos { > > + pinctrl-names = "default"; > > + pinctrl-0 = <&pinctrl_eqos>; > > + phy-mode = "rgmii-id"; > > + phy-handle = <ðphy_eqos>; > > + status = "okay"; > > + > > + mdio { > > + compatible = "snps,dwmac-mdio"; > > + #address-cells = <1>; > > + #size-cells = <0>; > > + > > + ethphy_eqos: ethernet-phy@0 { > > + compatible = "ethernet-phy-ieee802.3-c22"; > > + reg = <0>; > > + pinctrl-names = "default"; > > + pinctrl-0 = <&pinctrl_eqos_phy>; > > + interrupt-parent = <&gpio3>; > > + interrupts = <26 IRQ_TYPE_EDGE_FALLING>; > > + reset-gpios = <&expander0 0 GPIO_ACTIVE_LOW>; > > + reset-assert-us = <500000>; > > + reset-deassert-us = <50000>; > > + enet-phy-lane-no-swap; > > + ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_25_NS>; > > + ti,tx-internal-delay = <DP83867_RGMIIDCTL_2_25_NS>; > > + ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>; > > + ti,dp83867-rxctrl-strap-quirk; > > + ti,clk-output-sel = <DP83867_CLK_O_SEL_OFF>; > > + }; > > + }; > > +}; > > + > > +&fec { > > + pinctrl-names = "default"; > > + pinctrl-0 = <&pinctrl_fec>; > > + phy-mode = "rgmii-id"; > > + phy-handle = <ðphy_fec>; > > + fsl,magic-packet; > > + status = "okay"; > > + > > + mdio { > > + #address-cells = <1>; > > + #size-cells = <0>; > > + clock-frequency = <5000000>; > > + > > + ethphy_fec: ethernet-phy@0 { > > + compatible = "ethernet-phy-ieee802.3-c22"; > > + reg = <0>; > > + pinctrl-names = "default"; > > + pinctrl-0 = <&pinctrl_fec_phy>; > > + interrupt-parent = <&gpio3>; > > + interrupts = <27 IRQ_TYPE_EDGE_FALLING>; > > + reset-gpios = <&expander0 1 GPIO_ACTIVE_LOW>; > > + reset-assert-us = <500000>; > > + reset-deassert-us = <50000>; > > + enet-phy-lane-no-swap; > > + ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_25_NS>; > > + ti,tx-internal-delay = <DP83867_RGMIIDCTL_2_25_NS>; > > + ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>; > > + ti,dp83867-rxctrl-strap-quirk; > > + ti,clk-output-sel = <DP83867_CLK_O_SEL_OFF>; > > + }; > > + }; > > +}; > > + > > +&flexcan1 { > > + pinctrl-names = "default"; > > + pinctrl-0 = <&pinctrl_flexcan1>; > > + status = "okay"; > > +}; > > + > > +&flexcan2 { > > + pinctrl-names = "default"; > > + pinctrl-0 = <&pinctrl_flexcan2>; > > + status = "okay"; > > +}; > > + > > +/* deactivated because pins are used for SDIO */ > > +&flexspi1 { > > + status = "disabled"; > > +}; > > + > > +&gpio1 { > > + pinctrl-names = "default"; > > + pinctrl-0 = <&pinctrl_m2_key_b>, <&pinctrl_m2_key_e>; > > + > > + gpio-line-names = > > + /* 00 */ "", "", "M2_KEYE_ALERT#", "", > > + /* 04 */ "", "", "M2_KEYE_UART_WAKE#", "BM1_M2_KEYE_SDIO_WAKE#", > > + /* 08 */ "", "", "", "BM2_M2_KEYE_SDIO_RST#", > > + /* 12 */ "M2_KEYB_WOWWAN#", "BM3_M2_KEYB_PEWAKE#", "", "", > > + /* 16 */ "", "", "", "", > > + /* 20 */ "", "", "", "", > > + /* 24 */ "", "", "", "", > > + /* 28 */ "", "", "", ""; > > +}; > > + > > +&gpio2 { > > + pinctrl-names = "default"; > > + pinctrl-0 = <&pinctrl_gpio2>; > > + > > + gpio-line-names = > > + /* 00 */ "", "", "", "", > > + /* 04 */ "LVDS_RESET#", "LVDS_BLT_EN", "", "LVDS_PWR_EN", > > + /* 08 */ "", "", "", "", > > + /* 12 */ "", "", "", "", > > + /* 16 */ "X1_9", "X1_19", "X1_15", "X1_11", > > + /* 20 */ "X1_13", "X1_7", "", "CAM_TRIGGER", > > + /* 24 */ "CAM_SYNC", "", "X1_5", "", > > + /* 28 */ "", "", "", ""; > > +}; > > + > > +&gpio4 { > > + gpio-line-names = > > + /* 00 */ "", "", "", "", > > + /* 04 */ "", "", "", "", > > + /* 08 */ "", "", "", "", > > + /* 12 */ "", "", "", "", > > + /* 16 */ "", "", "", "", > > + /* 20 */ "", "", "", "", > > + /* 24 */ "", "", "", "", > > + /* 28 */ "", "DSI_GPIO", "", ""; > > +}; > > + > > +&lpi2c3 { > > + #address-cells = <1>; > > + #size-cells = <0>; > > + clock-frequency = <400000>; > > + pinctrl-names = "default", "gpio"; > > + pinctrl-0 = <&pinctrl_lpi2c3>; > > + pinctrl-1 = <&pinctrl_lpi2c3_gpio>; > > + scl-gpios = <&gpio2 29 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; > > + sda-gpios = <&gpio2 28 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; > > + status = "okay"; > > + > > + expander0: gpio@70 { > > + compatible = "nxp,pca9538"; > > + reg = <0x70>; > > + gpio-controller; > > + #gpio-cells = <2>; > > + vcc-supply = <®_3v3>; > > + gpio-line-names = "ENET1_RESET#", "ENET2_RESET#", > > + "M2_KEYE_PERST#", "M2_KEYB_PERST#", > > + "M2_KEYE_W_DISABLE1#", "M2_KEYE_W_DISABLE2#", > > + "M2_KEYA_W_DISABLE1#", "12V_EN"; > > + }; > > + > > + expander1: gpio@71 { > > + compatible = "nxp,pca9538"; > > + reg = <0x71>; > > + gpio-controller; > > + #gpio-cells = <2>; > > + vcc-supply = <®_3v3>; > > + gpio-line-names = "USB_HUB_PWR", "DSI_RST#", > > + "CAM_PWR#", "CAMRST#", > > + "M2_KEYB_FULL_CARD_PWR_OFF#", "M2_KEYB_W_DISABLE2#", > > + "M2_KEYB_RST#", "M2_KEYB_DPR"; > > + > > + /* > > + * Controls the LTE card FULL_CARD_PWR_OFF pin which is low active > > + * as power down signal. The output-low states, the signal > > + * is inactive, e.g. not power down > > + */ > > + full-card-power-off-hog { > > + gpio-hog; > > + gpios = <4 GPIO_ACTIVE_LOW>; > > + output-low; > > + line-name = "M2_KEYB_FULL_CARD_PWR_OFF#"; > > + }; > > + > > + /* > > + * Controls the LTE card reset pin which is low active > > + * as reset signal. The output-low states, the signal > > + * is inactive, e.g. not in reset > > + */ > > + wlan-perst-hog { > > + gpio-hog; > > + gpios = <6 GPIO_ACTIVE_LOW>; > > + output-low; > > + line-name = "M2_KEYB_RST#"; > > + }; > > + }; > > +}; > > + > > +&lpspi6 { > > + pinctrl-names = "default"; > > + pinctrl-0 = <&pinctrl_lpspi6>, <&pinctrl_lpspi6_cs>; > > + cs-gpios = <&gpio2 0 GPIO_ACTIVE_LOW>; > > + status = "okay"; > > +}; > > + > > +&lpuart1 { > > + pinctrl-names = "default"; > > + pinctrl-0 = <&pinctrl_uart1>; > > + status = "okay"; > > +}; > > + > > +/* disabled per default, console for M33 */ > > +&lpuart3 { > > + pinctrl-names = "default"; > > + pinctrl-0 = <&pinctrl_uart3>; > > + status = "disabled"; > > +}; > > + > > +/* disabled per default, used for bluetooth on M.2 slot */ > > +&lpuart7 { > > + pinctrl-names = "default"; > > + pinctrl-0 = <&pinctrl_uart7>; > > + uart-has-rtscts; > > + status = "disabled"; > > +}; > > + > > +&lpuart8 { > > + pinctrl-names = "default"; > > + pinctrl-0 = <&pinctrl_uart8>; > > + status = "okay"; > > +}; > > + > > +&pcf85063 { > > + /* RTC_EVENT# from SoM is connected on mainboard */ > > + pinctrl-names = "default"; > > + pinctrl-0 = <&pinctrl_pcf85063>; > > + interrupt-parent = <&gpio1>; > > + interrupts = <14 IRQ_TYPE_EDGE_FALLING>; > > +}; > > + > > +&tpm5 { > > + pinctrl-names = "default"; > > + pinctrl-0 = <&pinctrl_tpm5>; > > +}; > > + > > +&usbotg1 { > > + disable-over-current; > > + dr_mode = "peripheral"; > > + samsung,picophy-pre-emp-curr-control = <3>; > > + samsung,picophy-dc-vol-level-adjust = <7>; > > + status = "okay"; > > +}; > > + > > +&usbotg2 { > > + pinctrl-names = "default"; > > + pinctrl-0 = <&pinctrl_usbhub>; > > + #address-cells = <1>; > > + #size-cells = <0>; > > + disable-over-current; > > + dr_mode = "host"; > > + vbus-supply = <®_5v0_usb>; > > + samsung,picophy-pre-emp-curr-control = <3>; > > + samsung,picophy-dc-vol-level-adjust = <7>; > > + status = "okay"; > > + > > + hub_2_0: usb-hub@1 { > > + compatible = "usb424,2517"; > > + reg = <1>; > > + reset-gpios = <&gpio2 22 GPIO_ACTIVE_LOW>; > > + vdd-supply = <®_3v3>; > > + }; > > +}; > > + > > +&usdhc2 { > > + pinctrl-names = "default", "state_100mhz", "state_200mhz"; > > + pinctrl-0 = <&pinctrl_usdhc2_hs>, <&pinctrl_usdhc2_gpio>; > > + pinctrl-1 = <&pinctrl_usdhc2_uhs>, <&pinctrl_usdhc2_gpio>; > > + pinctrl-2 = <&pinctrl_usdhc2_uhs>, <&pinctrl_usdhc2_gpio>; > > + bus-width = <4>; > > + cd-gpios = <&gpio3 0 GPIO_ACTIVE_LOW>; > > + disable-wp; > > + no-sdio; > > + no-mmc; > > + vmmc-supply = <®_usdhc2_vmmc>; > > + status = "okay"; > > +}; > > + > > +&usdhc3 { > > + pinctrl-names = "default"; > > + pinctrl-0 = <&pinctrl_usdhc3>; > > + bus-width = <4>; > > + non-removable; > > + vmmc-supply = <®_3v3>; > > +}; > > + > > +&iomuxc { > > + pinctrl_backlight: backlightgrp { > > + fsl,pins = /* HYS | PD | FSEL_2 | DSE X4 */ > > + <MX93_PAD_GPIO_IO05__GPIO2_IO05 0x011e>; > > + }; > > + > > + pinctrl_display: displaygrp { > > + fsl,pins = /* HYS | PD | FSEL_2 | DSE X4 */ > > + <MX93_PAD_GPIO_IO07__GPIO2_IO07 0x011e>; > > + }; > > + > > + pinctrl_eqos: eqosgrp { > > + fsl,pins = /* PD | FSEL_2 | DSE X4 */ > > + <MX93_PAD_ENET1_MDC__ENET_QOS_MDC 0x51e>, > > + /* SION | HYS | FSEL_2 | DSE X4 */ > > + <MX93_PAD_ENET1_MDIO__ENET_QOS_MDIO 0x4000111e>, > > + /* HYS | FSEL_0 | DSE no drive */ > > + <MX93_PAD_ENET1_RD0__ENET_QOS_RGMII_RD0 0x1000>, > > + <MX93_PAD_ENET1_RD1__ENET_QOS_RGMII_RD1 0x1000>, > > + <MX93_PAD_ENET1_RD2__ENET_QOS_RGMII_RD2 0x1000>, > > + <MX93_PAD_ENET1_RD3__ENET_QOS_RGMII_RD3 0x1000>, > > + <MX93_PAD_ENET1_RX_CTL__ENET_QOS_RGMII_RX_CTL 0x1000>, > > + /* HYS | PD | FSEL_0 | DSE no drive */ > > + <MX93_PAD_ENET1_RXC__CCM_ENET_QOS_CLOCK_GENERATE_RX_CLK 0x1400>, > > + /* PD | FSEL_2 | DSE X5 */ > > + <MX93_PAD_ENET1_TD0__ENET_QOS_RGMII_TD0 0x53e>, > > + <MX93_PAD_ENET1_TD1__ENET_QOS_RGMII_TD1 0x53e>, > > + <MX93_PAD_ENET1_TD2__ENET_QOS_RGMII_TD2 0x53e>, > > + <MX93_PAD_ENET1_TD3__ENET_QOS_RGMII_TD3 0x53e>, > > + <MX93_PAD_ENET1_TX_CTL__ENET_QOS_RGMII_TX_CTL 0x53e>, > > + /* PD | FSEL_3 | DSE X4 */ > > + <MX93_PAD_ENET1_TXC__CCM_ENET_QOS_CLOCK_GENERATE_TX_CLK 0x59e>; > > + }; > > + > > + pinctrl_eqos_phy: eqosphygrp { > > + fsl,pins = /* HYS | FSEL_0 | DSE no drive */ > > + <MX93_PAD_CCM_CLKO1__GPIO3_IO26 0x1000>; > > + }; > > + > > + pinctrl_fec: fecgrp { > > + fsl,pins = /* PD | FSEL_2 | DSE X4 */ > > + <MX93_PAD_ENET2_MDC__ENET1_MDC 0x51e>, > > + /* SION | HYS | FSEL_2 | DSE X4 */ > > + <MX93_PAD_ENET2_MDIO__ENET1_MDIO 0x4000111e>, > > + /* HYS | FSEL_0 | DSE no drive */ > > + <MX93_PAD_ENET2_RD0__ENET1_RGMII_RD0 0x1000>, > > + <MX93_PAD_ENET2_RD1__ENET1_RGMII_RD1 0x1000>, > > + <MX93_PAD_ENET2_RD2__ENET1_RGMII_RD2 0x1000>, > > + <MX93_PAD_ENET2_RD3__ENET1_RGMII_RD3 0x1000>, > > + <MX93_PAD_ENET2_RX_CTL__ENET1_RGMII_RX_CTL 0x1000>, > > + /* HYS | PD | FSEL_0 | DSE no drive */ > > + <MX93_PAD_ENET2_RXC__ENET1_RGMII_RXC 0x1400>, > > + /* PD | FSEL_2 | DSE X5 */ > > + <MX93_PAD_ENET2_TD0__ENET1_RGMII_TD0 0x53e>, > > + <MX93_PAD_ENET2_TD1__ENET1_RGMII_TD1 0x53e>, > > + <MX93_PAD_ENET2_TD2__ENET1_RGMII_TD2 0x53e>, > > + <MX93_PAD_ENET2_TD3__ENET1_RGMII_TD3 0x53e>, > > + <MX93_PAD_ENET2_TX_CTL__ENET1_RGMII_TX_CTL 0x53e>, > > + /* PD | FSEL_3 | DSE X4 */ > > + <MX93_PAD_ENET2_TXC__ENET1_RGMII_TXC 0x59e>; > > + }; > > + > > + pinctrl_fec_phy: fecphygrp { > > + fsl,pins = /* HYS | FSEL_0 | DSE no drive */ > > + <MX93_PAD_CCM_CLKO2__GPIO3_IO27 0x1000>; > > + }; > > + > > + pinctrl_flexcan1: flexcan1grp { > > + fsl,pins = /* HYS | PU | FSEL_0 | DSE no drive */ > > + <MX93_PAD_PDM_BIT_STREAM0__CAN1_RX 0x1200>, > > + /* PU | FSEL_3 | DSE X4 */ > > + <MX93_PAD_PDM_CLK__CAN1_TX 0x039e>; > > + }; > > + > > + pinctrl_flexcan2: flexcan2grp { > > + fsl,pins = /* HYS | PU | FSEL_0 | DSE no drive */ > > + <MX93_PAD_GPIO_IO27__CAN2_RX 0x1200>, > > + /* PU | FSEL_3 | DSE X4 */ > > + <MX93_PAD_GPIO_IO25__CAN2_TX 0x039e>; > > + }; > > + > > + pinctrl_gpio2: gpio2grp { > > + fsl,pins = /* HYS | PD | FSEL_2 | DSE X4 */ > > + <MX93_PAD_GPIO_IO16__GPIO2_IO16 0x151e>, > > + <MX93_PAD_GPIO_IO17__GPIO2_IO17 0x151e>, > > + <MX93_PAD_GPIO_IO18__GPIO2_IO18 0x151e>, > > + <MX93_PAD_GPIO_IO19__GPIO2_IO19 0x151e>, > > + <MX93_PAD_GPIO_IO20__GPIO2_IO20 0x151e>, > > + <MX93_PAD_GPIO_IO21__GPIO2_IO21 0x151e>, > > + <MX93_PAD_GPIO_IO26__GPIO2_IO26 0x151e>; > > + }; > > + > > + pinctrl_jtag: jtaggrp { > > + fsl,pins = <MX93_PAD_DAP_TCLK_SWCLK__JTAG_MUX_TCK 0x051e>, > > + <MX93_PAD_DAP_TDI__JTAG_MUX_TDI 0x1200>, > > + <MX93_PAD_DAP_TDO_TRACESWO__JTAG_MUX_TDO 0x031e>, > > + <MX93_PAD_DAP_TMS_SWDIO__JTAG_MUX_TMS 0x1200>; > > + }; > > + > > + pinctrl_lpi2c3: lpi2c3grp { > > + fsl,pins = /* SION | HYS | OD | FSEL_3 | DSE X4 */ > > + <MX93_PAD_GPIO_IO28__LPI2C3_SDA 0x4000199e>, > > + <MX93_PAD_GPIO_IO29__LPI2C3_SCL 0x4000199e>; > > + }; > > + > > + pinctrl_lpi2c3_gpio: lpi2c3-gpiogrp { > > + fsl,pins = /* SION | HYS | OD | FSEL_3 | DSE X4 */ > > + <MX93_PAD_GPIO_IO28__GPIO2_IO28 0x4000199e>, > > + <MX93_PAD_GPIO_IO29__GPIO2_IO29 0x4000199e>; > > + }; > > + > > + pinctrl_lpspi6: lpspi6grp { > > + fsl,pins = /* HYS | PD | FSEL_0 | DSE no drive */ > > + <MX93_PAD_GPIO_IO01__LPSPI6_SIN 0x1400>, > > + /* PD | FSEL_2 | DSE X4 */ > > + <MX93_PAD_GPIO_IO02__LPSPI6_SOUT 0x051e>, > > + <MX93_PAD_GPIO_IO03__LPSPI6_SCK 0x051e>; > > + }; > > + > > + pinctrl_lpspi6_cs: lpspi6csgrp { > > + fsl,pins = /* FSEL_2 | DSE X4 */ > > + <MX93_PAD_GPIO_IO00__GPIO2_IO00 0x011e>; > > + }; > > + > > + pinctrl_m2_key_b: m2keybgrp { > > + fsl,pins = <MX93_PAD_SAI1_TXC__GPIO1_IO12 0x00001000>, > > + <MX93_PAD_SAI1_TXD0__GPIO1_IO13 0x00001000>; > > + }; > > + > > + pinctrl_m2_key_e: m2keyegrp { > > + fsl,pins = <MX93_PAD_I2C2_SCL__GPIO1_IO02 0x00001000>, > > + <MX93_PAD_UART2_RXD__GPIO1_IO06 0x00001000>, > > + <MX93_PAD_UART2_TXD__GPIO1_IO07 0x00001000>, > > + <MX93_PAD_SAI1_TXFS__GPIO1_IO11 0x00001000>; > > + }; > > + > > + /*CAM_MCLK, DSI_GPIO, CAM_TRIGGER, CAM_SYNC*/ > > + pinctrl_mipi_csi_dsi: mipi_csi_dsigrp { > > + fsl,pins = <MX93_PAD_CCM_CLKO3__CCMSRCGPCMIX_CLKO3 0x0000011e>, > > + <MX93_PAD_CCM_CLKO4__GPIO4_IO29 0x0000011e>, > > + <MX93_PAD_GPIO_IO23__GPIO2_IO23 0x0000011e>, > > + <MX93_PAD_GPIO_IO24__GPIO2_IO24 0x0000111e>; > > + }; > > + > > + pinctrl_pcf85063: pcf85063grp { > > + fsl,pins = /* HYS | FSEL_0 | No DSE */ > > + <MX93_PAD_SAI1_RXD0__GPIO1_IO14 0x1000>; > > + }; > > + > > + pinctrl_tpm5: tpm5grp { > > + fsl,pins = <MX93_PAD_GPIO_IO06__TPM5_CH0 0x57e>; > > + }; > > + > > + pinctrl_uart1: uart1grp { > > + fsl,pins = /* HYS | FSEL_0 | No DSE */ > > + <MX93_PAD_UART1_RXD__LPUART1_RX 0x1000>, > > + /* FSEL_2 | DSE X4 */ > > + <MX93_PAD_UART1_TXD__LPUART1_TX 0x011e>; > > + }; > > + > > + pinctrl_uart3: uart3grp { > > + fsl,pins = /* HYS | FSEL_0 | No DSE */ > > + <MX93_PAD_GPIO_IO15__LPUART3_RX 0x1000>, > > + /* FSEL_2 | DSE X4 */ > > + <MX93_PAD_GPIO_IO14__LPUART3_TX 0x011e>; > > + }; > > + > > + pinctrl_uart7: uart7grp { > > + fsl,pins = <MX93_PAD_GPIO_IO08__LPUART7_TX 0x031e>, > > + <MX93_PAD_GPIO_IO09__LPUART7_RX 0x031e>, > > + <MX93_PAD_GPIO_IO10__LPUART7_CTS_B 0x031e>, > > + <MX93_PAD_GPIO_IO11__LPUART7_RTS_B 0x031e>; > > + }; > > + > > + pinctrl_uart8: uart8grp { > > + fsl,pins = /* HYS | FSEL_0 | No DSE */ > > + <MX93_PAD_GPIO_IO13__LPUART8_RX 0x1000>, > > + /* FSEL_2 | DSE X4 */ > > + <MX93_PAD_GPIO_IO12__LPUART8_TX 0x011e>; > > + }; > > + > > + pinctrl_usbhub: usbhubgrp { > > + fsl,pins = /* HYS | PD | FSEL_2 | DSE X4 */ > > + <MX93_PAD_GPIO_IO22__GPIO2_IO22 0x151e>; > > + }; > > + > > + pinctrl_usdhc2_gpio: usdhc2gpiogrp { > > + fsl,pins = /* HYS | FSEL_0 | No DSE */ > > + <MX93_PAD_SD2_CD_B__GPIO3_IO00 0x1000>; > > + }; > > + > > + /* enable SION for data and cmd pad due to ERR052021 */ > > + pinctrl_usdhc2_hs: usdhc2hsgrp { > > + fsl,pins = /* PD | FSEL_3 | DSE X5 */ > > + <MX93_PAD_SD2_CLK__USDHC2_CLK 0x05be>, > > + /* HYS | PU | FSEL_3 | DSE X4 */ > > + <MX93_PAD_SD2_CMD__USDHC2_CMD 0x4000139e>, > > + /* HYS | PU | FSEL_3 | DSE X3 */ > > + <MX93_PAD_SD2_DATA0__USDHC2_DATA0 0x4000138e>, > > + <MX93_PAD_SD2_DATA1__USDHC2_DATA1 0x4000138e>, > > + <MX93_PAD_SD2_DATA2__USDHC2_DATA2 0x4000138e>, > > + <MX93_PAD_SD2_DATA3__USDHC2_DATA3 0x4000138e>, > > + /* FSEL_2 | DSE X3 */ > > + <MX93_PAD_SD2_VSELECT__USDHC2_VSELECT 0x010e>; > > + }; > > + > > + /* enable SION for data and cmd pad due to ERR052021 */ > > + pinctrl_usdhc2_uhs: usdhc2uhsgrp { > > + fsl,pins = /* PD | FSEL_3 | DSE X6 */ > > + <MX93_PAD_SD2_CLK__USDHC2_CLK 0x05fe>, > > + /* HYS | PU | FSEL_3 | DSE X4 */ > > + <MX93_PAD_SD2_CMD__USDHC2_CMD 0x4000139e>, > > + <MX93_PAD_SD2_DATA0__USDHC2_DATA0 0x4000139e>, > > + <MX93_PAD_SD2_DATA1__USDHC2_DATA1 0x4000139e>, > > + <MX93_PAD_SD2_DATA2__USDHC2_DATA2 0x4000139e>, > > + <MX93_PAD_SD2_DATA3__USDHC2_DATA3 0x4000139e>, > > + /* FSEL_2 | DSE X3 */ > > + <MX93_PAD_SD2_VSELECT__USDHC2_VSELECT 0x010e>; > > + }; > > + > > + /* enable SION for data and cmd pad due to ERR052021 */ > > + pinctrl_usdhc3: usdhc3grp { > > + fsl,pins = /* PD | FSEL_3 | DSE X6 */ > > + <MX93_PAD_SD3_CLK__USDHC3_CLK 0x05fe>, > > + /* HYS | PU | FSEL_3 | DSE X4 */ > > + <MX93_PAD_SD3_CMD__USDHC3_CMD 0x4000139e>, > > + <MX93_PAD_SD3_DATA0__USDHC3_DATA0 0x4000139e>, > > + <MX93_PAD_SD3_DATA1__USDHC3_DATA1 0x4000139e>, > > + <MX93_PAD_SD3_DATA2__USDHC3_DATA2 0x4000139e>, > > + <MX93_PAD_SD3_DATA3__USDHC3_DATA3 0x4000139e>; > > + }; > > +}; > > -- > > 2.43.0 > > > -- TQ-Systems GmbH | Mühlstraße 2, Gut Delling | 82229 Seefeld, Germany Amtsgericht München, HRB 105018 Geschäftsführer: Detlef Schneider, Rüdiger Stahl, Stefan Schneider http://www.tq-group.com/ [-- Attachment #2: This is a digitally signed message part. --] [-- Type: application/pgp-signature, Size: 488 bytes --] ^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH 2/3] arm64: dts: freescale: add initial device tree for TQMa93xx/MBa93xxLA-MINI 2026-03-19 14:20 ` Alexander Stein @ 2026-03-21 16:05 ` Francesco Dolcini 0 siblings, 0 replies; 16+ messages in thread From: Francesco Dolcini @ 2026-03-21 16:05 UTC (permalink / raw) To: Alexander Stein, Frank Li Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam, Shawn Guo, Martin Schmiedel, devicetree, linux-kernel, imx, linux-arm-kernel, linux On Thu, Mar 19, 2026 at 03:20:30PM +0100, Alexander Stein wrote: > Am Donnerstag, 19. März 2026, 15:01:04 CET schrieb Frank Li: > > iomux is not necessary at last one. > AFAIK iomux being the last node is/was a common pattern for imx based platforms. Correct, same understanding here. Francesco ^ permalink raw reply [flat|nested] 16+ messages in thread
* [PATCH 3/3] arm64: dts: freescale: imx93-tqma9352-mba93xxla-mini: Add WLAN/BT overlay 2026-03-17 11:16 [PATCH 0/3] TQMa93xx on MBa93xxLA-Mini support Alexander Stein 2026-03-17 11:17 ` [PATCH 1/3] dt-bindings: arm: fsl: add MBa93xxLA-MINI Alexander Stein 2026-03-17 11:17 ` [PATCH 2/3] arm64: dts: freescale: add initial device tree for TQMa93xx/MBa93xxLA-MINI Alexander Stein @ 2026-03-17 11:17 ` Alexander Stein 2026-03-17 13:09 ` Daniel Baluta 2 siblings, 1 reply; 16+ messages in thread From: Alexander Stein @ 2026-03-17 11:17 UTC (permalink / raw) To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Frank Li, Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam, Shawn Guo Cc: Martin Schmiedel, devicetree, linux-kernel, imx, linux-arm-kernel, linux, Alexander Stein From: Martin Schmiedel <Martin.Schmiedel@tq-group.com> This overlay enables the LWB5+ M.2 wlan module from ezurio. Signed-off-by: Martin Schmiedel <Martin.Schmiedel@tq-group.com> Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com> --- arch/arm64/boot/dts/freescale/Makefile | 4 +++ ...3-tqma9352-mba93xxla-mini-ezurio-wlan.dtso | 35 +++++++++++++++++++ 2 files changed, 39 insertions(+) create mode 100644 arch/arm64/boot/dts/freescale/imx93-tqma9352-mba93xxla-mini-ezurio-wlan.dtso diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile index db536522600ac..9a55a86ad385b 100644 --- a/arch/arm64/boot/dts/freescale/Makefile +++ b/arch/arm64/boot/dts/freescale/Makefile @@ -495,6 +495,10 @@ imx8mm-kontron-bl-lte-dtbs := imx8mm-kontron-bl.dtb imx8mm-kontron-bl-lte.dtbo dtb-$(CONFIG_ARCH_MXC) += imx8mm-kontron-dl.dtb dtb-$(CONFIG_ARCH_MXC) += imx8mm-kontron-bl-lte.dtb +imx93-tqma9352-mba93xxla-mini-ezurio-wlan-dtbs += imx93-tqma9352-mba93xxla-mini.dtb imx93-tqma9352-mba93xxla-mini-ezurio-wlan.dtbo + +dtb-$(CONFIG_ARCH_MXC) += imx93-tqma9352-mba93xxla-mini-ezurio-wlan.dtb + imx8mm-venice-gw72xx-0x-imx219-dtbs := imx8mm-venice-gw72xx-0x.dtb imx8mm-venice-gw72xx-0x-imx219.dtbo imx8mm-venice-gw72xx-0x-rpidsi-dtbs := imx8mm-venice-gw72xx-0x.dtb imx8mm-venice-gw72xx-0x-rpidsi.dtbo imx8mm-venice-gw72xx-0x-rs232-rts-dtbs := imx8mm-venice-gw72xx-0x.dtb imx8mm-venice-gw72xx-0x-rs232-rts.dtbo diff --git a/arch/arm64/boot/dts/freescale/imx93-tqma9352-mba93xxla-mini-ezurio-wlan.dtso b/arch/arm64/boot/dts/freescale/imx93-tqma9352-mba93xxla-mini-ezurio-wlan.dtso new file mode 100644 index 0000000000000..12a14d8711035 --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx93-tqma9352-mba93xxla-mini-ezurio-wlan.dtso @@ -0,0 +1,35 @@ +// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT) +/* + * Copyright (c) 2025-2026 TQ-Systems GmbH <linux@ew.tq-group.com>, + * D-82229 Seefeld, Germany. + * Author: Martin Schmiedel + */ + +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/interrupt-controller/irq.h> + +/dts-v1/; +/plugin/; + +&lpuart7 { + status = "okay"; + + bluetooth { + compatible = "brcm,bcm4329-bt"; + vbat-supply = <®_3v3>; + vddio-supply = <®_3v3>; + shutdown-gpios = <&expander0 5 GPIO_ACTIVE_HIGH>; + }; +}; + +&usdhc3 { + #address-cells = <1>; + #size-cells = <0>; + status = "okay"; + + brcmf_sdio: wifi@1 { + compatible = "brcm,bcm4329-fmac"; + reg = <1>; + reset-gpios = <&gpio1 11 GPIO_ACTIVE_LOW>; + }; +}; -- 2.43.0 ^ permalink raw reply related [flat|nested] 16+ messages in thread
* Re: [PATCH 3/3] arm64: dts: freescale: imx93-tqma9352-mba93xxla-mini: Add WLAN/BT overlay 2026-03-17 11:17 ` [PATCH 3/3] arm64: dts: freescale: imx93-tqma9352-mba93xxla-mini: Add WLAN/BT overlay Alexander Stein @ 2026-03-17 13:09 ` Daniel Baluta 2026-03-17 15:50 ` Alexander Stein 0 siblings, 1 reply; 16+ messages in thread From: Daniel Baluta @ 2026-03-17 13:09 UTC (permalink / raw) To: Alexander Stein, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Frank Li, Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam, Shawn Guo Cc: Martin Schmiedel, devicetree, linux-kernel, imx, linux-arm-kernel, linux On 3/17/26 13:17, Alexander Stein wrote: > From: Martin Schmiedel <Martin.Schmiedel@tq-group.com> > > This overlay enables the LWB5+ M.2 wlan module from ezurio. > > Signed-off-by: Martin Schmiedel <Martin.Schmiedel@tq-group.com> > Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com> I was expecting this patch to be in line with this comment: /* * Display is not fixed, so compatible has to be added from * DT overlay */ ^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH 3/3] arm64: dts: freescale: imx93-tqma9352-mba93xxla-mini: Add WLAN/BT overlay 2026-03-17 13:09 ` Daniel Baluta @ 2026-03-17 15:50 ` Alexander Stein 2026-03-18 11:39 ` Daniel Baluta 0 siblings, 1 reply; 16+ messages in thread From: Alexander Stein @ 2026-03-17 15:50 UTC (permalink / raw) To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Frank Li, Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam, Shawn Guo, Daniel Baluta Cc: Martin Schmiedel, devicetree, linux-kernel, imx, linux-arm-kernel, linux Am Dienstag, 17. März 2026, 14:09:42 CET schrieb Daniel Baluta: > On 3/17/26 13:17, Alexander Stein wrote: > > From: Martin Schmiedel <Martin.Schmiedel@tq-group.com> > > > > This overlay enables the LWB5+ M.2 wlan module from ezurio. > > > > Signed-off-by: Martin Schmiedel <Martin.Schmiedel@tq-group.com> > > Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com> > > I was expecting this patch to be in line with this comment: > > /* > * Display is not fixed, so compatible has to be added from > * DT overlay > */ Well, the DT overlay from this patch is only about the WiFi and Bluetooth module. Display overlay is a different one, yet to be included as this depends on [1]. I need to respin this after imx91/imx93 pdfc patch is included. But if it is preferred to not include backlight/display until the display overlay is available, I'm fine with that as well. Best regards, Alexander [1] https://lore.kernel.org/all/20250304154929.1785200-1-alexander.stein@ew.tq-group.com/ -- TQ-Systems GmbH | Mühlstraße 2, Gut Delling | 82229 Seefeld, Germany Amtsgericht München, HRB 105018 Geschäftsführer: Detlef Schneider, Rüdiger Stahl, Stefan Schneider http://www.tq-group.com/ ^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH 3/3] arm64: dts: freescale: imx93-tqma9352-mba93xxla-mini: Add WLAN/BT overlay 2026-03-17 15:50 ` Alexander Stein @ 2026-03-18 11:39 ` Daniel Baluta 0 siblings, 0 replies; 16+ messages in thread From: Daniel Baluta @ 2026-03-18 11:39 UTC (permalink / raw) To: Alexander Stein, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Frank Li, Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam, Shawn Guo Cc: Martin Schmiedel, devicetree, linux-kernel, imx, linux-arm-kernel, linux On 3/17/26 17:50, Alexander Stein wrote: > Am Dienstag, 17. März 2026, 14:09:42 CET schrieb Daniel Baluta: >> On 3/17/26 13:17, Alexander Stein wrote: >>> From: Martin Schmiedel <Martin.Schmiedel@tq-group.com> >>> >>> This overlay enables the LWB5+ M.2 wlan module from ezurio. >>> >>> Signed-off-by: Martin Schmiedel <Martin.Schmiedel@tq-group.com> >>> Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com> >> I was expecting this patch to be in line with this comment: >> >> /* >> * Display is not fixed, so compatible has to be added from >> * DT overlay >> */ > Well, the DT overlay from this patch is only about the WiFi and > Bluetooth module. Display overlay is a different one, yet to be > included as this depends on [1]. I need to respin this after > imx91/imx93 pdfc patch is included. > > But if it is preferred to not include backlight/display until the > display overlay is available, I'm fine with that as well. To avoid confusion until there is a user for this you should keep it out. ^ permalink raw reply [flat|nested] 16+ messages in thread
end of thread, other threads:[~2026-03-21 16:05 UTC | newest] Thread overview: 16+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2026-03-17 11:16 [PATCH 0/3] TQMa93xx on MBa93xxLA-Mini support Alexander Stein 2026-03-17 11:17 ` [PATCH 1/3] dt-bindings: arm: fsl: add MBa93xxLA-MINI Alexander Stein 2026-03-17 13:03 ` Daniel Baluta 2026-03-17 11:17 ` [PATCH 2/3] arm64: dts: freescale: add initial device tree for TQMa93xx/MBa93xxLA-MINI Alexander Stein 2026-03-17 12:10 ` Krzysztof Kozlowski 2026-03-17 12:14 ` Alexander Stein 2026-03-18 14:49 ` Andrew Lunn 2026-03-19 11:25 ` Alexander Stein 2026-03-19 13:30 ` Andrew Lunn 2026-03-19 14:01 ` Frank Li 2026-03-19 14:20 ` Alexander Stein 2026-03-21 16:05 ` Francesco Dolcini 2026-03-17 11:17 ` [PATCH 3/3] arm64: dts: freescale: imx93-tqma9352-mba93xxla-mini: Add WLAN/BT overlay Alexander Stein 2026-03-17 13:09 ` Daniel Baluta 2026-03-17 15:50 ` Alexander Stein 2026-03-18 11:39 ` Daniel Baluta
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