From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C59F1C3271E for ; Mon, 8 Jul 2024 16:25:08 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Type:MIME-Version: References:Message-ID:In-Reply-To:Subject:cc:To:Date:From:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=N9pAIv8g4CTPh1KMMAg8r9nckv9mOnd06xUNXnTJAR0=; b=Q09ZWPCjjhtpVNSmH8NAB2qkNd VEJ2X7pH5nesqIIDFiUhF88FelLaVmV6fChm0fxLM85PC/F3WuUdRCyORLF79X9Zi6shmcaTffVAu smsWgdSlfyEQDYM2KxK0bTeziTvtMucj5+Z2a10Tl9kTEHv8kYvSzxcjT8umOch+e/jrDdmtz/2dB Tjt8LrtgXBl0jCgqXKgpmZ3fGp9r7FGhJZ0gQ+4bc98hLQZHOJ8GIrcmmVK6cyIWHtxHAPRy+rU8C Q9irXv0ybGIn8eJFdlpSteVbGySBzV7NWNauj6VSfYUCs7CaDYrGui48GPrRkJLJVwnNFTbhuIH1y QCONyWTA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sQrAg-00000004Qf5-0Qyu; Mon, 08 Jul 2024 16:24:58 +0000 Received: from mgamail.intel.com ([198.175.65.14]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sQrAR-00000004QcP-2naz for linux-arm-kernel@lists.infradead.org; Mon, 08 Jul 2024 16:24:45 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1720455884; x=1751991884; h=from:date:to:cc:subject:in-reply-to:message-id: references:mime-version; bh=FQDT/lNDmY60y4nCoXVPj+tsYjbRMG1XBvIoIXhy4hk=; b=Hs2BhbaayMLXDDWuvaCKxGXFprW0DFCSsD3NQwVahVTXxGpYrO+iEhcT ws4FM63E4DrN6neeJS/MSuBe4fwAMKbl73JPIQjzFK9jDYbGNUlizqbZi 63UXz5lV6j+DDPcHcUffKiqD9n7gPqO3i4K7I5PYwNZ2zhRD/EywBLEbo 7ehQ5xL7cAPe8PlW7vk96n+JMq+ijYsbo5QlpK7RYs1oUwILENYlw2zGp +vyciN8VfFOh8B2EqDjhdL/rPWsziVGnwr6RP8+nW9Icqpj0C4/uLQmEj fcVsHNC8I6MzmSAADob5dL0p2qdGUp0LPqzWjl7BhlRhAIjjbDkHbzMr6 Q==; X-CSE-ConnectionGUID: oZquAdfBTQO0ND/CdpDHHw== X-CSE-MsgGUID: mJFLzk78SfKtsEyrxI6mnQ== X-IronPort-AV: E=McAfee;i="6700,10204,11127"; a="21480865" X-IronPort-AV: E=Sophos;i="6.09,192,1716274800"; d="scan'208";a="21480865" Received: from orviesa001.jf.intel.com ([10.64.159.141]) by orvoesa106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Jul 2024 09:24:43 -0700 X-CSE-ConnectionGUID: wo1+6E5XRTi9gU7RF4zM5A== X-CSE-MsgGUID: kVsAl6alRgW+v/ehSrz64A== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.09,192,1716274800"; d="scan'208";a="85104143" Received: from ijarvine-desk1.ger.corp.intel.com (HELO localhost) ([10.245.247.115]) by smtpauth.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Jul 2024 09:24:39 -0700 From: =?UTF-8?q?Ilpo=20J=C3=A4rvinen?= Date: Mon, 8 Jul 2024 19:24:36 +0300 (EEST) To: =?ISO-8859-15?Q?Marek_Beh=FAn?= cc: Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Thomas Gleixner , linux-arm-kernel@lists.infradead.org, arm@kernel.org, Andy Shevchenko , Hans de Goede Subject: Re: [PATCH v3 02/10] irqchip/armada-370-xp: Change register constant suffix from _MSK to _MASK In-Reply-To: <20240708151801.11592-3-kabel@kernel.org> Message-ID: <341f153e-e8a8-a856-8fcc-44d347f39631@linux.intel.com> References: <20240708151801.11592-1-kabel@kernel.org> <20240708151801.11592-3-kabel@kernel.org> MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="8323328-873564113-1720455876=:1343" X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240708_092443_770666_0884CA0C X-CRM114-Status: GOOD ( 17.31 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org This message is in MIME format. The first part should be readable text, while the remaining parts are likely unreadable without MIME-aware tools. --8323328-873564113-1720455876=:1343 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: QUOTED-PRINTABLE On Mon, 8 Jul 2024, Marek Beh=C3=BAn wrote: > There is one occurrence of suffix _MSK in register constants, others > have _MASK instead. Change the one to _MASK for consistency. >=20 > Signed-off-by: Marek Beh=C3=BAn > Reviewed-by: Andrew Lunn > --- > drivers/irqchip/irq-armada-370-xp.c | 20 ++++++++++---------- > 1 file changed, 10 insertions(+), 10 deletions(-) >=20 > diff --git a/drivers/irqchip/irq-armada-370-xp.c b/drivers/irqchip/irq-ar= mada-370-xp.c > index 66d6a2ebc8a5..588a9e2e1887 100644 > --- a/drivers/irqchip/irq-armada-370-xp.c > +++ b/drivers/irqchip/irq-armada-370-xp.c > @@ -126,7 +126,7 @@ > =20 > /* Registers relative to per_cpu_int_base */ > #define ARMADA_370_XP_IN_DRBEL_CAUSE=09=09(0x08) > -#define ARMADA_370_XP_IN_DRBEL_MSK=09=09(0x0c) > +#define ARMADA_370_XP_IN_DRBEL_MASK=09=09(0x0c) > #define ARMADA_375_PPI_CAUSE=09=09=09(0x10) > #define ARMADA_370_XP_CPU_INTACK=09=09(0x44) > #define ARMADA_370_XP_INT_SET_MASK=09=09(0x48) > @@ -324,9 +324,9 @@ static void armada_370_xp_msi_reenable_percpu(void) > =09u32 reg; > =20 > =09/* Enable MSI doorbell mask and combined cpu local interrupt */ > -=09reg =3D readl(per_cpu_int_base + ARMADA_370_XP_IN_DRBEL_MSK); > +=09reg =3D readl(per_cpu_int_base + ARMADA_370_XP_IN_DRBEL_MASK); > =09reg |=3D msi_doorbell_mask(); > -=09writel(reg, per_cpu_int_base + ARMADA_370_XP_IN_DRBEL_MSK); > +=09writel(reg, per_cpu_int_base + ARMADA_370_XP_IN_DRBEL_MASK); > =20 > =09/* Unmask local doorbell interrupt */ > =09writel(1, per_cpu_int_base + ARMADA_370_XP_INT_CLEAR_MASK); > @@ -394,17 +394,17 @@ static struct irq_domain *ipi_domain; > static void armada_370_xp_ipi_mask(struct irq_data *d) > { > =09u32 reg; > -=09reg =3D readl(per_cpu_int_base + ARMADA_370_XP_IN_DRBEL_MSK); > +=09reg =3D readl(per_cpu_int_base + ARMADA_370_XP_IN_DRBEL_MASK); > =09reg &=3D ~BIT(d->hwirq); > -=09writel(reg, per_cpu_int_base + ARMADA_370_XP_IN_DRBEL_MSK); > +=09writel(reg, per_cpu_int_base + ARMADA_370_XP_IN_DRBEL_MASK); > } > =20 > static void armada_370_xp_ipi_unmask(struct irq_data *d) > { > =09u32 reg; > -=09reg =3D readl(per_cpu_int_base + ARMADA_370_XP_IN_DRBEL_MSK); > +=09reg =3D readl(per_cpu_int_base + ARMADA_370_XP_IN_DRBEL_MASK); > =09reg |=3D BIT(d->hwirq); > -=09writel(reg, per_cpu_int_base + ARMADA_370_XP_IN_DRBEL_MSK); > +=09writel(reg, per_cpu_int_base + ARMADA_370_XP_IN_DRBEL_MASK); > } > =20 > static void armada_370_xp_ipi_send_mask(struct irq_data *d, > @@ -539,7 +539,7 @@ static void armada_xp_mpic_smp_cpu_init(void) > =09=09return; > =20 > =09/* Disable all IPIs */ > -=09writel(0, per_cpu_int_base + ARMADA_370_XP_IN_DRBEL_MSK); > +=09writel(0, per_cpu_int_base + ARMADA_370_XP_IN_DRBEL_MASK); > =20 > =09/* Clear pending IPIs */ > =09writel(0, per_cpu_int_base + ARMADA_370_XP_IN_DRBEL_CAUSE); > @@ -740,7 +740,7 @@ armada_370_xp_handle_irq(struct pt_regs *regs) > =20 > static int armada_370_xp_mpic_suspend(void) > { > -=09doorbell_mask_reg =3D readl(per_cpu_int_base + ARMADA_370_XP_IN_DRBEL= _MSK); > +=09doorbell_mask_reg =3D readl(per_cpu_int_base + ARMADA_370_XP_IN_DRBEL= _MASK); > =09return 0; > } > =20 > @@ -785,7 +785,7 @@ static void armada_370_xp_mpic_resume(void) > =20 > =09/* Reconfigure doorbells for IPIs and MSIs */ > =09writel(doorbell_mask_reg, > -=09 per_cpu_int_base + ARMADA_370_XP_IN_DRBEL_MSK); > +=09 per_cpu_int_base + ARMADA_370_XP_IN_DRBEL_MASK); > =20 > =09if (is_ipi_available()) { > =09=09src0 =3D doorbell_mask_reg & IPI_DOORBELL_MASK; >=20 Reviewed-by: Ilpo J=C3=A4rvinen --=20 i. --8323328-873564113-1720455876=:1343--