From: "Heiko Stübner" <heiko@sntech.de>
To: "Rafael J. Wysocki" <rafael@kernel.org>,
Daniel Lezcano <daniel.lezcano@linaro.org>,
Zhang Rui <rui.zhang@intel.com>,
Lukasz Luba <lukasz.luba@arm.com>, Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Sebastian Reichel <sebastian.reichel@collabora.com>
Cc: Robin Murphy <robin.murphy@arm.com>,
Diederik de Haas <didi.debian@cknow.org>,
linux-pm@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org,
devicetree@vger.kernel.org, kernel@collabora.com,
Sebastian Reichel <sebastian.reichel@collabora.com>
Subject: Re: [PATCH v2 2/3] thermal: rockchip: shut up GRF warning
Date: Wed, 20 Aug 2025 22:14:21 +0200 [thread overview]
Message-ID: <3452417.9LS3J3VOpE@diego> (raw)
In-Reply-To: <20250820-thermal-rockchip-grf-warning-v2-2-c7e2d35017b8@kernel.org>
Am Mittwoch, 20. August 2025, 19:40:48 Mitteleuropäische Sommerzeit schrieb Sebastian Reichel:
> Most of the recent Rockchip devices do not have a GRF associated
> with the tsadc IP. Let's avoid printing a warning on those devices.
>
> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
As we talked about in v1, the variants now having grf_required set,
had it set in their devicetree nodes all the time - the grf handle
was added _with_ the tsadc node.
So this does not cause any regression and just makes the
warning go away for platforms that do not use any GRF registers.
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
> ---
> drivers/thermal/rockchip_thermal.c | 23 ++++++++++++++++++-----
> 1 file changed, 18 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/thermal/rockchip_thermal.c b/drivers/thermal/rockchip_thermal.c
> index 7b18a705dfade6fa7318b28c2b57544a4446c1cc..c49ddf70f86e7beaf0190b1b3e93f5e6b2f72b2c 100644
> --- a/drivers/thermal/rockchip_thermal.c
> +++ b/drivers/thermal/rockchip_thermal.c
> @@ -74,6 +74,7 @@ struct chip_tsadc_table {
> * @tshut_temp: the hardware-controlled shutdown temperature value, with no trim
> * @tshut_mode: the hardware-controlled shutdown mode (0:CRU 1:GPIO)
> * @tshut_polarity: the hardware-controlled active polarity (0:LOW 1:HIGH)
> + * @grf_required: true, if a GRF is required for proper functionality
> * @initialize: SoC special initialize tsadc controller method
> * @irq_ack: clear the interrupt
> * @control: enable/disable method for the tsadc controller
> @@ -97,6 +98,9 @@ struct rockchip_tsadc_chip {
> enum tshut_mode tshut_mode;
> enum tshut_polarity tshut_polarity;
>
> + /* GRF availability */
> + bool grf_required;
> +
> /* Chip-wide methods */
> void (*initialize)(struct regmap *grf,
> void __iomem *reg, enum tshut_polarity p);
> @@ -1098,6 +1102,7 @@ static const struct rockchip_tsadc_chip px30_tsadc_data = {
> /* cpu, gpu */
> .chn_offset = 0,
> .chn_num = 2, /* 2 channels for tsadc */
> + .grf_required = true,
> .tshut_mode = TSHUT_MODE_CRU, /* default TSHUT via CRU */
> .tshut_temp = 95000,
> .initialize = rk_tsadcv4_initialize,
> @@ -1119,6 +1124,7 @@ static const struct rockchip_tsadc_chip rv1108_tsadc_data = {
> /* cpu */
> .chn_offset = 0,
> .chn_num = 1, /* one channel for tsadc */
> + .grf_required = false,
> .tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */
> .tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
> .tshut_temp = 95000,
> @@ -1141,6 +1147,7 @@ static const struct rockchip_tsadc_chip rk3228_tsadc_data = {
> /* cpu */
> .chn_offset = 0,
> .chn_num = 1, /* one channel for tsadc */
> + .grf_required = false,
> .tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */
> .tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
> .tshut_temp = 95000,
> @@ -1163,6 +1170,7 @@ static const struct rockchip_tsadc_chip rk3288_tsadc_data = {
> /* cpu, gpu */
> .chn_offset = 1,
> .chn_num = 2, /* two channels for tsadc */
> + .grf_required = false,
> .tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */
> .tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
> .tshut_temp = 95000,
> @@ -1185,6 +1193,7 @@ static const struct rockchip_tsadc_chip rk3328_tsadc_data = {
> /* cpu */
> .chn_offset = 0,
> .chn_num = 1, /* one channels for tsadc */
> + .grf_required = false,
> .tshut_mode = TSHUT_MODE_CRU, /* default TSHUT via CRU */
> .tshut_temp = 95000,
> .initialize = rk_tsadcv2_initialize,
> @@ -1206,6 +1215,7 @@ static const struct rockchip_tsadc_chip rk3366_tsadc_data = {
> /* cpu, gpu */
> .chn_offset = 0,
> .chn_num = 2, /* two channels for tsadc */
> + .grf_required = true,
> .tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */
> .tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
> .tshut_temp = 95000,
> @@ -1228,6 +1238,7 @@ static const struct rockchip_tsadc_chip rk3368_tsadc_data = {
> /* cpu, gpu */
> .chn_offset = 0,
> .chn_num = 2, /* two channels for tsadc */
> + .grf_required = false,
> .tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */
> .tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
> .tshut_temp = 95000,
> @@ -1250,6 +1261,7 @@ static const struct rockchip_tsadc_chip rk3399_tsadc_data = {
> /* cpu, gpu */
> .chn_offset = 0,
> .chn_num = 2, /* two channels for tsadc */
> + .grf_required = true,
> .tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */
> .tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
> .tshut_temp = 95000,
> @@ -1272,6 +1284,7 @@ static const struct rockchip_tsadc_chip rk3568_tsadc_data = {
> /* cpu, gpu */
> .chn_offset = 0,
> .chn_num = 2, /* two channels for tsadc */
> + .grf_required = true,
> .tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */
> .tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
> .tshut_temp = 95000,
> @@ -1294,6 +1307,7 @@ static const struct rockchip_tsadc_chip rk3576_tsadc_data = {
> /* top, big_core, little_core, ddr, npu, gpu */
> .chn_offset = 0,
> .chn_num = 6, /* six channels for tsadc */
> + .grf_required = false,
> .tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */
> .tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
> .tshut_temp = 95000,
> @@ -1318,6 +1332,7 @@ static const struct rockchip_tsadc_chip rk3588_tsadc_data = {
> /* top, big_core0, big_core1, little_core, center, gpu, npu */
> .chn_offset = 0,
> .chn_num = 7, /* seven channels for tsadc */
> + .grf_required = false,
> .tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */
> .tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
> .tshut_temp = 95000,
> @@ -1594,12 +1609,10 @@ static int rockchip_configure_from_dt(struct device *dev,
> return -EINVAL;
> }
>
> - /* The tsadc wont to handle the error in here since some SoCs didn't
> - * need this property.
> - */
> thermal->grf = syscon_regmap_lookup_by_phandle(np, "rockchip,grf");
> - if (IS_ERR(thermal->grf))
> - dev_warn(dev, "Missing rockchip,grf property\n");
> + if (IS_ERR(thermal->grf) && thermal->chip->grf_required)
> + return dev_err_probe(dev, PTR_ERR(thermal->grf),
> + "Missing rockchip,grf property\n");
>
> rockchip_get_trim_configuration(dev, np, thermal);
>
>
>
next prev parent reply other threads:[~2025-08-21 1:02 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-08-20 17:40 [PATCH v2 0/3] thermal: rockchip: shut up GRF warning Sebastian Reichel
2025-08-20 17:40 ` [PATCH v2 1/3] thermal: rockchip: unify struct rockchip_tsadc_chip format Sebastian Reichel
2025-08-20 20:11 ` Heiko Stübner
2025-08-22 3:11 ` Dragan Simic
2025-08-20 17:40 ` [PATCH v2 2/3] thermal: rockchip: shut up GRF warning Sebastian Reichel
2025-08-20 20:14 ` Heiko Stübner [this message]
2025-08-21 12:41 ` Diederik de Haas
2025-08-22 3:15 ` Dragan Simic
2025-08-20 17:40 ` [PATCH v2 3/3] dt-bindings: thermal: rockchip: tighten grf requirements Sebastian Reichel
2025-08-20 19:48 ` Conor Dooley
2025-08-22 3:20 ` Dragan Simic
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