From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 09DEDC433F5 for ; Tue, 10 May 2022 09:35:52 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:From:References:Cc:To: Subject:MIME-Version:Date:Message-ID:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=1usNosbiX1GtSdzHqpFXyyBHYFU6oMlwrCKVv3yv6aI=; b=K06fGCrvrVFyzt SBEbeAJf2CLD/rLVnXdIQNZKTLIVQZbnu05riDnfvzAPYUtEA+g79vZBLnI5UciLqaNs2Q0FJiqwN CxzSOimwXQm6NmCl1zL3f7qfWbG+fpVvmtOOZX65BW/jK9WuAVILhvL2Jep8lxgCu9hFFpcSoUqUE J+Q/rS4Y5PqVdW+vaXyhVwG+nqInwyua2aIBrEU0WffwK/CxsSRnz3k5t2eU8H8NI+nd8Irm+6Q7o +C3OxLu1qNSX+ehYu2v/d/56h1ZJMmlCbxLjXZLKBDcxYHJsrUatGQKlSaBNks9RAn9wGMI58ezD4 897Tv06PV/dnpr2ND+Ew==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1noMGa-000rp5-5Q; Tue, 10 May 2022 09:34:52 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1noMGX-000roD-P2 for linux-arm-kernel@lists.infradead.org; Tue, 10 May 2022 09:34:51 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id AADEF1042; Tue, 10 May 2022 02:34:48 -0700 (PDT) Received: from [10.57.2.65] (unknown [10.57.2.65]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 9D2163F66F; Tue, 10 May 2022 02:34:46 -0700 (PDT) Message-ID: <34e48640-24a1-eaa2-e873-f7137aa47ba3@arm.com> Date: Tue, 10 May 2022 10:34:45 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.7.0 Subject: Re: [PATCH v1 1/6] perf: arm64: Add SVE vector granule register to user regs Content-Language: en-US To: Mark Brown Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org, german.gomez@arm.com, John Garry , Will Deacon , Mathieu Poirier , Leo Yan , Mark Rutland , Alexander Shishkin , Jiri Olsa , Namhyung Kim , linux-doc@vger.kernel.org References: <20220509144257.1623063-1-james.clark@arm.com> <20220509144257.1623063-2-james.clark@arm.com> From: James Clark In-Reply-To: X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220510_023449_909699_0FB59A79 X-CRM114-Status: GOOD ( 16.79 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 09/05/2022 16:48, Mark Brown wrote: > On Mon, May 09, 2022 at 03:42:49PM +0100, James Clark wrote: >> Dwarf based unwinding in a function that pushes SVE registers onto >> the stack requires the unwinder to know the length of the SVE register >> to calculate the stack offsets correctly. This was added to the Arm >> specific Dwarf spec as the VG pseudo register[1]. >> >> Add the vector length at position 46 if it's requested by userspace and >> SVE is supported. If it's not supported then fail to open the event. >> >> The vector length must be on each sample because it can be changed >> at runtime via a prctl or ptrace call. Also by adding it as a register >> rather than a separate attribute, minimal changes will be required in an >> unwinder that already indexes into the register list. > >> +static u64 perf_ext_regs_value(int idx) >> +{ >> + switch (idx) { >> + case PERF_REG_ARM64_VG: >> + if (WARN_ON_ONCE(!system_supports_sve())) >> + return 0; > > These WARN_ON_ONCE()s seem a bit loud but I do see they are idiomatic > for this code so They should never ever be hit because the mask is validated when opening the event so hopefully it's not an issue. > > Reviewed-by: Mark Brown Thanks Mark _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel