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Thu, 3 Sep 2026 12:16:49 +0200 Received: from [10.48.86.251] (10.48.86.251) by ENXDAG1NODE4.st.com (10.75.129.197) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.43; Thu, 3 Sep 2026 12:19:29 +0200 Message-ID: <34e63564-0191-406a-973a-eb601292b255@foss.st.com> Date: Thu, 3 Sep 2026 12:19:28 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v5 1/2] dt-bindings: phy: Document ST STM32MP25 USB2-FEMTO PHY To: Marek Vasut , CC: Pankaj Dev , Krzysztof Kozlowski , Rahul Kumar , =?UTF-8?Q?Cl=C3=A9ment_Le_Goffic?= , "Alexandre Torgue" , Christian Bruel , Conor Dooley , "Krzysztof Kozlowski" , Manivannan Sadhasivam , Maxime Coquelin , Neil Armstrong , Patrice Chotard , Rob Herring , Rosen Penev , Vinod Koul , , , , , References: <20260902141312.649406-1-marex@nabladev.com> Content-Language: en-US From: Fabrice Gasnier In-Reply-To: <20260902141312.649406-1-marex@nabladev.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 8bit X-Originating-IP: [10.48.86.251] X-ClientProxiedBy: ENXCAS1NODE2.st.com (10.75.128.138) To ENXDAG1NODE4.st.com (10.75.129.197) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: AMS0EPF00000192:EE_|GV4PR10MB9596:EE_ X-MS-Office365-Filtering-Correlation-Id: 83109a49-9883-4d54-d962-08df09a4d856 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|36860700016|82310400026|23010399003|376014|7416014|10067099003|3023799007|6133799003|56012099006|22082099003|18002099003|11063799006; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: 6fUT0CwICTzxUpjQQehgXElTps+XOEYNZUyo2bVPU3cUrddn7q1cywnpvb8zN+C6hRLzcKtEkzfYjxql+MrXbxQSStyxp09qXKF0zzNvBXT6PDVqrG6f6r7RjQ1V3I7pX/Gc+D/VKbD1zl5oyQFxBX0bPKYhlts4R9JQmLAx4XUWx7I7DZ3kutXYqpFFLwPr1mcM5JYUzVJitk/Nkxk19anCLmQOBQD+HcualahiFIP67nDeSiBRLLEtekvWZQD8ZNi9dNOA2fiXldjCA5nUheQVOcsd1+3b339kbHBWtdDD4SR3viGoeSmcCX+G8NBHqmWe28Zv5w3SOfvV8vCdSvc7VvuPijnBh8FP0ddJLL7+9aimNfKPaEiXyGiMzXcbBR5vp9iJeKvEy4RLIR7HcGefJziJC+NTZcDTnwSACkm//X+KN8oGE3YqqnrLI6kT X-OriginatorOrg: foss.st.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 03 Sep 2026 10:19:31.7927 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 83109a49-9883-4d54-d962-08df09a4d856 X-MS-Exchange-CrossTenant-Id: 75e027c9-20d5-47d5-b82f-77d7cd041e8f X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=75e027c9-20d5-47d5-b82f-77d7cd041e8f;Ip=[164.130.1.88];Helo=[smtpO365.st.com] X-MS-Exchange-CrossTenant-AuthSource: AMS0EPF00000192.eurprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: GV4PR10MB9596 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20260903_031943_214671_0C67E329 X-CRM114-Status: GOOD ( 19.76 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 9/2/26 16:13, Marek Vasut wrote: > From: Pankaj Dev > > Document USB2 PHY for STM32MP25 USB2 controllers, which includes the > USB2.0 host-only controller and USB 2.0 part of the DWC3 controller. > Two such PHYs in total are present in STM32MP25 SoC, they both are > slightly different, therefore they use different compatible string > to discern them. Hello Marek, I'm not sure if/how this fit with all below tags. For all the contributions you've made, you can add my: Reviewed-by: Fabrice Gasnier Tested-by: Fabrice Gasnier BR, Fabrice > > Reviewed-by: Krzysztof Kozlowski > Signed-off-by: Pankaj Dev > Co-developed-by: Rahul Kumar > Signed-off-by: Rahul Kumar > Co-developed-by: Fabrice Gasnier > Signed-off-by: Fabrice Gasnier > Co-developed-by: Clément Le Goffic > Signed-off-by: Clément Le Goffic > Co-developed-by: Marek Vasut > Signed-off-by: Marek Vasut > --- > Cc: Alexandre Torgue > Cc: Christian Bruel > Cc: Conor Dooley > Cc: Fabrice Gasnier > Cc: Krzysztof Kozlowski > Cc: Manivannan Sadhasivam > Cc: Maxime Coquelin > Cc: Neil Armstrong > Cc: Pankaj Dev > Cc: Patrice Chotard > Cc: Rahul Kumar > Cc: Rob Herring > Cc: Rosen Penev > Cc: Vinod Koul > Cc: devicetree@vger.kernel.org > Cc: kernel@dh-electronics.com > Cc: linux-arm-kernel@lists.infradead.org > Cc: linux-kernel@vger.kernel.org > Cc: linux-phy@lists.infradead.org > Cc: linux-stm32@st-md-mailman.stormreply.com > --- > V2: - Fix up Sob/Cdb lines > - Fix up compatible string in example > - Use additionalProperties: false > - Expand description: > - Use clock-cells = <1> to discern OSC and future PLL clock from the PHY > V3: - Move clock-cells next to PHY cells > - Fix the bindings > - Fix up Sob/Cdb lines further > V4: - Reorder the properties: list, put #...cells at the end, reg after compatible > - Split this from series arm64: dts: phy: st: usb: Add STM32MP2 USB support > https://lore.kernel.org/all/20260822074816.548662-1-marex@nabladev.com/ > V5: Add RB from Krzysztof > --- > .../bindings/phy/st,stm32-usb2phy.yaml | 68 +++++++++++++++++++ > 1 file changed, 68 insertions(+) > create mode 100644 Documentation/devicetree/bindings/phy/st,stm32-usb2phy.yaml > > diff --git a/Documentation/devicetree/bindings/phy/st,stm32-usb2phy.yaml b/Documentation/devicetree/bindings/phy/st,stm32-usb2phy.yaml > new file mode 100644 > index 0000000000000..c76e94c044e67 > --- /dev/null > +++ b/Documentation/devicetree/bindings/phy/st,stm32-usb2phy.yaml > @@ -0,0 +1,68 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/phy/st,stm32-usb2phy.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: STMicroelectronics STM32 MPU High-Speed USB PHY > + > +description: > + USB2 PHY block in STM32 is attached to USB 2.0 Host controller and > + USB 2.0 side of DWC3 DRD controller, and provides the USB LS/FS/HS > + connectivity. Both PHYs are the FEMTO-PHY, but their configuration > + bits in the system control register are different for each variant. > + > +maintainers: > + - Fabrice Gasnier > + - Marek Vasut > + - Pankaj Dev > + > +properties: > + compatible: > + enum: > + - st,stm32mp25-usb2phy1 > + - st,stm32mp25-usb2phy2 > + > + reg: > + maxItems: 1 > + > + clocks: > + maxItems: 1 > + > + resets: > + maxItems: 1 > + > + vdd33-supply: > + description: Phandle to regulator providing 3V3 power supply to the USB2 HS PHY > + > + "#clock-cells": > + const: 1 > + > + "#phy-cells": > + const: 0 > + > +required: > + - compatible > + - reg > + - clocks > + - resets > + - vdd33-supply > + - "#clock-cells" > + - "#phy-cells" > + > +additionalProperties: false > + > +examples: > + - | > + #include > + #include > + > + usb-phy@2400 { > + compatible = "st,stm32mp25-usb2phy1"; > + reg = <0x2400 0x24>; > + #phy-cells = <0>; > + #clock-cells = <1>; > + clocks = <&rcc CK_KER_USB2PHY1>; > + resets = <&rcc USB2PHY1_R>; > + vdd33-supply = <&vdd33usb>; > + };