* [PATCH 01/11] OMAP4: PRCM: add OMAP4-specific accessor/mutator functions
2010-12-08 6:18 [PATCH 00/11] OMAP: PRCM/powerdomain/clockdomain patches for 2.6.38, part two Paul Walmsley
@ 2010-12-08 6:18 ` Paul Walmsley
2010-12-08 9:48 ` [PATCH 01/11] OMAP4: PRCM: add OMAP4-specific accessor/mutatorfunctions Santosh Shilimkar
` (2 more replies)
2010-12-08 6:18 ` [PATCH 02/11] OMAP4: PRCM: move global reset function for OMAP4 to an OMAP4-specific file Paul Walmsley
` (12 subsequent siblings)
13 siblings, 3 replies; 38+ messages in thread
From: Paul Walmsley @ 2010-12-08 6:18 UTC (permalink / raw)
To: linux-arm-kernel
In some ways, the OMAP4 PRCM register layout is quite different than
the OMAP2/3 PRCM register layout. For example, on OMAP2/3, from a
register layout point of view, all CM instances were located in the CM
subsystem, and all PRM instances were located in the PRM subsystem.
OMAP4 changes this. Now, for example, some CM instances, such as
WKUP_CM and EMU_CM, are located in the system PRM subsystem. And a
"local PRCM" exists for the MPU - this PRCM combines registers that
would normally appear in both CM and PRM instances, but uses its own
register layout which matches neither the OMAP2/3 PRCM layout nor the
OMAP4 PRCM layout.
To try to deal with this, introduce some new functions, omap4_cminst*
and omap4_prminst*. The former is to be used when writing to a CM
instance register (no matter what subsystem or hardware module it
exists in), and the latter, similarly, with PRM instance registers.
To determine which "PRCM partition" to write to, the functions take a
PRCM instance ID argument. Subsequent patches add these partition IDs
to the OMAP4 powerdomain and clockdomain definitions.
As far as I can see, there's really no good way to handle these types
of register access inconsistencies. This patch seemed like the least
bad approach.
Moving forward, the long-term goal is to remove all direct PRCM
register access from the PM code. PRCM register access should go
through layers such as the powerdomain and clockdomain code that can
hide the details of how to interact with the specific hardware
variant.
While here, rename cm4xxx.c to cm44xx.c to match the naming convention
of the other OMAP4 PRCM files.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Beno?t Cousson <b-cousson@ti.com>
Cc: Rajendra Nayak <rnayak@ti.com>
Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
---
arch/arm/mach-omap2/Makefile | 4 +
arch/arm/mach-omap2/cm1_44xx.h | 5 +
arch/arm/mach-omap2/cm2_44xx.h | 6 ++
arch/arm/mach-omap2/cm44xx.c | 52 ++++++++++++++
arch/arm/mach-omap2/cm4xxx.c | 62 -----------------
arch/arm/mach-omap2/cminst44xx.c | 118 ++++++++++++++++++++++++++++++++
arch/arm/mach-omap2/prcm.c | 26 -------
arch/arm/mach-omap2/prcm44xx.h | 42 +++++++++++
arch/arm/mach-omap2/prcm_mpu44xx.c | 45 ++++++++++++
arch/arm/mach-omap2/prcm_mpu44xx.h | 8 ++
arch/arm/mach-omap2/prm44xx.c | 65 ++++++++++++++++++
arch/arm/mach-omap2/prm44xx.h | 6 ++
arch/arm/mach-omap2/prminst44xx.c | 74 ++++++++++++++++++++
arch/arm/mach-omap2/prminst44xx.h | 25 +++++++
arch/arm/plat-omap/include/plat/prcm.h | 7 +-
15 files changed, 454 insertions(+), 91 deletions(-)
create mode 100644 arch/arm/mach-omap2/cm44xx.c
delete mode 100644 arch/arm/mach-omap2/cm4xxx.c
create mode 100644 arch/arm/mach-omap2/cminst44xx.c
create mode 100644 arch/arm/mach-omap2/prcm44xx.h
create mode 100644 arch/arm/mach-omap2/prcm_mpu44xx.c
create mode 100644 arch/arm/mach-omap2/prminst44xx.c
create mode 100644 arch/arm/mach-omap2/prminst44xx.h
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index 7f3302f..0fa48a882 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -68,7 +68,9 @@ obj-$(CONFIG_ARCH_OMAP3) += prcm.o cm2xxx_3xxx.o prm2xxx_3xxx.o
# XXX The presence of cm2xxx_3xxx.o on the line below is temporary and
# will be removed once the OMAP4 part of the codebase is converted to
# use OMAP4-specific PRCM functions.
-obj-$(CONFIG_ARCH_OMAP4) += prcm.o cm2xxx_3xxx.o cm4xxx.o
+obj-$(CONFIG_ARCH_OMAP4) += prcm.o cm2xxx_3xxx.o cminst44xx.o \
+ cm44xx.o prcm_mpu44xx.o \
+ prminst44xx.o
# OMAP powerdomain framework
powerdomain-common += powerdomain.o powerdomain-common.o
diff --git a/arch/arm/mach-omap2/cm1_44xx.h b/arch/arm/mach-omap2/cm1_44xx.h
index aa2ee78..63ef9e3 100644
--- a/arch/arm/mach-omap2/cm1_44xx.h
+++ b/arch/arm/mach-omap2/cm1_44xx.h
@@ -248,4 +248,9 @@
#define OMAP4_CM_DYN_DEP_PRESCAL_RESTORE_OFFSET 0x0040
#define OMAP4430_CM_DYN_DEP_PRESCAL_RESTORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_INST, 0x0040)
+/* Function prototypes */
+extern u32 omap4_cm1_read_inst_reg(s16 inst, u16 idx);
+extern void omap4_cm1_write_inst_reg(u32 val, s16 inst, u16 idx);
+extern u32 omap4_cm1_rmw_inst_reg_bits(u32 mask, u32 bits, s16 inst, s16 idx);
+
#endif
diff --git a/arch/arm/mach-omap2/cm2_44xx.h b/arch/arm/mach-omap2/cm2_44xx.h
index 89c9522..0fd0210 100644
--- a/arch/arm/mach-omap2/cm2_44xx.h
+++ b/arch/arm/mach-omap2/cm2_44xx.h
@@ -480,4 +480,10 @@
#define OMAP4430_CM_L3INIT_USB_TLL_CLKCTRL_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x0058)
#define OMAP4_CM_SDMA_STATICDEP_RESTORE_OFFSET 0x005c
#define OMAP4430_CM_SDMA_STATICDEP_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x005c)
+
+/* Function prototypes */
+extern u32 omap4_cm2_read_inst_reg(s16 inst, u16 idx);
+extern void omap4_cm2_write_inst_reg(u32 val, s16 inst, u16 idx);
+extern u32 omap4_cm2_rmw_inst_reg_bits(u32 mask, u32 bits, s16 inst, s16 idx);
+
#endif
diff --git a/arch/arm/mach-omap2/cm44xx.c b/arch/arm/mach-omap2/cm44xx.c
new file mode 100644
index 0000000..e96f53e
--- /dev/null
+++ b/arch/arm/mach-omap2/cm44xx.c
@@ -0,0 +1,52 @@
+/*
+ * OMAP4 CM1, CM2 module low-level functions
+ *
+ * Copyright (C) 2010 Nokia Corporation
+ * Paul Walmsley
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * These functions are intended to be used only by the cminst44xx.c file.
+ * XXX Perhaps we should just move them there and make them static.
+ */
+
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <linux/errno.h>
+#include <linux/err.h>
+#include <linux/io.h>
+
+#include <plat/common.h>
+
+#include "cm.h"
+#include "cm1_44xx.h"
+#include "cm2_44xx.h"
+#include "cm-regbits-44xx.h"
+
+/* CM1 hardware module low-level functions */
+
+/* Read a register in CM1 */
+u32 omap4_cm1_read_inst_reg(s16 inst, u16 reg)
+{
+ return __raw_readl(OMAP44XX_CM1_REGADDR(inst, reg));
+}
+
+/* Write into a register in CM1 */
+void omap4_cm1_write_inst_reg(u32 val, s16 inst, u16 reg)
+{
+ __raw_writel(val, OMAP44XX_CM1_REGADDR(inst, reg));
+}
+
+/* Read a register in CM2 */
+u32 omap4_cm2_read_inst_reg(s16 inst, u16 reg)
+{
+ return __raw_readl(OMAP44XX_CM2_REGADDR(inst, reg));
+}
+
+/* Write into a register in CM2 */
+void omap4_cm2_write_inst_reg(u32 val, s16 inst, u16 reg)
+{
+ __raw_writel(val, OMAP44XX_CM2_REGADDR(inst, reg));
+}
diff --git a/arch/arm/mach-omap2/cm4xxx.c b/arch/arm/mach-omap2/cm4xxx.c
deleted file mode 100644
index 25d2b3e..0000000
--- a/arch/arm/mach-omap2/cm4xxx.c
+++ /dev/null
@@ -1,62 +0,0 @@
-/*
- * OMAP4 CM module functions
- *
- * Copyright (C) 2009 Nokia Corporation
- * Paul Walmsley
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#include <linux/kernel.h>
-#include <linux/module.h>
-#include <linux/types.h>
-#include <linux/delay.h>
-#include <linux/spinlock.h>
-#include <linux/list.h>
-#include <linux/errno.h>
-#include <linux/err.h>
-#include <linux/io.h>
-
-#include <asm/atomic.h>
-
-#include <plat/common.h>
-
-#include "cm44xx.h"
-#include "cm-regbits-44xx.h"
-
-/**
- * omap4_cm_wait_module_ready - wait for a module to be in 'func' state
- * @clkctrl_reg: CLKCTRL module address
- *
- * Wait for the module IDLEST to be functional. If the idle state is in any
- * the non functional state (trans, idle or disabled), module and thus the
- * sysconfig cannot be accessed and will probably lead to an "imprecise
- * external abort"
- *
- * Module idle state:
- * 0x0 func: Module is fully functional, including OCP
- * 0x1 trans: Module is performing transition: wakeup, or sleep, or sleep
- * abortion
- * 0x2 idle: Module is in Idle mode (only OCP part). It is functional if
- * using separate functional clock
- * 0x3 disabled: Module is disabled and cannot be accessed
- *
- */
-int omap4_cm_wait_module_ready(void __iomem *clkctrl_reg)
-{
- int i = 0;
-
- if (!clkctrl_reg)
- return 0;
-
- omap_test_timeout((
- ((__raw_readl(clkctrl_reg) & OMAP4430_IDLEST_MASK) == 0) ||
- (((__raw_readl(clkctrl_reg) & OMAP4430_IDLEST_MASK) >>
- OMAP4430_IDLEST_SHIFT) == 0x2)),
- MAX_MODULE_READY_TIME, i);
-
- return (i < MAX_MODULE_READY_TIME) ? 0 : -EBUSY;
-}
-
diff --git a/arch/arm/mach-omap2/cminst44xx.c b/arch/arm/mach-omap2/cminst44xx.c
new file mode 100644
index 0000000..2c0cad3
--- /dev/null
+++ b/arch/arm/mach-omap2/cminst44xx.c
@@ -0,0 +1,118 @@
+/*
+ * OMAP4 CM instance functions
+ *
+ * Copyright (C) 2009 Nokia Corporation
+ * Paul Walmsley
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This is needed since CM instances can be in the PRM, PRCM_MPU, CM1,
+ * or CM2 hardware modules. For example, the EMU_CM CM instance is in
+ * the PRM hardware module. What a mess...
+ */
+
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <linux/errno.h>
+#include <linux/err.h>
+#include <linux/io.h>
+
+#include <plat/common.h>
+
+#include "cm.h"
+#include "cm1_44xx.h"
+#include "cm2_44xx.h"
+#include "cm44xx.h"
+#include "cminst44xx.h"
+#include "cm-regbits-44xx.h"
+#include "prcm44xx.h"
+#include "prm44xx.h"
+#include "prcm_mpu44xx.h"
+
+static u32 (*_cm_read_fns[OMAP4_MAX_PRCM_PARTITIONS])(s16, u16) = {
+ [OMAP4430_INVALID_PRCM_PARTITION] = NULL,
+ [OMAP4430_PRM_PARTITION] = &omap4_prm_read_inst_reg,
+ [OMAP4430_CM1_PARTITION] = &omap4_cm1_read_inst_reg,
+ [OMAP4430_CM2_PARTITION] = &omap4_cm2_read_inst_reg,
+ [OMAP4430_SCRM_PARTITION] = NULL,
+ [OMAP4430_PRCM_MPU_PARTITION] = &omap4_prcm_mpu_read_inst_reg
+};
+
+static void (*_cm_write_fns[OMAP4_MAX_PRCM_PARTITIONS])(u32, s16, u16) = {
+ [OMAP4430_INVALID_PRCM_PARTITION] = NULL,
+ [OMAP4430_PRM_PARTITION] = &omap4_prm_write_inst_reg,
+ [OMAP4430_CM1_PARTITION] = &omap4_cm1_write_inst_reg,
+ [OMAP4430_CM2_PARTITION] = &omap4_cm2_write_inst_reg,
+ [OMAP4430_SCRM_PARTITION] = NULL,
+ [OMAP4430_PRCM_MPU_PARTITION] = &omap4_prcm_mpu_write_inst_reg
+};
+
+/* Read a register in a CM instance */
+u32 omap4_cminst_read_inst_reg(u8 part, s16 module, u16 idx)
+{
+ BUG_ON(part >= OMAP4_MAX_PRCM_PARTITIONS ||
+ part == OMAP4430_INVALID_PRCM_PARTITION ||
+ !_cm_read_fns[part]);
+ return _cm_read_fns[part](module, idx);
+}
+
+/* Write into a register in a CM instance */
+void omap4_cminst_write_inst_reg(u32 val, u8 part, s16 module, u16 idx)
+{
+ BUG_ON(part >= OMAP4_MAX_PRCM_PARTITIONS ||
+ part == OMAP4430_INVALID_PRCM_PARTITION ||
+ !_cm_write_fns[part]);
+ _cm_write_fns[part](val, module, idx);
+}
+
+/* Read-modify-write a register in CM1. Caller must lock */
+u32 omap4_cminst_rmw_inst_reg_bits(u32 mask, u32 bits, u8 part,
+ s16 module, s16 idx)
+{
+ u32 v;
+
+ v = omap4_cminst_read_inst_reg(part, module, idx);
+ v &= ~mask;
+ v |= bits;
+ omap4_cminst_write_inst_reg(v, part, module, idx);
+
+ return v;
+}
+
+
+/**
+ * omap4_cm_wait_module_ready - wait for a module to be in 'func' state
+ * @clkctrl_reg: CLKCTRL module address
+ *
+ * Wait for the module IDLEST to be functional. If the idle state is in any
+ * the non functional state (trans, idle or disabled), module and thus the
+ * sysconfig cannot be accessed and will probably lead to an "imprecise
+ * external abort"
+ *
+ * Module idle state:
+ * 0x0 func: Module is fully functional, including OCP
+ * 0x1 trans: Module is performing transition: wakeup, or sleep, or sleep
+ * abortion
+ * 0x2 idle: Module is in Idle mode (only OCP part). It is functional if
+ * using separate functional clock
+ * 0x3 disabled: Module is disabled and cannot be accessed
+ *
+ */
+int omap4_cm_wait_module_ready(void __iomem *clkctrl_reg)
+{
+ int i = 0;
+
+ if (!clkctrl_reg)
+ return 0;
+
+ omap_test_timeout((
+ ((__raw_readl(clkctrl_reg) & OMAP4430_IDLEST_MASK) == 0) ||
+ (((__raw_readl(clkctrl_reg) & OMAP4430_IDLEST_MASK) >>
+ OMAP4430_IDLEST_SHIFT) == 0x2)),
+ MAX_MODULE_READY_TIME, i);
+
+ return (i < MAX_MODULE_READY_TIME) ? 0 : -EBUSY;
+}
+
diff --git a/arch/arm/mach-omap2/prcm.c b/arch/arm/mach-omap2/prcm.c
index dd95cbb..fe0865b 100644
--- a/arch/arm/mach-omap2/prcm.c
+++ b/arch/arm/mach-omap2/prcm.c
@@ -33,6 +33,7 @@
#include "cm44xx.h"
#include "prm2xxx_3xxx.h"
#include "prm44xx.h"
+#include "prcm44xx.h"
#include "prm-regbits-24xx.h"
#include "prm-regbits-44xx.h"
#include "control.h"
@@ -80,31 +81,6 @@ void omap_prcm_arch_reset(char mode, const char *cmd)
prcm_offs, OMAP4_RM_RSTCTRL);
}
-/* Read a PRM register, AND it, and shift the result down to bit 0 */
-u32 omap4_prm_read_bits_shift(void __iomem *reg, u32 mask)
-{
- u32 v;
-
- v = __raw_readl(reg);
- v &= mask;
- v >>= __ffs(mask);
-
- return v;
-}
-
-/* Read-modify-write a register in a PRM module. Caller must lock */
-u32 omap4_prm_rmw_reg_bits(u32 mask, u32 bits, void __iomem *reg)
-{
- u32 v;
-
- v = __raw_readl(reg);
- v &= ~mask;
- v |= bits;
- __raw_writel(v, reg);
-
- return v;
-}
-
/**
* omap2_cm_wait_idlest - wait for IDLEST bit to indicate module readiness
* @reg: physical address of module IDLEST register
diff --git a/arch/arm/mach-omap2/prcm44xx.h b/arch/arm/mach-omap2/prcm44xx.h
new file mode 100644
index 0000000..7334ffb
--- /dev/null
+++ b/arch/arm/mach-omap2/prcm44xx.h
@@ -0,0 +1,42 @@
+/*
+ * OMAP4 PRCM definitions
+ *
+ * Copyright (C) 2010 Texas Instruments, Inc.
+ * Copyright (C) 2010 Nokia Corporation
+ *
+ * Paul Walmsley
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This file contains macros and functions that are common to all of
+ * the PRM/CM/PRCM blocks on the OMAP4 devices: PRM, CM1, CM2,
+ * PRCM_MPU, SCRM
+ */
+
+#ifndef __ARCH_ARM_MACH_OMAP2_PRCM44XX_H
+#define __ARCH_ARM_MACH_OMAP2_PRCM44XX_H
+
+/*
+ * OMAP4 PRCM partition IDs
+ *
+ * The numbers and order are arbitrary, but 0 is reserved for the
+ * 'invalid' partition in case someone forgets to add a
+ * .prcm_partition field.
+ */
+#define OMAP4430_INVALID_PRCM_PARTITION 0
+#define OMAP4430_PRM_PARTITION 1
+#define OMAP4430_CM1_PARTITION 2
+#define OMAP4430_CM2_PARTITION 3
+#define OMAP4430_SCRM_PARTITION 4
+#define OMAP4430_PRCM_MPU_PARTITION 5
+
+/*
+ * OMAP4_MAX_PRCM_PARTITIONS: set to the highest value of the PRCM partition
+ * IDs, plus one
+ */
+#define OMAP4_MAX_PRCM_PARTITIONS 6
+
+
+#endif
diff --git a/arch/arm/mach-omap2/prcm_mpu44xx.c b/arch/arm/mach-omap2/prcm_mpu44xx.c
new file mode 100644
index 0000000..171fe17
--- /dev/null
+++ b/arch/arm/mach-omap2/prcm_mpu44xx.c
@@ -0,0 +1,45 @@
+/*
+ * OMAP4 PRCM_MPU module functions
+ *
+ * Copyright (C) 2009 Nokia Corporation
+ * Paul Walmsley
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <linux/errno.h>
+#include <linux/err.h>
+#include <linux/io.h>
+
+#include <plat/common.h>
+
+#include "prcm_mpu44xx.h"
+#include "cm-regbits-44xx.h"
+
+/* PRCM_MPU low-level functions */
+
+u32 omap4_prcm_mpu_read_inst_reg(s16 inst, u16 reg)
+{
+ return __raw_readl(OMAP44XX_PRCM_MPU_REGADDR(inst, reg));
+}
+
+void omap4_prcm_mpu_write_inst_reg(u32 val, s16 inst, u16 reg)
+{
+ __raw_writel(val, OMAP44XX_PRCM_MPU_REGADDR(inst, reg));
+}
+
+u32 omap4_prcm_mpu_rmw_inst_reg_bits(u32 mask, u32 bits, s16 inst, s16 reg)
+{
+ u32 v;
+
+ v = omap4_prcm_mpu_read_inst_reg(inst, reg);
+ v &= ~mask;
+ v |= bits;
+ omap4_prcm_mpu_write_inst_reg(v, inst, reg);
+
+ return v;
+}
diff --git a/arch/arm/mach-omap2/prcm_mpu44xx.h b/arch/arm/mach-omap2/prcm_mpu44xx.h
index 80e00c1..e5190e9 100644
--- a/arch/arm/mach-omap2/prcm_mpu44xx.h
+++ b/arch/arm/mach-omap2/prcm_mpu44xx.h
@@ -88,4 +88,12 @@
#define OMAP4_CM_CPU1_CLKSTCTRL_OFFSET 0x0018
#define OMAP4430_CM_CPU1_CLKSTCTRL OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU1_INST, 0x0018)
+/* Function prototypes */
+# ifndef __ASSEMBLER__
+extern u32 omap4_prcm_mpu_read_inst_reg(s16 inst, u16 idx);
+extern void omap4_prcm_mpu_write_inst_reg(u32 val, s16 inst, u16 idx);
+extern u32 omap4_prcm_mpu_rmw_inst_reg_bits(u32 mask, u32 bits, s16 inst,
+ s16 idx);
+# endif
+
#endif
diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c
index 697b58f..c016ae4 100644
--- a/arch/arm/mach-omap2/prm44xx.c
+++ b/arch/arm/mach-omap2/prm44xx.c
@@ -15,6 +15,7 @@
#include <linux/delay.h>
#include <linux/errno.h>
#include <linux/err.h>
+#include <linux/io.h>
#include <plat/common.h>
#include <plat/cpu.h>
@@ -29,6 +30,70 @@
*/
#define OMAP4_RST_CTRL_ST_OFFSET 4
+/* PRM low-level functions */
+
+/* Read a register in a CM/PRM instance in the PRM module */
+u32 omap4_prm_read_inst_reg(s16 inst, u16 reg)
+{
+ return __raw_readl(OMAP44XX_PRM_REGADDR(inst, reg));
+}
+
+/* Write into a register in a CM/PRM instance in the PRM module */
+void omap4_prm_write_inst_reg(u32 val, s16 inst, u16 reg)
+{
+ __raw_writel(val, OMAP44XX_PRM_REGADDR(inst, reg));
+}
+
+/* Read-modify-write a register in a PRM module. Caller must lock */
+u32 omap4_prm_rmw_inst_reg_bits(u32 mask, u32 bits, s16 inst, s16 reg)
+{
+ u32 v;
+
+ v = omap4_prm_read_inst_reg(inst, reg);
+ v &= ~mask;
+ v |= bits;
+ omap4_prm_write_inst_reg(v, inst, reg);
+
+ return v;
+}
+
+/* Read a PRM register, AND it, and shift the result down to bit 0 */
+/* XXX deprecated */
+u32 omap4_prm_read_bits_shift(void __iomem *reg, u32 mask)
+{
+ u32 v;
+
+ v = __raw_readl(reg);
+ v &= mask;
+ v >>= __ffs(mask);
+
+ return v;
+}
+
+/* Read-modify-write a register in a PRM module. Caller must lock */
+/* XXX deprecated */
+u32 omap4_prm_rmw_reg_bits(u32 mask, u32 bits, void __iomem *reg)
+{
+ u32 v;
+
+ v = __raw_readl(reg);
+ v &= ~mask;
+ v |= bits;
+ __raw_writel(v, reg);
+
+ return v;
+}
+
+u32 omap4_prm_set_inst_reg_bits(u32 bits, s16 inst, s16 reg)
+{
+ return omap4_prm_rmw_inst_reg_bits(bits, bits, inst, reg);
+}
+
+u32 omap4_prm_clear_inst_reg_bits(u32 bits, s16 inst, s16 reg)
+{
+ return omap4_prm_rmw_inst_reg_bits(bits, 0x0, inst, reg);
+}
+
/**
* omap4_prm_is_hardreset_asserted - read the HW reset line state of
* submodules contained in the hwmod module
diff --git a/arch/arm/mach-omap2/prm44xx.h b/arch/arm/mach-omap2/prm44xx.h
index 3d36149..3588653 100644
--- a/arch/arm/mach-omap2/prm44xx.h
+++ b/arch/arm/mach-omap2/prm44xx.h
@@ -744,6 +744,12 @@
/* Function prototypes */
# ifndef __ASSEMBLER__
+extern u32 omap4_prm_read_inst_reg(s16 inst, u16 idx);
+extern void omap4_prm_write_inst_reg(u32 val, s16 inst, u16 idx);
+extern u32 omap4_prm_rmw_inst_reg_bits(u32 mask, u32 bits, s16 inst, s16 idx);
+extern u32 omap4_prm_rmw_reg_bits(u32 mask, u32 bits, void __iomem *reg);
+extern u32 omap4_prm_set_inst_reg_bits(u32 bits, s16 inst, s16 idx);
+extern u32 omap4_prm_clear_inst_reg_bits(u32 bits, s16 inst, s16 idx);
extern u32 omap4_prm_read_bits_shift(void __iomem *reg, u32 mask);
extern int omap4_prm_is_hardreset_asserted(void __iomem *rstctrl_reg, u8 shift);
diff --git a/arch/arm/mach-omap2/prminst44xx.c b/arch/arm/mach-omap2/prminst44xx.c
new file mode 100644
index 0000000..01c57b6
--- /dev/null
+++ b/arch/arm/mach-omap2/prminst44xx.c
@@ -0,0 +1,74 @@
+/*
+ * OMAP4 PRM instance functions
+ *
+ * Copyright (C) 2009 Nokia Corporation
+ * Paul Walmsley
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <linux/errno.h>
+#include <linux/err.h>
+#include <linux/io.h>
+
+#include <plat/common.h>
+
+#include "prm44xx.h"
+#include "prminst44xx.h"
+#include "prm-regbits-44xx.h"
+#include "prcm44xx.h"
+#include "prcm_mpu44xx.h"
+
+static u32 (*_prm_read_fns[OMAP4_MAX_PRCM_PARTITIONS])(s16, u16) = {
+ [OMAP4430_INVALID_PRCM_PARTITION] = NULL,
+ [OMAP4430_PRM_PARTITION] = &omap4_prm_read_inst_reg,
+ [OMAP4430_CM1_PARTITION] = NULL,
+ [OMAP4430_CM2_PARTITION] = NULL,
+ [OMAP4430_SCRM_PARTITION] = NULL,
+ [OMAP4430_PRCM_MPU_PARTITION] = &omap4_prcm_mpu_read_inst_reg
+};
+
+static void (*_prm_write_fns[OMAP4_MAX_PRCM_PARTITIONS])(u32, s16, u16) = {
+ [OMAP4430_INVALID_PRCM_PARTITION] = NULL,
+ [OMAP4430_PRM_PARTITION] = &omap4_prm_write_inst_reg,
+ [OMAP4430_CM1_PARTITION] = NULL,
+ [OMAP4430_CM2_PARTITION] = NULL,
+ [OMAP4430_SCRM_PARTITION] = NULL,
+ [OMAP4430_PRCM_MPU_PARTITION] = &omap4_prcm_mpu_write_inst_reg
+};
+
+/* Read a register in a PRM instance */
+u32 omap4_prminst_read_inst_reg(u8 part, s16 inst, u16 idx)
+{
+ BUG_ON(part >= OMAP4_MAX_PRCM_PARTITIONS ||
+ part == OMAP4430_INVALID_PRCM_PARTITION ||
+ !_prm_read_fns[part]);
+ return _prm_read_fns[part](inst, idx);
+}
+
+/* Write into a register in a PRM instance */
+void omap4_prminst_write_inst_reg(u32 val, u8 part, s16 inst, u16 idx)
+{
+ BUG_ON(part >= OMAP4_MAX_PRCM_PARTITIONS ||
+ part == OMAP4430_INVALID_PRCM_PARTITION ||
+ !_prm_write_fns[part]);
+ _prm_write_fns[part](val, inst, idx);
+}
+
+/* Read-modify-write a register in PRM. Caller must lock */
+u32 omap4_prminst_rmw_inst_reg_bits(u32 mask, u32 bits, u8 part, s16 inst,
+ s16 idx)
+{
+ u32 v;
+
+ v = omap4_prminst_read_inst_reg(part, inst, idx);
+ v &= ~mask;
+ v |= bits;
+ omap4_prminst_write_inst_reg(v, part, inst, idx);
+
+ return v;
+}
diff --git a/arch/arm/mach-omap2/prminst44xx.h b/arch/arm/mach-omap2/prminst44xx.h
new file mode 100644
index 0000000..02dd66d
--- /dev/null
+++ b/arch/arm/mach-omap2/prminst44xx.h
@@ -0,0 +1,25 @@
+/*
+ * OMAP4 Power/Reset Management (PRM) function prototypes
+ *
+ * Copyright (C) 2010 Nokia Corporation
+ * Paul Walmsley
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#ifndef __ARCH_ASM_MACH_OMAP2_PRMINST44XX_H
+#define __ARCH_ASM_MACH_OMAP2_PRMINST44XX_H
+
+/*
+ * In an ideal world, we would not export these low-level functions,
+ * but this will probably take some time to fix properly
+ */
+extern u32 omap4_prminst_read_inst_reg(u8 part, s16 inst, u16 idx);
+extern void omap4_prminst_write_inst_reg(u32 val, u8 part, s16 inst, u16 idx);
+extern u32 omap4_prminst_rmw_inst_reg_bits(u32 mask, u32 bits, u8 part,
+ s16 inst, s16 idx);
+
+extern void omap4_prm_global_warm_sw_reset(void);
+
+#endif
diff --git a/arch/arm/plat-omap/include/plat/prcm.h b/arch/arm/plat-omap/include/plat/prcm.h
index d059a05..078906d 100644
--- a/arch/arm/plat-omap/include/plat/prcm.h
+++ b/arch/arm/plat-omap/include/plat/prcm.h
@@ -18,6 +18,10 @@
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ *
+ * XXX This file is deprecated. The PRCM is an OMAP2+-only subsystem,
+ * so this file doesn't belong in plat-omap/include/plat. Please
+ * do not add anything new to this file.
*/
#ifndef __ASM_ARM_ARCH_OMAP_PRCM_H
@@ -31,9 +35,6 @@ int omap2_cm_wait_idlest(void __iomem *reg, u32 mask, u8 idlest,
#define START_PADCONF_SAVE 0x2
#define PADCONF_SAVE_DONE 0x1
-u32 omap4_prm_read_bits_shift(void __iomem *reg, u32 mask);
-u32 omap4_prm_rmw_reg_bits(u32 mask, u32 bits, void __iomem *reg);
-
#endif
^ permalink raw reply related [flat|nested] 38+ messages in thread* [PATCH 01/11] OMAP4: PRCM: add OMAP4-specific accessor/mutatorfunctions
2010-12-08 6:18 ` [PATCH 01/11] OMAP4: PRCM: add OMAP4-specific accessor/mutator functions Paul Walmsley
@ 2010-12-08 9:48 ` Santosh Shilimkar
2010-12-11 1:55 ` Paul Walmsley
2010-12-08 12:33 ` Rajendra Nayak
2010-12-08 13:50 ` Rajendra Nayak
2 siblings, 1 reply; 38+ messages in thread
From: Santosh Shilimkar @ 2010-12-08 9:48 UTC (permalink / raw)
To: linux-arm-kernel
Paul,
> -----Original Message-----
> From: Paul Walmsley [mailto:paul at pwsan.com]
> Sent: Wednesday, December 08, 2010 11:49 AM
> To: linux-omap at vger.kernel.org; linux-arm-kernel at lists.infradead.org
> Cc: Rajendra Nayak; Santosh Shilimkar; Beno?t Cousson
> Subject: [PATCH 01/11] OMAP4: PRCM: add OMAP4-specific
> accessor/mutatorfunctions
>
> In some ways, the OMAP4 PRCM register layout is quite different than
> the OMAP2/3 PRCM register layout. For example, on OMAP2/3, from a
> register layout point of view, all CM instances were located in the CM
> subsystem, and all PRM instances were located in the PRM subsystem.
> OMAP4 changes this. Now, for example, some CM instances, such as
> WKUP_CM and EMU_CM, are located in the system PRM subsystem. And a
> "local PRCM" exists for the MPU - this PRCM combines registers that
> would normally appear in both CM and PRM instances, but uses its own
> register layout which matches neither the OMAP2/3 PRCM layout nor the
> OMAP4 PRCM layout.
>
> To try to deal with this, introduce some new functions, omap4_cminst*
> and omap4_prminst*. The former is to be used when writing to a CM
> instance register (no matter what subsystem or hardware module it
> exists in), and the latter, similarly, with PRM instance registers.
> To determine which "PRCM partition" to write to, the functions take a
> PRCM instance ID argument. Subsequent patches add these partition IDs
> to the OMAP4 powerdomain and clockdomain definitions.
>
Thanks a lot for this cleanup.
> As far as I can see, there's really no good way to handle these types
> of register access inconsistencies. This patch seemed like the least
> bad approach.
>
> Moving forward, the long-term goal is to remove all direct PRCM
> register access from the PM code. PRCM register access should go
> through layers such as the powerdomain and clockdomain code that can
> hide the details of how to interact with the specific hardware
> variant.
>
One more possible road block of removing the direct register access
from PM code is DEVICE PRM module. Even with this clean-up for DEVCIE
PRM related registers. I guess we still need to use the lowest level
APIs.
> While here, rename cm4xxx.c to cm44xx.c to match the naming convention
> of the other OMAP4 PRCM files.
>
> Signed-off-by: Paul Walmsley <paul@pwsan.com>
> Cc: Beno?t Cousson <b-cousson@ti.com>
> Cc: Rajendra Nayak <rnayak@ti.com>
> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
> ---
> arch/arm/mach-omap2/Makefile | 4 +
> arch/arm/mach-omap2/cm1_44xx.h | 5 +
> arch/arm/mach-omap2/cm2_44xx.h | 6 ++
> arch/arm/mach-omap2/cm44xx.c | 52 ++++++++++++++
> arch/arm/mach-omap2/cm4xxx.c | 62 -----------------
> arch/arm/mach-omap2/cminst44xx.c | 118
> ++++++++++++++++++++++++++++++++
> arch/arm/mach-omap2/prcm.c | 26 -------
> arch/arm/mach-omap2/prcm44xx.h | 42 +++++++++++
> arch/arm/mach-omap2/prcm_mpu44xx.c | 45 ++++++++++++
> arch/arm/mach-omap2/prcm_mpu44xx.h | 8 ++
> arch/arm/mach-omap2/prm44xx.c | 65 ++++++++++++++++++
> arch/arm/mach-omap2/prm44xx.h | 6 ++
> arch/arm/mach-omap2/prminst44xx.c | 74 ++++++++++++++++++++
> arch/arm/mach-omap2/prminst44xx.h | 25 +++++++
> arch/arm/plat-omap/include/plat/prcm.h | 7 +-
> 15 files changed, 454 insertions(+), 91 deletions(-)
> create mode 100644 arch/arm/mach-omap2/cm44xx.c
> delete mode 100644 arch/arm/mach-omap2/cm4xxx.c
> create mode 100644 arch/arm/mach-omap2/cminst44xx.c
> create mode 100644 arch/arm/mach-omap2/prcm44xx.h
> create mode 100644 arch/arm/mach-omap2/prcm_mpu44xx.c
> create mode 100644 arch/arm/mach-omap2/prminst44xx.c
> create mode 100644 arch/arm/mach-omap2/prminst44xx.h
>
^ permalink raw reply [flat|nested] 38+ messages in thread
* [PATCH 01/11] OMAP4: PRCM: add OMAP4-specific accessor/mutatorfunctions
2010-12-08 9:48 ` [PATCH 01/11] OMAP4: PRCM: add OMAP4-specific accessor/mutatorfunctions Santosh Shilimkar
@ 2010-12-11 1:55 ` Paul Walmsley
2010-12-11 7:32 ` Santosh Shilimkar
0 siblings, 1 reply; 38+ messages in thread
From: Paul Walmsley @ 2010-12-11 1:55 UTC (permalink / raw)
To: linux-arm-kernel
On Wed, 8 Dec 2010, Santosh Shilimkar wrote:
> One more possible road block of removing the direct register access
> from PM code is DEVICE PRM module. Even with this clean-up for DEVCIE
> PRM related registers. I guess we still need to use the lowest level
> APIs.
To clarify my comments, I'm not talking about replacing omap4_prm_*() with
omap4_prminst_*() for the device PRM cases. I agree that is not
desirable. What I'd like to see is for the middle-level PM code, such as
pm*.c, to call functions that describe what they are actually trying to do
at a higher level, rather than writing to registers directly.
I'll take the PRM_VOLTSETUP* registers as a rough example. This may be a
bad example since we probably don't write to this directly from pm*.c any
more, but the basic idea is, rather than writing some mystery value to a
register from the pm*.c code, we should write something like:
int omap4_prm_regulator_set_ramp_up_duration(u32 ns, u8 starting_pwrst);
which would then take care of computing the prescaler and count values
appropriately given the current sys_clk and writing them to the register
or returning an error if something is wrong.
The long-term goal is to be able to reuse as much PM code as possible
between all of the different OMAP2+ platforms.
- Paul
^ permalink raw reply [flat|nested] 38+ messages in thread
* [PATCH 01/11] OMAP4: PRCM: add OMAP4-specific accessor/mutatorfunctions
2010-12-11 1:55 ` Paul Walmsley
@ 2010-12-11 7:32 ` Santosh Shilimkar
0 siblings, 0 replies; 38+ messages in thread
From: Santosh Shilimkar @ 2010-12-11 7:32 UTC (permalink / raw)
To: linux-arm-kernel
> -----Original Message-----
> From: Paul Walmsley [mailto:paul at pwsan.com]
> Sent: Saturday, December 11, 2010 7:26 AM
> To: Santosh Shilimkar
> Cc: linux-omap at vger.kernel.org; linux-arm-kernel at lists.infradead.org;
> Rajendra Nayak; Benoit Cousson
> Subject: RE: [PATCH 01/11] OMAP4: PRCM: add OMAP4-specific
> accessor/mutatorfunctions
>
> On Wed, 8 Dec 2010, Santosh Shilimkar wrote:
>
> > One more possible road block of removing the direct register access
> > from PM code is DEVICE PRM module. Even with this clean-up for DEVCIE
> > PRM related registers. I guess we still need to use the lowest level
> > APIs.
>
> To clarify my comments, I'm not talking about replacing omap4_prm_*()
with
> omap4_prminst_*() for the device PRM cases. I agree that is not
> desirable. What I'd like to see is for the middle-level PM code, such
as
> pm*.c, to call functions that describe what they are actually trying to
do
> at a higher level, rather than writing to registers directly.
>
> I'll take the PRM_VOLTSETUP* registers as a rough example. This may be
a
> bad example since we probably don't write to this directly from pm*.c
any
> more, but the basic idea is, rather than writing some mystery value to a
> register from the pm*.c code, we should write something like:
>
> int omap4_prm_regulator_set_ramp_up_duration(u32 ns, u8 starting_pwrst);
>
> which would then take care of computing the prescaler and count values
> appropriately given the current sys_clk and writing them to the register
> or returning an error if something is wrong.
>
> The long-term goal is to be able to reuse as much PM code as possible
> between all of the different OMAP2+ platforms.
>
Thanks for clarification. We are fully aligned here.
Regards,
Santosh
^ permalink raw reply [flat|nested] 38+ messages in thread
* [PATCH 01/11] OMAP4: PRCM: add OMAP4-specific accessor/mutatorfunctions
2010-12-08 6:18 ` [PATCH 01/11] OMAP4: PRCM: add OMAP4-specific accessor/mutator functions Paul Walmsley
2010-12-08 9:48 ` [PATCH 01/11] OMAP4: PRCM: add OMAP4-specific accessor/mutatorfunctions Santosh Shilimkar
@ 2010-12-08 12:33 ` Rajendra Nayak
2010-12-15 6:48 ` Paul Walmsley
2010-12-08 13:50 ` Rajendra Nayak
2 siblings, 1 reply; 38+ messages in thread
From: Rajendra Nayak @ 2010-12-08 12:33 UTC (permalink / raw)
To: linux-arm-kernel
<snip>...
> diff --git a/arch/arm/mach-omap2/cminst44xx.c
b/arch/arm/mach-omap2/cminst44xx.c
> new file mode 100644
> index 0000000..2c0cad3
> --- /dev/null
> +++ b/arch/arm/mach-omap2/cminst44xx.c
> @@ -0,0 +1,118 @@
> +/*
> + * OMAP4 CM instance functions
> + *
> + * Copyright (C) 2009 Nokia Corporation
> + * Paul Walmsley
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + *
> + * This is needed since CM instances can be in the PRM, PRCM_MPU, CM1,
> + * or CM2 hardware modules. For example, the EMU_CM CM instance is in
> + * the PRM hardware module. What a mess...
> + */
> +
> +#include <linux/kernel.h>
> +#include <linux/types.h>
> +#include <linux/errno.h>
> +#include <linux/err.h>
> +#include <linux/io.h>
> +
> +#include <plat/common.h>
> +
> +#include "cm.h"
> +#include "cm1_44xx.h"
> +#include "cm2_44xx.h"
> +#include "cm44xx.h"
> +#include "cminst44xx.h"
> +#include "cm-regbits-44xx.h"
> +#include "prcm44xx.h"
> +#include "prm44xx.h"
> +#include "prcm_mpu44xx.h"
> +
> +static u32 (*_cm_read_fns[OMAP4_MAX_PRCM_PARTITIONS])(s16, u16) = {
> + [OMAP4430_INVALID_PRCM_PARTITION] = NULL,
> + [OMAP4430_PRM_PARTITION] =
&omap4_prm_read_inst_reg,
> + [OMAP4430_CM1_PARTITION] =
&omap4_cm1_read_inst_reg,
> + [OMAP4430_CM2_PARTITION] =
&omap4_cm2_read_inst_reg,
> + [OMAP4430_SCRM_PARTITION] = NULL,
> + [OMAP4430_PRCM_MPU_PARTITION] =
&omap4_prcm_mpu_read_inst_reg
> +};
> +
> +static void (*_cm_write_fns[OMAP4_MAX_PRCM_PARTITIONS])(u32, s16, u16)
= {
> + [OMAP4430_INVALID_PRCM_PARTITION] = NULL,
> + [OMAP4430_PRM_PARTITION] =
&omap4_prm_write_inst_reg,
> + [OMAP4430_CM1_PARTITION] =
&omap4_cm1_write_inst_reg,
> + [OMAP4430_CM2_PARTITION] =
&omap4_cm2_write_inst_reg,
> + [OMAP4430_SCRM_PARTITION] = NULL,
> + [OMAP4430_PRCM_MPU_PARTITION] =
&omap4_prcm_mpu_write_inst_reg
> +};
> +
> +/* Read a register in a CM instance */
> +u32 omap4_cminst_read_inst_reg(u8 part, s16 module, u16 idx)
> +{
> + BUG_ON(part >= OMAP4_MAX_PRCM_PARTITIONS ||
> + part == OMAP4430_INVALID_PRCM_PARTITION ||
> + !_cm_read_fns[part]);
> + return _cm_read_fns[part](module, idx);
Hi Paul,
Would it help if we can avoid one more level of function
indirection (given that these are low level apis) and store
the Partition offsets in the tables above (instead of func
pointers) and do some thing like this.
return __raw_readl(OMAP2_L4_IO_ADDRESS(cm_read_offset[part],
module, idx));
with the table entries of cm_read_offset looking something like
> + [OMAP4430_PRM_PARTITION] = OMAP4430_PRM_BASE,
> + [OMAP4430_CM1_PARTITION] = OMAP4430_CM1_BASE,
> + [OMAP4430_CM2_PARTITION] = OMAP4430_CM2_BASE,
regards,
Rajendra
> +}
> +
> +/* Write into a register in a CM instance */
> +void omap4_cminst_write_inst_reg(u32 val, u8 part, s16 module, u16 idx)
> +{
> + BUG_ON(part >= OMAP4_MAX_PRCM_PARTITIONS ||
> + part == OMAP4430_INVALID_PRCM_PARTITION ||
> + !_cm_write_fns[part]);
> + _cm_write_fns[part](val, module, idx);
> +}
> +
> +/* Read-modify-write a register in CM1. Caller must lock */
> +u32 omap4_cminst_rmw_inst_reg_bits(u32 mask, u32 bits, u8 part,
> + s16 module, s16 idx)
> +{
> + u32 v;
> +
> + v = omap4_cminst_read_inst_reg(part, module, idx);
> + v &= ~mask;
> + v |= bits;
> + omap4_cminst_write_inst_reg(v, part, module, idx);
> +
> + return v;
> +}
> +
> +
> +/**
> + * omap4_cm_wait_module_ready - wait for a module to be in 'func' state
> + * @clkctrl_reg: CLKCTRL module address
> + *
> + * Wait for the module IDLEST to be functional. If the idle state is in
any
> + * the non functional state (trans, idle or disabled), module and thus
the
> + * sysconfig cannot be accessed and will probably lead to an "imprecise
> + * external abort"
> + *
> + * Module idle state:
> + * 0x0 func: Module is fully functional, including OCP
> + * 0x1 trans: Module is performing transition: wakeup, or sleep,
or sleep
> + * abortion
> + * 0x2 idle: Module is in Idle mode (only OCP part). It is
functional if
> + * using separate functional clock
> + * 0x3 disabled: Module is disabled and cannot be accessed
> + *
> + */
> +int omap4_cm_wait_module_ready(void __iomem *clkctrl_reg)
> +{
> + int i = 0;
> +
> + if (!clkctrl_reg)
> + return 0;
> +
> + omap_test_timeout((
> + ((__raw_readl(clkctrl_reg) & OMAP4430_IDLEST_MASK) == 0)
||
> + (((__raw_readl(clkctrl_reg) & OMAP4430_IDLEST_MASK) >>
> + OMAP4430_IDLEST_SHIFT) == 0x2)),
> + MAX_MODULE_READY_TIME, i);
> +
> + return (i < MAX_MODULE_READY_TIME) ? 0 : -EBUSY;
> +}
> +
> diff --git a/arch/arm/mach-omap2/prcm.c b/arch/arm/mach-omap2/prcm.c
> index dd95cbb..fe0865b 100644
> --- a/arch/arm/mach-omap2/prcm.c
> +++ b/arch/arm/mach-omap2/prcm.c
> @@ -33,6 +33,7 @@
> #include "cm44xx.h"
> #include "prm2xxx_3xxx.h"
> #include "prm44xx.h"
> +#include "prcm44xx.h"
> #include "prm-regbits-24xx.h"
> #include "prm-regbits-44xx.h"
> #include "control.h"
> @@ -80,31 +81,6 @@ void omap_prcm_arch_reset(char mode, const char *cmd)
> prcm_offs, OMAP4_RM_RSTCTRL);
> }
>
> -/* Read a PRM register, AND it, and shift the result down to bit 0 */
> -u32 omap4_prm_read_bits_shift(void __iomem *reg, u32 mask)
> -{
> - u32 v;
> -
> - v = __raw_readl(reg);
> - v &= mask;
> - v >>= __ffs(mask);
> -
> - return v;
> -}
> -
> -/* Read-modify-write a register in a PRM module. Caller must lock */
> -u32 omap4_prm_rmw_reg_bits(u32 mask, u32 bits, void __iomem *reg)
> -{
> - u32 v;
> -
> - v = __raw_readl(reg);
> - v &= ~mask;
> - v |= bits;
> - __raw_writel(v, reg);
> -
> - return v;
> -}
> -
> /**
> * omap2_cm_wait_idlest - wait for IDLEST bit to indicate module
readiness
> * @reg: physical address of module IDLEST register
> diff --git a/arch/arm/mach-omap2/prcm44xx.h
b/arch/arm/mach-omap2/prcm44xx.h
> new file mode 100644
> index 0000000..7334ffb
> --- /dev/null
> +++ b/arch/arm/mach-omap2/prcm44xx.h
> @@ -0,0 +1,42 @@
> +/*
> + * OMAP4 PRCM definitions
> + *
> + * Copyright (C) 2010 Texas Instruments, Inc.
> + * Copyright (C) 2010 Nokia Corporation
> + *
> + * Paul Walmsley
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + *
> + * This file contains macros and functions that are common to all of
> + * the PRM/CM/PRCM blocks on the OMAP4 devices: PRM, CM1, CM2,
> + * PRCM_MPU, SCRM
> + */
> +
> +#ifndef __ARCH_ARM_MACH_OMAP2_PRCM44XX_H
> +#define __ARCH_ARM_MACH_OMAP2_PRCM44XX_H
> +
> +/*
> + * OMAP4 PRCM partition IDs
> + *
> + * The numbers and order are arbitrary, but 0 is reserved for the
> + * 'invalid' partition in case someone forgets to add a
> + * .prcm_partition field.
> + */
> +#define OMAP4430_INVALID_PRCM_PARTITION 0
> +#define OMAP4430_PRM_PARTITION 1
> +#define OMAP4430_CM1_PARTITION 2
> +#define OMAP4430_CM2_PARTITION 3
> +#define OMAP4430_SCRM_PARTITION 4
> +#define OMAP4430_PRCM_MPU_PARTITION 5
> +
> +/*
> + * OMAP4_MAX_PRCM_PARTITIONS: set to the highest value of the PRCM
partition
> + * IDs, plus one
> + */
> +#define OMAP4_MAX_PRCM_PARTITIONS 6
> +
> +
> +#endif
> diff --git a/arch/arm/mach-omap2/prcm_mpu44xx.c
b/arch/arm/mach-omap2/prcm_mpu44xx.c
> new file mode 100644
> index 0000000..171fe17
> --- /dev/null
> +++ b/arch/arm/mach-omap2/prcm_mpu44xx.c
> @@ -0,0 +1,45 @@
> +/*
> + * OMAP4 PRCM_MPU module functions
> + *
> + * Copyright (C) 2009 Nokia Corporation
> + * Paul Walmsley
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + */
> +
> +#include <linux/kernel.h>
> +#include <linux/types.h>
> +#include <linux/errno.h>
> +#include <linux/err.h>
> +#include <linux/io.h>
> +
> +#include <plat/common.h>
> +
> +#include "prcm_mpu44xx.h"
> +#include "cm-regbits-44xx.h"
> +
> +/* PRCM_MPU low-level functions */
> +
> +u32 omap4_prcm_mpu_read_inst_reg(s16 inst, u16 reg)
> +{
> + return __raw_readl(OMAP44XX_PRCM_MPU_REGADDR(inst, reg));
> +}
> +
> +void omap4_prcm_mpu_write_inst_reg(u32 val, s16 inst, u16 reg)
> +{
> + __raw_writel(val, OMAP44XX_PRCM_MPU_REGADDR(inst, reg));
> +}
> +
> +u32 omap4_prcm_mpu_rmw_inst_reg_bits(u32 mask, u32 bits, s16 inst, s16
reg)
> +{
> + u32 v;
> +
> + v = omap4_prcm_mpu_read_inst_reg(inst, reg);
> + v &= ~mask;
> + v |= bits;
> + omap4_prcm_mpu_write_inst_reg(v, inst, reg);
> +
> + return v;
> +}
> diff --git a/arch/arm/mach-omap2/prcm_mpu44xx.h
b/arch/arm/mach-omap2/prcm_mpu44xx.h
> index 80e00c1..e5190e9 100644
> --- a/arch/arm/mach-omap2/prcm_mpu44xx.h
> +++ b/arch/arm/mach-omap2/prcm_mpu44xx.h
> @@ -88,4 +88,12 @@
> #define OMAP4_CM_CPU1_CLKSTCTRL_OFFSET 0x0018
> #define OMAP4430_CM_CPU1_CLKSTCTRL
> OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU1_INST, 0x0018)
>
> +/* Function prototypes */
> +# ifndef __ASSEMBLER__
> +extern u32 omap4_prcm_mpu_read_inst_reg(s16 inst, u16 idx);
> +extern void omap4_prcm_mpu_write_inst_reg(u32 val, s16 inst, u16 idx);
> +extern u32 omap4_prcm_mpu_rmw_inst_reg_bits(u32 mask, u32 bits, s16
inst,
> + s16 idx);
> +# endif
> +
> #endif
> diff --git a/arch/arm/mach-omap2/prm44xx.c
b/arch/arm/mach-omap2/prm44xx.c
> index 697b58f..c016ae4 100644
> --- a/arch/arm/mach-omap2/prm44xx.c
> +++ b/arch/arm/mach-omap2/prm44xx.c
> @@ -15,6 +15,7 @@
> #include <linux/delay.h>
> #include <linux/errno.h>
> #include <linux/err.h>
> +#include <linux/io.h>
>
> #include <plat/common.h>
> #include <plat/cpu.h>
> @@ -29,6 +30,70 @@
> */
> #define OMAP4_RST_CTRL_ST_OFFSET 4
>
> +/* PRM low-level functions */
> +
> +/* Read a register in a CM/PRM instance in the PRM module */
> +u32 omap4_prm_read_inst_reg(s16 inst, u16 reg)
> +{
> + return __raw_readl(OMAP44XX_PRM_REGADDR(inst, reg));
> +}
> +
> +/* Write into a register in a CM/PRM instance in the PRM module */
> +void omap4_prm_write_inst_reg(u32 val, s16 inst, u16 reg)
> +{
> + __raw_writel(val, OMAP44XX_PRM_REGADDR(inst, reg));
> +}
> +
> +/* Read-modify-write a register in a PRM module. Caller must lock */
> +u32 omap4_prm_rmw_inst_reg_bits(u32 mask, u32 bits, s16 inst, s16 reg)
> +{
> + u32 v;
> +
> + v = omap4_prm_read_inst_reg(inst, reg);
> + v &= ~mask;
> + v |= bits;
> + omap4_prm_write_inst_reg(v, inst, reg);
> +
> + return v;
> +}
> +
> +/* Read a PRM register, AND it, and shift the result down to bit 0 */
> +/* XXX deprecated */
> +u32 omap4_prm_read_bits_shift(void __iomem *reg, u32 mask)
> +{
> + u32 v;
> +
> + v = __raw_readl(reg);
> + v &= mask;
> + v >>= __ffs(mask);
> +
> + return v;
> +}
> +
> +/* Read-modify-write a register in a PRM module. Caller must lock */
> +/* XXX deprecated */
> +u32 omap4_prm_rmw_reg_bits(u32 mask, u32 bits, void __iomem *reg)
> +{
> + u32 v;
> +
> + v = __raw_readl(reg);
> + v &= ~mask;
> + v |= bits;
> + __raw_writel(v, reg);
> +
> + return v;
> +}
> +
> +u32 omap4_prm_set_inst_reg_bits(u32 bits, s16 inst, s16 reg)
> +{
> + return omap4_prm_rmw_inst_reg_bits(bits, bits, inst, reg);
> +}
> +
> +u32 omap4_prm_clear_inst_reg_bits(u32 bits, s16 inst, s16 reg)
> +{
> + return omap4_prm_rmw_inst_reg_bits(bits, 0x0, inst, reg);
> +}
> +
> /**
> * omap4_prm_is_hardreset_asserted - read the HW reset line state of
> * submodules contained in the hwmod module
> diff --git a/arch/arm/mach-omap2/prm44xx.h
b/arch/arm/mach-omap2/prm44xx.h
> index 3d36149..3588653 100644
> --- a/arch/arm/mach-omap2/prm44xx.h
> +++ b/arch/arm/mach-omap2/prm44xx.h
> @@ -744,6 +744,12 @@
> /* Function prototypes */
> # ifndef __ASSEMBLER__
>
> +extern u32 omap4_prm_read_inst_reg(s16 inst, u16 idx);
> +extern void omap4_prm_write_inst_reg(u32 val, s16 inst, u16 idx);
> +extern u32 omap4_prm_rmw_inst_reg_bits(u32 mask, u32 bits, s16 inst,
s16 idx);
> +extern u32 omap4_prm_rmw_reg_bits(u32 mask, u32 bits, void __iomem
*reg);
> +extern u32 omap4_prm_set_inst_reg_bits(u32 bits, s16 inst, s16 idx);
> +extern u32 omap4_prm_clear_inst_reg_bits(u32 bits, s16 inst, s16 idx);
> extern u32 omap4_prm_read_bits_shift(void __iomem *reg, u32 mask);
>
> extern int omap4_prm_is_hardreset_asserted(void __iomem *rstctrl_reg,
u8 shift);
> diff --git a/arch/arm/mach-omap2/prminst44xx.c
b/arch/arm/mach-omap2/prminst44xx.c
> new file mode 100644
> index 0000000..01c57b6
> --- /dev/null
> +++ b/arch/arm/mach-omap2/prminst44xx.c
> @@ -0,0 +1,74 @@
> +/*
> + * OMAP4 PRM instance functions
> + *
> + * Copyright (C) 2009 Nokia Corporation
> + * Paul Walmsley
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + */
> +
> +#include <linux/kernel.h>
> +#include <linux/types.h>
> +#include <linux/errno.h>
> +#include <linux/err.h>
> +#include <linux/io.h>
> +
> +#include <plat/common.h>
> +
> +#include "prm44xx.h"
> +#include "prminst44xx.h"
> +#include "prm-regbits-44xx.h"
> +#include "prcm44xx.h"
> +#include "prcm_mpu44xx.h"
> +
> +static u32 (*_prm_read_fns[OMAP4_MAX_PRCM_PARTITIONS])(s16, u16) = {
> + [OMAP4430_INVALID_PRCM_PARTITION] = NULL,
> + [OMAP4430_PRM_PARTITION] =
&omap4_prm_read_inst_reg,
> + [OMAP4430_CM1_PARTITION] = NULL,
> + [OMAP4430_CM2_PARTITION] = NULL,
> + [OMAP4430_SCRM_PARTITION] = NULL,
> + [OMAP4430_PRCM_MPU_PARTITION] =
&omap4_prcm_mpu_read_inst_reg
> +};
> +
> +static void (*_prm_write_fns[OMAP4_MAX_PRCM_PARTITIONS])(u32, s16, u16)
= {
> + [OMAP4430_INVALID_PRCM_PARTITION] = NULL,
> + [OMAP4430_PRM_PARTITION] =
&omap4_prm_write_inst_reg,
> + [OMAP4430_CM1_PARTITION] = NULL,
> + [OMAP4430_CM2_PARTITION] = NULL,
> + [OMAP4430_SCRM_PARTITION] = NULL,
> + [OMAP4430_PRCM_MPU_PARTITION] =
&omap4_prcm_mpu_write_inst_reg
> +};
> +
> +/* Read a register in a PRM instance */
> +u32 omap4_prminst_read_inst_reg(u8 part, s16 inst, u16 idx)
> +{
> + BUG_ON(part >= OMAP4_MAX_PRCM_PARTITIONS ||
> + part == OMAP4430_INVALID_PRCM_PARTITION ||
> + !_prm_read_fns[part]);
> + return _prm_read_fns[part](inst, idx);
> +}
> +
> +/* Write into a register in a PRM instance */
> +void omap4_prminst_write_inst_reg(u32 val, u8 part, s16 inst, u16 idx)
> +{
> + BUG_ON(part >= OMAP4_MAX_PRCM_PARTITIONS ||
> + part == OMAP4430_INVALID_PRCM_PARTITION ||
> + !_prm_write_fns[part]);
> + _prm_write_fns[part](val, inst, idx);
> +}
> +
> +/* Read-modify-write a register in PRM. Caller must lock */
> +u32 omap4_prminst_rmw_inst_reg_bits(u32 mask, u32 bits, u8 part, s16
inst,
> + s16 idx)
> +{
> + u32 v;
> +
> + v = omap4_prminst_read_inst_reg(part, inst, idx);
> + v &= ~mask;
> + v |= bits;
> + omap4_prminst_write_inst_reg(v, part, inst, idx);
> +
> + return v;
> +}
> diff --git a/arch/arm/mach-omap2/prminst44xx.h
b/arch/arm/mach-omap2/prminst44xx.h
> new file mode 100644
> index 0000000..02dd66d
> --- /dev/null
> +++ b/arch/arm/mach-omap2/prminst44xx.h
> @@ -0,0 +1,25 @@
> +/*
> + * OMAP4 Power/Reset Management (PRM) function prototypes
> + *
> + * Copyright (C) 2010 Nokia Corporation
> + * Paul Walmsley
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + */
> +#ifndef __ARCH_ASM_MACH_OMAP2_PRMINST44XX_H
> +#define __ARCH_ASM_MACH_OMAP2_PRMINST44XX_H
> +
> +/*
> + * In an ideal world, we would not export these low-level functions,
> + * but this will probably take some time to fix properly
> + */
> +extern u32 omap4_prminst_read_inst_reg(u8 part, s16 inst, u16 idx);
> +extern void omap4_prminst_write_inst_reg(u32 val, u8 part, s16 inst,
u16 idx);
> +extern u32 omap4_prminst_rmw_inst_reg_bits(u32 mask, u32 bits, u8 part,
> + s16 inst, s16 idx);
> +
> +extern void omap4_prm_global_warm_sw_reset(void);
> +
> +#endif
> diff --git a/arch/arm/plat-omap/include/plat/prcm.h
b/arch/arm/plat-omap/include/plat/prcm.h
> index d059a05..078906d 100644
> --- a/arch/arm/plat-omap/include/plat/prcm.h
> +++ b/arch/arm/plat-omap/include/plat/prcm.h
> @@ -18,6 +18,10 @@
> * You should have received a copy of the GNU General Public License
> * along with this program; if not, write to the Free Software
> * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307
USA
> + *
> + * XXX This file is deprecated. The PRCM is an OMAP2+-only subsystem,
> + * so this file doesn't belong in plat-omap/include/plat. Please
> + * do not add anything new to this file.
> */
>
> #ifndef __ASM_ARM_ARCH_OMAP_PRCM_H
> @@ -31,9 +35,6 @@ int omap2_cm_wait_idlest(void __iomem *reg, u32 mask,
u8 idlest,
> #define START_PADCONF_SAVE 0x2
> #define PADCONF_SAVE_DONE 0x1
>
> -u32 omap4_prm_read_bits_shift(void __iomem *reg, u32 mask);
> -u32 omap4_prm_rmw_reg_bits(u32 mask, u32 bits, void __iomem *reg);
> -
> #endif
>
>
>
^ permalink raw reply [flat|nested] 38+ messages in thread* [PATCH 01/11] OMAP4: PRCM: add OMAP4-specific accessor/mutatorfunctions
2010-12-08 12:33 ` Rajendra Nayak
@ 2010-12-15 6:48 ` Paul Walmsley
2010-12-15 11:08 ` Rajendra Nayak
` (2 more replies)
0 siblings, 3 replies; 38+ messages in thread
From: Paul Walmsley @ 2010-12-15 6:48 UTC (permalink / raw)
To: linux-arm-kernel
Hi Rajendra
On Wed, 8 Dec 2010, Rajendra Nayak wrote:
> Would it help if we can avoid one more level of function
> indirection (given that these are low level apis) and store
> the Partition offsets in the tables above (instead of func
> pointers) and do some thing like this.
>
> return __raw_readl(OMAP2_L4_IO_ADDRESS(cm_read_offset[part],
> module, idx));
>
> with the table entries of cm_read_offset looking something like
> > + [OMAP4430_PRM_PARTITION] = OMAP4430_PRM_BASE,
> > + [OMAP4430_CM1_PARTITION] = OMAP4430_CM1_BASE,
> > + [OMAP4430_CM2_PARTITION] = OMAP4430_CM2_BASE,
I did a version of this patch without the extra level of indirection.
I'm not sure if it's better or worse. The original seems conceptually
cleaner to me, but this revised version is probably slightly more
efficient. Do you (or anyone else) have a strong preference?
Note that the patch has not yet been boot-tested, but I think the
principle is clear.
- Paul
From: Paul Walmsley <paul@pwsan.com>
Date: Tue, 14 Dec 2010 22:23:49 -0700
Subject: [PATCH] OMAP4: PRCM: add OMAP4-specific accessor/mutator functions
In some ways, the OMAP4 PRCM register layout is quite different than
the OMAP2/3 PRCM register layout. For example, on OMAP2/3, from a
register layout point of view, all CM instances were located in the CM
subsystem, and all PRM instances were located in the PRM subsystem.
OMAP4 changes this. Now, for example, some CM instances, such as
WKUP_CM and EMU_CM, are located in the system PRM subsystem. And a
"local PRCM" exists for the MPU - this PRCM combines registers that
would normally appear in both CM and PRM instances, but uses its own
register layout which matches neither the OMAP2/3 PRCM layout nor the
OMAP4 PRCM layout.
To try to deal with this, introduce some new functions, omap4_cminst*
and omap4_prminst*. The former is to be used when writing to a CM
instance register (no matter what subsystem or hardware module it
exists in), and the latter, similarly, with PRM instance registers.
To determine which "PRCM partition" to write to, the functions take a
PRCM instance ID argument. Subsequent patches add these partition IDs
to the OMAP4 powerdomain and clockdomain definitions.
As far as I can see, there's really no good way to handle these types
of register access inconsistencies. This patch seemed like the least
bad approach.
Moving forward, the long-term goal is to remove all direct PRCM
register access from the PM code. PRCM register access should go
through layers such as the powerdomain and clockdomain code that can
hide the details of how to interact with the specific hardware
variant.
While here, rename cm4xxx.c to cm44xx.c to match the naming convention
of the other OMAP4 PRCM files.
Thanks to Santosh Shilimkar <santosh.shilimkar@ti.com> for some comments.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Beno?t Cousson <b-cousson@ti.com>
Cc: Rajendra Nayak <rnayak@ti.com>
Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
---
arch/arm/mach-omap2/Makefile | 4 +-
arch/arm/mach-omap2/cm1_44xx.h | 5 ++
arch/arm/mach-omap2/cm2_44xx.h | 6 ++
arch/arm/mach-omap2/cm44xx.c | 52 +++++++++++++++
arch/arm/mach-omap2/cm4xxx.c | 62 ------------------
arch/arm/mach-omap2/cminst44xx.c | 109 ++++++++++++++++++++++++++++++++
arch/arm/mach-omap2/cminst44xx.h | 25 +++++++
arch/arm/mach-omap2/prcm.c | 26 +-------
arch/arm/mach-omap2/prcm44xx.h | 42 ++++++++++++
arch/arm/mach-omap2/prcm_mpu44xx.c | 45 +++++++++++++
arch/arm/mach-omap2/prcm_mpu44xx.h | 8 +++
arch/arm/mach-omap2/prm44xx.c | 65 +++++++++++++++++++
arch/arm/mach-omap2/prm44xx.h | 6 ++
arch/arm/mach-omap2/prminst44xx.c | 66 +++++++++++++++++++
arch/arm/mach-omap2/prminst44xx.h | 25 +++++++
arch/arm/plat-omap/include/plat/prcm.h | 7 +-
16 files changed, 462 insertions(+), 91 deletions(-)
create mode 100644 arch/arm/mach-omap2/cm44xx.c
delete mode 100644 arch/arm/mach-omap2/cm4xxx.c
create mode 100644 arch/arm/mach-omap2/cminst44xx.c
create mode 100644 arch/arm/mach-omap2/cminst44xx.h
create mode 100644 arch/arm/mach-omap2/prcm44xx.h
create mode 100644 arch/arm/mach-omap2/prcm_mpu44xx.c
create mode 100644 arch/arm/mach-omap2/prminst44xx.c
create mode 100644 arch/arm/mach-omap2/prminst44xx.h
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index aee22f9..0c0cdd9 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -69,7 +69,9 @@ obj-$(CONFIG_ARCH_OMAP3) += prcm.o cm2xxx_3xxx.o prm2xxx_3xxx.o
# XXX The presence of cm2xxx_3xxx.o on the line below is temporary and
# will be removed once the OMAP4 part of the codebase is converted to
# use OMAP4-specific PRCM functions.
-obj-$(CONFIG_ARCH_OMAP4) += prcm.o cm2xxx_3xxx.o cm4xxx.o
+obj-$(CONFIG_ARCH_OMAP4) += prcm.o cm2xxx_3xxx.o cminst44xx.o \
+ cm44xx.o prcm_mpu44xx.o \
+ prminst44xx.o
# OMAP powerdomain framework
powerdomain-common += powerdomain.o powerdomain-common.o
diff --git a/arch/arm/mach-omap2/cm1_44xx.h b/arch/arm/mach-omap2/cm1_44xx.h
index aa2ee78..63ef9e3 100644
--- a/arch/arm/mach-omap2/cm1_44xx.h
+++ b/arch/arm/mach-omap2/cm1_44xx.h
@@ -248,4 +248,9 @@
#define OMAP4_CM_DYN_DEP_PRESCAL_RESTORE_OFFSET 0x0040
#define OMAP4430_CM_DYN_DEP_PRESCAL_RESTORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_INST, 0x0040)
+/* Function prototypes */
+extern u32 omap4_cm1_read_inst_reg(s16 inst, u16 idx);
+extern void omap4_cm1_write_inst_reg(u32 val, s16 inst, u16 idx);
+extern u32 omap4_cm1_rmw_inst_reg_bits(u32 mask, u32 bits, s16 inst, s16 idx);
+
#endif
diff --git a/arch/arm/mach-omap2/cm2_44xx.h b/arch/arm/mach-omap2/cm2_44xx.h
index 89c9522..0fd0210 100644
--- a/arch/arm/mach-omap2/cm2_44xx.h
+++ b/arch/arm/mach-omap2/cm2_44xx.h
@@ -480,4 +480,10 @@
#define OMAP4430_CM_L3INIT_USB_TLL_CLKCTRL_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x0058)
#define OMAP4_CM_SDMA_STATICDEP_RESTORE_OFFSET 0x005c
#define OMAP4430_CM_SDMA_STATICDEP_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x005c)
+
+/* Function prototypes */
+extern u32 omap4_cm2_read_inst_reg(s16 inst, u16 idx);
+extern void omap4_cm2_write_inst_reg(u32 val, s16 inst, u16 idx);
+extern u32 omap4_cm2_rmw_inst_reg_bits(u32 mask, u32 bits, s16 inst, s16 idx);
+
#endif
diff --git a/arch/arm/mach-omap2/cm44xx.c b/arch/arm/mach-omap2/cm44xx.c
new file mode 100644
index 0000000..e96f53e
--- /dev/null
+++ b/arch/arm/mach-omap2/cm44xx.c
@@ -0,0 +1,52 @@
+/*
+ * OMAP4 CM1, CM2 module low-level functions
+ *
+ * Copyright (C) 2010 Nokia Corporation
+ * Paul Walmsley
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * These functions are intended to be used only by the cminst44xx.c file.
+ * XXX Perhaps we should just move them there and make them static.
+ */
+
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <linux/errno.h>
+#include <linux/err.h>
+#include <linux/io.h>
+
+#include <plat/common.h>
+
+#include "cm.h"
+#include "cm1_44xx.h"
+#include "cm2_44xx.h"
+#include "cm-regbits-44xx.h"
+
+/* CM1 hardware module low-level functions */
+
+/* Read a register in CM1 */
+u32 omap4_cm1_read_inst_reg(s16 inst, u16 reg)
+{
+ return __raw_readl(OMAP44XX_CM1_REGADDR(inst, reg));
+}
+
+/* Write into a register in CM1 */
+void omap4_cm1_write_inst_reg(u32 val, s16 inst, u16 reg)
+{
+ __raw_writel(val, OMAP44XX_CM1_REGADDR(inst, reg));
+}
+
+/* Read a register in CM2 */
+u32 omap4_cm2_read_inst_reg(s16 inst, u16 reg)
+{
+ return __raw_readl(OMAP44XX_CM2_REGADDR(inst, reg));
+}
+
+/* Write into a register in CM2 */
+void omap4_cm2_write_inst_reg(u32 val, s16 inst, u16 reg)
+{
+ __raw_writel(val, OMAP44XX_CM2_REGADDR(inst, reg));
+}
diff --git a/arch/arm/mach-omap2/cm4xxx.c b/arch/arm/mach-omap2/cm4xxx.c
deleted file mode 100644
index 25d2b3e..0000000
--- a/arch/arm/mach-omap2/cm4xxx.c
+++ /dev/null
@@ -1,62 +0,0 @@
-/*
- * OMAP4 CM module functions
- *
- * Copyright (C) 2009 Nokia Corporation
- * Paul Walmsley
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#include <linux/kernel.h>
-#include <linux/module.h>
-#include <linux/types.h>
-#include <linux/delay.h>
-#include <linux/spinlock.h>
-#include <linux/list.h>
-#include <linux/errno.h>
-#include <linux/err.h>
-#include <linux/io.h>
-
-#include <asm/atomic.h>
-
-#include <plat/common.h>
-
-#include "cm44xx.h"
-#include "cm-regbits-44xx.h"
-
-/**
- * omap4_cm_wait_module_ready - wait for a module to be in 'func' state
- * @clkctrl_reg: CLKCTRL module address
- *
- * Wait for the module IDLEST to be functional. If the idle state is in any
- * the non functional state (trans, idle or disabled), module and thus the
- * sysconfig cannot be accessed and will probably lead to an "imprecise
- * external abort"
- *
- * Module idle state:
- * 0x0 func: Module is fully functional, including OCP
- * 0x1 trans: Module is performing transition: wakeup, or sleep, or sleep
- * abortion
- * 0x2 idle: Module is in Idle mode (only OCP part). It is functional if
- * using separate functional clock
- * 0x3 disabled: Module is disabled and cannot be accessed
- *
- */
-int omap4_cm_wait_module_ready(void __iomem *clkctrl_reg)
-{
- int i = 0;
-
- if (!clkctrl_reg)
- return 0;
-
- omap_test_timeout((
- ((__raw_readl(clkctrl_reg) & OMAP4430_IDLEST_MASK) == 0) ||
- (((__raw_readl(clkctrl_reg) & OMAP4430_IDLEST_MASK) >>
- OMAP4430_IDLEST_SHIFT) == 0x2)),
- MAX_MODULE_READY_TIME, i);
-
- return (i < MAX_MODULE_READY_TIME) ? 0 : -EBUSY;
-}
-
diff --git a/arch/arm/mach-omap2/cminst44xx.c b/arch/arm/mach-omap2/cminst44xx.c
new file mode 100644
index 0000000..c13613b
--- /dev/null
+++ b/arch/arm/mach-omap2/cminst44xx.c
@@ -0,0 +1,109 @@
+/*
+ * OMAP4 CM instance functions
+ *
+ * Copyright (C) 2009 Nokia Corporation
+ * Paul Walmsley
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This is needed since CM instances can be in the PRM, PRCM_MPU, CM1,
+ * or CM2 hardware modules. For example, the EMU_CM CM instance is in
+ * the PRM hardware module. What a mess...
+ */
+
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <linux/errno.h>
+#include <linux/err.h>
+#include <linux/io.h>
+
+#include <plat/common.h>
+
+#include "cm.h"
+#include "cm1_44xx.h"
+#include "cm2_44xx.h"
+#include "cm44xx.h"
+#include "cminst44xx.h"
+#include "cm-regbits-44xx.h"
+#include "prcm44xx.h"
+#include "prm44xx.h"
+#include "prcm_mpu44xx.h"
+
+static u32 _cm_bases[OMAP4_MAX_PRCM_PARTITIONS] = {
+ [OMAP4430_INVALID_PRCM_PARTITION] = 0,
+ [OMAP4430_PRM_PARTITION] = OMAP4430_PRM_BASE,
+ [OMAP4430_CM1_PARTITION] = OMAP4430_CM1_BASE,
+ [OMAP4430_CM2_PARTITION] = OMAP4430_CM2_BASE,
+ [OMAP4430_SCRM_PARTITION] = 0,
+ [OMAP4430_PRCM_MPU_PARTITION] = OMAP4430_PRCM_MPU_BASE,
+};
+
+/* Read a register in a CM instance */
+u32 omap4_cminst_read_inst_reg(u8 part, s16 inst, u16 idx)
+{
+ BUG_ON(part >= OMAP4_MAX_PRCM_PARTITIONS ||
+ part == OMAP4430_INVALID_PRCM_PARTITION ||
+ !_cm_bases[part]);
+ return __raw_readl(OMAP2_L4_IO_ADDRESS(_cm_bases[part] + inst + idx));
+}
+
+/* Write into a register in a CM instance */
+void omap4_cminst_write_inst_reg(u32 val, u8 part, s16 inst, u16 idx)
+{
+ BUG_ON(part >= OMAP4_MAX_PRCM_PARTITIONS ||
+ part == OMAP4430_INVALID_PRCM_PARTITION ||
+ !_cm_bases[part]);
+ __raw_writel(val, OMAP2_L4_IO_ADDRESS(_cm_bases[part] + inst + idx));
+}
+
+/* Read-modify-write a register in CM1. Caller must lock */
+u32 omap4_cminst_rmw_inst_reg_bits(u32 mask, u32 bits, u8 part, s16 inst,
+ s16 idx)
+{
+ u32 v;
+
+ v = omap4_cminst_read_inst_reg(part, inst, idx);
+ v &= ~mask;
+ v |= bits;
+ omap4_cminst_write_inst_reg(v, part, inst, idx);
+
+ return v;
+}
+
+
+/**
+ * omap4_cm_wait_module_ready - wait for a module to be in 'func' state
+ * @clkctrl_reg: CLKCTRL module address
+ *
+ * Wait for the module IDLEST to be functional. If the idle state is in any
+ * the non functional state (trans, idle or disabled), module and thus the
+ * sysconfig cannot be accessed and will probably lead to an "imprecise
+ * external abort"
+ *
+ * Module idle state:
+ * 0x0 func: Module is fully functional, including OCP
+ * 0x1 trans: Module is performing transition: wakeup, or sleep, or sleep
+ * abortion
+ * 0x2 idle: Module is in Idle mode (only OCP part). It is functional if
+ * using separate functional clock
+ * 0x3 disabled: Module is disabled and cannot be accessed
+ *
+ */
+int omap4_cm_wait_module_ready(void __iomem *clkctrl_reg)
+{
+ int i = 0;
+
+ if (!clkctrl_reg)
+ return 0;
+
+ omap_test_timeout((
+ ((__raw_readl(clkctrl_reg) & OMAP4430_IDLEST_MASK) == 0) ||
+ (((__raw_readl(clkctrl_reg) & OMAP4430_IDLEST_MASK) >>
+ OMAP4430_IDLEST_SHIFT) == 0x2)),
+ MAX_MODULE_READY_TIME, i);
+
+ return (i < MAX_MODULE_READY_TIME) ? 0 : -EBUSY;
+}
+
diff --git a/arch/arm/mach-omap2/cminst44xx.h b/arch/arm/mach-omap2/cminst44xx.h
new file mode 100644
index 0000000..6baa4c7
--- /dev/null
+++ b/arch/arm/mach-omap2/cminst44xx.h
@@ -0,0 +1,25 @@
+/*
+ * OMAP4 Clock Management (CM) function prototypes
+ *
+ * Copyright (C) 2010 Nokia Corporation
+ * Paul Walmsley
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#ifndef __ARCH_ASM_MACH_OMAP2_CMINST44XX_H
+#define __ARCH_ASM_MACH_OMAP2_CMINST44XX_H
+
+/*
+ * In an ideal world, we would not export these low-level functions,
+ * but this will probably take some time to fix properly
+ */
+extern u32 omap4_cminst_read_inst_reg(u8 part, s16 inst, u16 idx);
+extern void omap4_cminst_write_inst_reg(u32 val, u8 part, s16 inst, u16 idx);
+extern u32 omap4_cminst_rmw_inst_reg_bits(u32 mask, u32 bits, u8 part,
+ s16 inst, s16 idx);
+
+extern int omap4_cm_wait_module_ready(void __iomem *clkctrl_reg);
+
+#endif
diff --git a/arch/arm/mach-omap2/prcm.c b/arch/arm/mach-omap2/prcm.c
index dd95cbb..fe0865b 100644
--- a/arch/arm/mach-omap2/prcm.c
+++ b/arch/arm/mach-omap2/prcm.c
@@ -33,6 +33,7 @@
#include "cm44xx.h"
#include "prm2xxx_3xxx.h"
#include "prm44xx.h"
+#include "prcm44xx.h"
#include "prm-regbits-24xx.h"
#include "prm-regbits-44xx.h"
#include "control.h"
@@ -80,31 +81,6 @@ void omap_prcm_arch_reset(char mode, const char *cmd)
prcm_offs, OMAP4_RM_RSTCTRL);
}
-/* Read a PRM register, AND it, and shift the result down to bit 0 */
-u32 omap4_prm_read_bits_shift(void __iomem *reg, u32 mask)
-{
- u32 v;
-
- v = __raw_readl(reg);
- v &= mask;
- v >>= __ffs(mask);
-
- return v;
-}
-
-/* Read-modify-write a register in a PRM module. Caller must lock */
-u32 omap4_prm_rmw_reg_bits(u32 mask, u32 bits, void __iomem *reg)
-{
- u32 v;
-
- v = __raw_readl(reg);
- v &= ~mask;
- v |= bits;
- __raw_writel(v, reg);
-
- return v;
-}
-
/**
* omap2_cm_wait_idlest - wait for IDLEST bit to indicate module readiness
* @reg: physical address of module IDLEST register
diff --git a/arch/arm/mach-omap2/prcm44xx.h b/arch/arm/mach-omap2/prcm44xx.h
new file mode 100644
index 0000000..7334ffb
--- /dev/null
+++ b/arch/arm/mach-omap2/prcm44xx.h
@@ -0,0 +1,42 @@
+/*
+ * OMAP4 PRCM definitions
+ *
+ * Copyright (C) 2010 Texas Instruments, Inc.
+ * Copyright (C) 2010 Nokia Corporation
+ *
+ * Paul Walmsley
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This file contains macros and functions that are common to all of
+ * the PRM/CM/PRCM blocks on the OMAP4 devices: PRM, CM1, CM2,
+ * PRCM_MPU, SCRM
+ */
+
+#ifndef __ARCH_ARM_MACH_OMAP2_PRCM44XX_H
+#define __ARCH_ARM_MACH_OMAP2_PRCM44XX_H
+
+/*
+ * OMAP4 PRCM partition IDs
+ *
+ * The numbers and order are arbitrary, but 0 is reserved for the
+ * 'invalid' partition in case someone forgets to add a
+ * .prcm_partition field.
+ */
+#define OMAP4430_INVALID_PRCM_PARTITION 0
+#define OMAP4430_PRM_PARTITION 1
+#define OMAP4430_CM1_PARTITION 2
+#define OMAP4430_CM2_PARTITION 3
+#define OMAP4430_SCRM_PARTITION 4
+#define OMAP4430_PRCM_MPU_PARTITION 5
+
+/*
+ * OMAP4_MAX_PRCM_PARTITIONS: set to the highest value of the PRCM partition
+ * IDs, plus one
+ */
+#define OMAP4_MAX_PRCM_PARTITIONS 6
+
+
+#endif
diff --git a/arch/arm/mach-omap2/prcm_mpu44xx.c b/arch/arm/mach-omap2/prcm_mpu44xx.c
new file mode 100644
index 0000000..171fe17
--- /dev/null
+++ b/arch/arm/mach-omap2/prcm_mpu44xx.c
@@ -0,0 +1,45 @@
+/*
+ * OMAP4 PRCM_MPU module functions
+ *
+ * Copyright (C) 2009 Nokia Corporation
+ * Paul Walmsley
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <linux/errno.h>
+#include <linux/err.h>
+#include <linux/io.h>
+
+#include <plat/common.h>
+
+#include "prcm_mpu44xx.h"
+#include "cm-regbits-44xx.h"
+
+/* PRCM_MPU low-level functions */
+
+u32 omap4_prcm_mpu_read_inst_reg(s16 inst, u16 reg)
+{
+ return __raw_readl(OMAP44XX_PRCM_MPU_REGADDR(inst, reg));
+}
+
+void omap4_prcm_mpu_write_inst_reg(u32 val, s16 inst, u16 reg)
+{
+ __raw_writel(val, OMAP44XX_PRCM_MPU_REGADDR(inst, reg));
+}
+
+u32 omap4_prcm_mpu_rmw_inst_reg_bits(u32 mask, u32 bits, s16 inst, s16 reg)
+{
+ u32 v;
+
+ v = omap4_prcm_mpu_read_inst_reg(inst, reg);
+ v &= ~mask;
+ v |= bits;
+ omap4_prcm_mpu_write_inst_reg(v, inst, reg);
+
+ return v;
+}
diff --git a/arch/arm/mach-omap2/prcm_mpu44xx.h b/arch/arm/mach-omap2/prcm_mpu44xx.h
index 80e00c1..e5190e9 100644
--- a/arch/arm/mach-omap2/prcm_mpu44xx.h
+++ b/arch/arm/mach-omap2/prcm_mpu44xx.h
@@ -88,4 +88,12 @@
#define OMAP4_CM_CPU1_CLKSTCTRL_OFFSET 0x0018
#define OMAP4430_CM_CPU1_CLKSTCTRL OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU1_INST, 0x0018)
+/* Function prototypes */
+# ifndef __ASSEMBLER__
+extern u32 omap4_prcm_mpu_read_inst_reg(s16 inst, u16 idx);
+extern void omap4_prcm_mpu_write_inst_reg(u32 val, s16 inst, u16 idx);
+extern u32 omap4_prcm_mpu_rmw_inst_reg_bits(u32 mask, u32 bits, s16 inst,
+ s16 idx);
+# endif
+
#endif
diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c
index 697b58f..c016ae4 100644
--- a/arch/arm/mach-omap2/prm44xx.c
+++ b/arch/arm/mach-omap2/prm44xx.c
@@ -15,6 +15,7 @@
#include <linux/delay.h>
#include <linux/errno.h>
#include <linux/err.h>
+#include <linux/io.h>
#include <plat/common.h>
#include <plat/cpu.h>
@@ -29,6 +30,70 @@
*/
#define OMAP4_RST_CTRL_ST_OFFSET 4
+/* PRM low-level functions */
+
+/* Read a register in a CM/PRM instance in the PRM module */
+u32 omap4_prm_read_inst_reg(s16 inst, u16 reg)
+{
+ return __raw_readl(OMAP44XX_PRM_REGADDR(inst, reg));
+}
+
+/* Write into a register in a CM/PRM instance in the PRM module */
+void omap4_prm_write_inst_reg(u32 val, s16 inst, u16 reg)
+{
+ __raw_writel(val, OMAP44XX_PRM_REGADDR(inst, reg));
+}
+
+/* Read-modify-write a register in a PRM module. Caller must lock */
+u32 omap4_prm_rmw_inst_reg_bits(u32 mask, u32 bits, s16 inst, s16 reg)
+{
+ u32 v;
+
+ v = omap4_prm_read_inst_reg(inst, reg);
+ v &= ~mask;
+ v |= bits;
+ omap4_prm_write_inst_reg(v, inst, reg);
+
+ return v;
+}
+
+/* Read a PRM register, AND it, and shift the result down to bit 0 */
+/* XXX deprecated */
+u32 omap4_prm_read_bits_shift(void __iomem *reg, u32 mask)
+{
+ u32 v;
+
+ v = __raw_readl(reg);
+ v &= mask;
+ v >>= __ffs(mask);
+
+ return v;
+}
+
+/* Read-modify-write a register in a PRM module. Caller must lock */
+/* XXX deprecated */
+u32 omap4_prm_rmw_reg_bits(u32 mask, u32 bits, void __iomem *reg)
+{
+ u32 v;
+
+ v = __raw_readl(reg);
+ v &= ~mask;
+ v |= bits;
+ __raw_writel(v, reg);
+
+ return v;
+}
+
+u32 omap4_prm_set_inst_reg_bits(u32 bits, s16 inst, s16 reg)
+{
+ return omap4_prm_rmw_inst_reg_bits(bits, bits, inst, reg);
+}
+
+u32 omap4_prm_clear_inst_reg_bits(u32 bits, s16 inst, s16 reg)
+{
+ return omap4_prm_rmw_inst_reg_bits(bits, 0x0, inst, reg);
+}
+
/**
* omap4_prm_is_hardreset_asserted - read the HW reset line state of
* submodules contained in the hwmod module
diff --git a/arch/arm/mach-omap2/prm44xx.h b/arch/arm/mach-omap2/prm44xx.h
index 3d36149..3588653 100644
--- a/arch/arm/mach-omap2/prm44xx.h
+++ b/arch/arm/mach-omap2/prm44xx.h
@@ -744,6 +744,12 @@
/* Function prototypes */
# ifndef __ASSEMBLER__
+extern u32 omap4_prm_read_inst_reg(s16 inst, u16 idx);
+extern void omap4_prm_write_inst_reg(u32 val, s16 inst, u16 idx);
+extern u32 omap4_prm_rmw_inst_reg_bits(u32 mask, u32 bits, s16 inst, s16 idx);
+extern u32 omap4_prm_rmw_reg_bits(u32 mask, u32 bits, void __iomem *reg);
+extern u32 omap4_prm_set_inst_reg_bits(u32 bits, s16 inst, s16 idx);
+extern u32 omap4_prm_clear_inst_reg_bits(u32 bits, s16 inst, s16 idx);
extern u32 omap4_prm_read_bits_shift(void __iomem *reg, u32 mask);
extern int omap4_prm_is_hardreset_asserted(void __iomem *rstctrl_reg, u8 shift);
diff --git a/arch/arm/mach-omap2/prminst44xx.c b/arch/arm/mach-omap2/prminst44xx.c
new file mode 100644
index 0000000..a303242
--- /dev/null
+++ b/arch/arm/mach-omap2/prminst44xx.c
@@ -0,0 +1,66 @@
+/*
+ * OMAP4 PRM instance functions
+ *
+ * Copyright (C) 2009 Nokia Corporation
+ * Paul Walmsley
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <linux/errno.h>
+#include <linux/err.h>
+#include <linux/io.h>
+
+#include <plat/common.h>
+
+#include "prm44xx.h"
+#include "prminst44xx.h"
+#include "prm-regbits-44xx.h"
+#include "prcm44xx.h"
+#include "prcm_mpu44xx.h"
+
+static u32 _prm_bases[OMAP4_MAX_PRCM_PARTITIONS] = {
+ [OMAP4430_INVALID_PRCM_PARTITION] = 0,
+ [OMAP4430_PRM_PARTITION] = OMAP4430_PRM_BASE,
+ [OMAP4430_CM1_PARTITION] = 0,
+ [OMAP4430_CM2_PARTITION] = 0,
+ [OMAP4430_SCRM_PARTITION] = 0,
+ [OMAP4430_PRCM_MPU_PARTITION] = OMAP4430_PRCM_MPU_BASE,
+};
+
+/* Read a register in a PRM instance */
+u32 omap4_prminst_read_inst_reg(u8 part, s16 inst, u16 idx)
+{
+ BUG_ON(part >= OMAP4_MAX_PRCM_PARTITIONS ||
+ part == OMAP4430_INVALID_PRCM_PARTITION ||
+ !_prm_bases[part]);
+ return __raw_readl(OMAP2_L4_IO_ADDRESS(_prm_bases[part] + inst +
+ idx));
+}
+
+/* Write into a register in a PRM instance */
+void omap4_prminst_write_inst_reg(u32 val, u8 part, s16 inst, u16 idx)
+{
+ BUG_ON(part >= OMAP4_MAX_PRCM_PARTITIONS ||
+ part == OMAP4430_INVALID_PRCM_PARTITION ||
+ !_prm_bases[part]);
+ __raw_writel(val, OMAP2_L4_IO_ADDRESS(_prm_bases[part] + inst + idx));
+}
+
+/* Read-modify-write a register in PRM. Caller must lock */
+u32 omap4_prminst_rmw_inst_reg_bits(u32 mask, u32 bits, u8 part, s16 inst,
+ s16 idx)
+{
+ u32 v;
+
+ v = omap4_prminst_read_inst_reg(part, inst, idx);
+ v &= ~mask;
+ v |= bits;
+ omap4_prminst_write_inst_reg(v, part, inst, idx);
+
+ return v;
+}
diff --git a/arch/arm/mach-omap2/prminst44xx.h b/arch/arm/mach-omap2/prminst44xx.h
new file mode 100644
index 0000000..02dd66d
--- /dev/null
+++ b/arch/arm/mach-omap2/prminst44xx.h
@@ -0,0 +1,25 @@
+/*
+ * OMAP4 Power/Reset Management (PRM) function prototypes
+ *
+ * Copyright (C) 2010 Nokia Corporation
+ * Paul Walmsley
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#ifndef __ARCH_ASM_MACH_OMAP2_PRMINST44XX_H
+#define __ARCH_ASM_MACH_OMAP2_PRMINST44XX_H
+
+/*
+ * In an ideal world, we would not export these low-level functions,
+ * but this will probably take some time to fix properly
+ */
+extern u32 omap4_prminst_read_inst_reg(u8 part, s16 inst, u16 idx);
+extern void omap4_prminst_write_inst_reg(u32 val, u8 part, s16 inst, u16 idx);
+extern u32 omap4_prminst_rmw_inst_reg_bits(u32 mask, u32 bits, u8 part,
+ s16 inst, s16 idx);
+
+extern void omap4_prm_global_warm_sw_reset(void);
+
+#endif
diff --git a/arch/arm/plat-omap/include/plat/prcm.h b/arch/arm/plat-omap/include/plat/prcm.h
index d059a05..078906d 100644
--- a/arch/arm/plat-omap/include/plat/prcm.h
+++ b/arch/arm/plat-omap/include/plat/prcm.h
@@ -18,6 +18,10 @@
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ *
+ * XXX This file is deprecated. The PRCM is an OMAP2+-only subsystem,
+ * so this file doesn't belong in plat-omap/include/plat. Please
+ * do not add anything new to this file.
*/
#ifndef __ASM_ARM_ARCH_OMAP_PRCM_H
@@ -31,9 +35,6 @@ int omap2_cm_wait_idlest(void __iomem *reg, u32 mask, u8 idlest,
#define START_PADCONF_SAVE 0x2
#define PADCONF_SAVE_DONE 0x1
-u32 omap4_prm_read_bits_shift(void __iomem *reg, u32 mask);
-u32 omap4_prm_rmw_reg_bits(u32 mask, u32 bits, void __iomem *reg);
-
#endif
--
1.7.2.3
^ permalink raw reply related [flat|nested] 38+ messages in thread* [PATCH 01/11] OMAP4: PRCM: add OMAP4-specific accessor/mutatorfunctions
2010-12-15 6:48 ` Paul Walmsley
@ 2010-12-15 11:08 ` Rajendra Nayak
2010-12-15 11:57 ` Santosh Shilimkar
2010-12-15 12:43 ` Cousson, Benoit
2 siblings, 0 replies; 38+ messages in thread
From: Rajendra Nayak @ 2010-12-15 11:08 UTC (permalink / raw)
To: linux-arm-kernel
Hi Paul,
> -----Original Message-----
> From: Paul Walmsley [mailto:paul at pwsan.com]
> Sent: Wednesday, December 15, 2010 12:18 PM
> To: Rajendra Nayak
> Cc: linux-omap at vger.kernel.org; linux-arm-kernel at lists.infradead.org;
Santosh Shilimkar; Benoit Cousson
> Subject: RE: [PATCH 01/11] OMAP4: PRCM: add OMAP4-specific
accessor/mutatorfunctions
>
> Hi Rajendra
>
> On Wed, 8 Dec 2010, Rajendra Nayak wrote:
>
> > Would it help if we can avoid one more level of function
> > indirection (given that these are low level apis) and store
> > the Partition offsets in the tables above (instead of func
> > pointers) and do some thing like this.
> >
> > return __raw_readl(OMAP2_L4_IO_ADDRESS(cm_read_offset[part],
> > module, idx));
> >
> > with the table entries of cm_read_offset looking something like
> > > + [OMAP4430_PRM_PARTITION] = OMAP4430_PRM_BASE,
> > > + [OMAP4430_CM1_PARTITION] = OMAP4430_CM1_BASE,
> > > + [OMAP4430_CM2_PARTITION] = OMAP4430_CM2_BASE,
>
> I did a version of this patch without the extra level of indirection.
> I'm not sure if it's better or worse. The original seems conceptually
> cleaner to me, but this revised version is probably slightly more
> efficient. Do you (or anyone else) have a strong preference?
Thanks, the changes are very much in line with
what I was trying to suggest. The concern was mainly
performance/efficiency but otherwise I don't have a strong
preference one way or the other.
Regards,
Rajendra
>
> Note that the patch has not yet been boot-tested, but I think the
> principle is clear.
>
>
> - Paul
>
> From: Paul Walmsley <paul@pwsan.com>
> Date: Tue, 14 Dec 2010 22:23:49 -0700
> Subject: [PATCH] OMAP4: PRCM: add OMAP4-specific accessor/mutator
functions
>
> In some ways, the OMAP4 PRCM register layout is quite different than
> the OMAP2/3 PRCM register layout. For example, on OMAP2/3, from a
> register layout point of view, all CM instances were located in the CM
> subsystem, and all PRM instances were located in the PRM subsystem.
> OMAP4 changes this. Now, for example, some CM instances, such as
> WKUP_CM and EMU_CM, are located in the system PRM subsystem. And a
> "local PRCM" exists for the MPU - this PRCM combines registers that
> would normally appear in both CM and PRM instances, but uses its own
> register layout which matches neither the OMAP2/3 PRCM layout nor the
> OMAP4 PRCM layout.
>
> To try to deal with this, introduce some new functions, omap4_cminst*
> and omap4_prminst*. The former is to be used when writing to a CM
> instance register (no matter what subsystem or hardware module it
> exists in), and the latter, similarly, with PRM instance registers.
> To determine which "PRCM partition" to write to, the functions take a
> PRCM instance ID argument. Subsequent patches add these partition IDs
> to the OMAP4 powerdomain and clockdomain definitions.
>
> As far as I can see, there's really no good way to handle these types
> of register access inconsistencies. This patch seemed like the least
> bad approach.
>
> Moving forward, the long-term goal is to remove all direct PRCM
> register access from the PM code. PRCM register access should go
> through layers such as the powerdomain and clockdomain code that can
> hide the details of how to interact with the specific hardware
> variant.
>
> While here, rename cm4xxx.c to cm44xx.c to match the naming convention
> of the other OMAP4 PRCM files.
>
> Thanks to Santosh Shilimkar <santosh.shilimkar@ti.com> for some
comments.
>
> Signed-off-by: Paul Walmsley <paul@pwsan.com>
> Cc: Beno?t Cousson <b-cousson@ti.com>
> Cc: Rajendra Nayak <rnayak@ti.com>
> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
> ---
> arch/arm/mach-omap2/Makefile | 4 +-
> arch/arm/mach-omap2/cm1_44xx.h | 5 ++
> arch/arm/mach-omap2/cm2_44xx.h | 6 ++
> arch/arm/mach-omap2/cm44xx.c | 52 +++++++++++++++
> arch/arm/mach-omap2/cm4xxx.c | 62 ------------------
> arch/arm/mach-omap2/cminst44xx.c | 109
++++++++++++++++++++++++++++++++
> arch/arm/mach-omap2/cminst44xx.h | 25 +++++++
> arch/arm/mach-omap2/prcm.c | 26 +-------
> arch/arm/mach-omap2/prcm44xx.h | 42 ++++++++++++
> arch/arm/mach-omap2/prcm_mpu44xx.c | 45 +++++++++++++
> arch/arm/mach-omap2/prcm_mpu44xx.h | 8 +++
> arch/arm/mach-omap2/prm44xx.c | 65 +++++++++++++++++++
> arch/arm/mach-omap2/prm44xx.h | 6 ++
> arch/arm/mach-omap2/prminst44xx.c | 66 +++++++++++++++++++
> arch/arm/mach-omap2/prminst44xx.h | 25 +++++++
> arch/arm/plat-omap/include/plat/prcm.h | 7 +-
> 16 files changed, 462 insertions(+), 91 deletions(-)
> create mode 100644 arch/arm/mach-omap2/cm44xx.c
> delete mode 100644 arch/arm/mach-omap2/cm4xxx.c
> create mode 100644 arch/arm/mach-omap2/cminst44xx.c
> create mode 100644 arch/arm/mach-omap2/cminst44xx.h
> create mode 100644 arch/arm/mach-omap2/prcm44xx.h
> create mode 100644 arch/arm/mach-omap2/prcm_mpu44xx.c
> create mode 100644 arch/arm/mach-omap2/prminst44xx.c
> create mode 100644 arch/arm/mach-omap2/prminst44xx.h
>
> diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
> index aee22f9..0c0cdd9 100644
> --- a/arch/arm/mach-omap2/Makefile
> +++ b/arch/arm/mach-omap2/Makefile
> @@ -69,7 +69,9 @@ obj-$(CONFIG_ARCH_OMAP3) += prcm.o
cm2xxx_3xxx.o prm2xxx_3xxx.o
> # XXX The presence of cm2xxx_3xxx.o on the line below is temporary and
> # will be removed once the OMAP4 part of the codebase is converted to
> # use OMAP4-specific PRCM functions.
> -obj-$(CONFIG_ARCH_OMAP4) += prcm.o cm2xxx_3xxx.o cm4xxx.o
> +obj-$(CONFIG_ARCH_OMAP4) += prcm.o cm2xxx_3xxx.o
cminst44xx.o \
> + cm44xx.o prcm_mpu44xx.o \
> + prminst44xx.o
>
> # OMAP powerdomain framework
> powerdomain-common += powerdomain.o
powerdomain-common.o
> diff --git a/arch/arm/mach-omap2/cm1_44xx.h
b/arch/arm/mach-omap2/cm1_44xx.h
> index aa2ee78..63ef9e3 100644
> --- a/arch/arm/mach-omap2/cm1_44xx.h
> +++ b/arch/arm/mach-omap2/cm1_44xx.h
> @@ -248,4 +248,9 @@
> #define OMAP4_CM_DYN_DEP_PRESCAL_RESTORE_OFFSET 0x0040
> #define OMAP4430_CM_DYN_DEP_PRESCAL_RESTORE
> OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_INST, 0x0040)
>
> +/* Function prototypes */
> +extern u32 omap4_cm1_read_inst_reg(s16 inst, u16 idx);
> +extern void omap4_cm1_write_inst_reg(u32 val, s16 inst, u16 idx);
> +extern u32 omap4_cm1_rmw_inst_reg_bits(u32 mask, u32 bits, s16 inst,
s16 idx);
> +
> #endif
> diff --git a/arch/arm/mach-omap2/cm2_44xx.h
b/arch/arm/mach-omap2/cm2_44xx.h
> index 89c9522..0fd0210 100644
> --- a/arch/arm/mach-omap2/cm2_44xx.h
> +++ b/arch/arm/mach-omap2/cm2_44xx.h
> @@ -480,4 +480,10 @@
> #define OMAP4430_CM_L3INIT_USB_TLL_CLKCTRL_RESTORE
> OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x0058)
> #define OMAP4_CM_SDMA_STATICDEP_RESTORE_OFFSET 0x005c
> #define OMAP4430_CM_SDMA_STATICDEP_RESTORE
> OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x005c)
> +
> +/* Function prototypes */
> +extern u32 omap4_cm2_read_inst_reg(s16 inst, u16 idx);
> +extern void omap4_cm2_write_inst_reg(u32 val, s16 inst, u16 idx);
> +extern u32 omap4_cm2_rmw_inst_reg_bits(u32 mask, u32 bits, s16 inst,
s16 idx);
> +
> #endif
> diff --git a/arch/arm/mach-omap2/cm44xx.c b/arch/arm/mach-omap2/cm44xx.c
> new file mode 100644
> index 0000000..e96f53e
> --- /dev/null
> +++ b/arch/arm/mach-omap2/cm44xx.c
> @@ -0,0 +1,52 @@
> +/*
> + * OMAP4 CM1, CM2 module low-level functions
> + *
> + * Copyright (C) 2010 Nokia Corporation
> + * Paul Walmsley
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + *
> + * These functions are intended to be used only by the cminst44xx.c
file.
> + * XXX Perhaps we should just move them there and make them static.
> + */
> +
> +#include <linux/kernel.h>
> +#include <linux/types.h>
> +#include <linux/errno.h>
> +#include <linux/err.h>
> +#include <linux/io.h>
> +
> +#include <plat/common.h>
> +
> +#include "cm.h"
> +#include "cm1_44xx.h"
> +#include "cm2_44xx.h"
> +#include "cm-regbits-44xx.h"
> +
> +/* CM1 hardware module low-level functions */
> +
> +/* Read a register in CM1 */
> +u32 omap4_cm1_read_inst_reg(s16 inst, u16 reg)
> +{
> + return __raw_readl(OMAP44XX_CM1_REGADDR(inst, reg));
> +}
> +
> +/* Write into a register in CM1 */
> +void omap4_cm1_write_inst_reg(u32 val, s16 inst, u16 reg)
> +{
> + __raw_writel(val, OMAP44XX_CM1_REGADDR(inst, reg));
> +}
> +
> +/* Read a register in CM2 */
> +u32 omap4_cm2_read_inst_reg(s16 inst, u16 reg)
> +{
> + return __raw_readl(OMAP44XX_CM2_REGADDR(inst, reg));
> +}
> +
> +/* Write into a register in CM2 */
> +void omap4_cm2_write_inst_reg(u32 val, s16 inst, u16 reg)
> +{
> + __raw_writel(val, OMAP44XX_CM2_REGADDR(inst, reg));
> +}
> diff --git a/arch/arm/mach-omap2/cm4xxx.c b/arch/arm/mach-omap2/cm4xxx.c
> deleted file mode 100644
> index 25d2b3e..0000000
> --- a/arch/arm/mach-omap2/cm4xxx.c
> +++ /dev/null
> @@ -1,62 +0,0 @@
> -/*
> - * OMAP4 CM module functions
> - *
> - * Copyright (C) 2009 Nokia Corporation
> - * Paul Walmsley
> - *
> - * This program is free software; you can redistribute it and/or modify
> - * it under the terms of the GNU General Public License version 2 as
> - * published by the Free Software Foundation.
> - */
> -
> -#include <linux/kernel.h>
> -#include <linux/module.h>
> -#include <linux/types.h>
> -#include <linux/delay.h>
> -#include <linux/spinlock.h>
> -#include <linux/list.h>
> -#include <linux/errno.h>
> -#include <linux/err.h>
> -#include <linux/io.h>
> -
> -#include <asm/atomic.h>
> -
> -#include <plat/common.h>
> -
> -#include "cm44xx.h"
> -#include "cm-regbits-44xx.h"
> -
> -/**
> - * omap4_cm_wait_module_ready - wait for a module to be in 'func' state
> - * @clkctrl_reg: CLKCTRL module address
> - *
> - * Wait for the module IDLEST to be functional. If the idle state is in
any
> - * the non functional state (trans, idle or disabled), module and thus
the
> - * sysconfig cannot be accessed and will probably lead to an "imprecise
> - * external abort"
> - *
> - * Module idle state:
> - * 0x0 func: Module is fully functional, including OCP
> - * 0x1 trans: Module is performing transition: wakeup, or sleep,
or sleep
> - * abortion
> - * 0x2 idle: Module is in Idle mode (only OCP part). It is
functional if
> - * using separate functional clock
> - * 0x3 disabled: Module is disabled and cannot be accessed
> - *
> - */
> -int omap4_cm_wait_module_ready(void __iomem *clkctrl_reg)
> -{
> - int i = 0;
> -
> - if (!clkctrl_reg)
> - return 0;
> -
> - omap_test_timeout((
> - ((__raw_readl(clkctrl_reg) & OMAP4430_IDLEST_MASK) == 0)
||
> - (((__raw_readl(clkctrl_reg) & OMAP4430_IDLEST_MASK) >>
> - OMAP4430_IDLEST_SHIFT) == 0x2)),
> - MAX_MODULE_READY_TIME, i);
> -
> - return (i < MAX_MODULE_READY_TIME) ? 0 : -EBUSY;
> -}
> -
> diff --git a/arch/arm/mach-omap2/cminst44xx.c
b/arch/arm/mach-omap2/cminst44xx.c
> new file mode 100644
> index 0000000..c13613b
> --- /dev/null
> +++ b/arch/arm/mach-omap2/cminst44xx.c
> @@ -0,0 +1,109 @@
> +/*
> + * OMAP4 CM instance functions
> + *
> + * Copyright (C) 2009 Nokia Corporation
> + * Paul Walmsley
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + *
> + * This is needed since CM instances can be in the PRM, PRCM_MPU, CM1,
> + * or CM2 hardware modules. For example, the EMU_CM CM instance is in
> + * the PRM hardware module. What a mess...
> + */
> +
> +#include <linux/kernel.h>
> +#include <linux/types.h>
> +#include <linux/errno.h>
> +#include <linux/err.h>
> +#include <linux/io.h>
> +
> +#include <plat/common.h>
> +
> +#include "cm.h"
> +#include "cm1_44xx.h"
> +#include "cm2_44xx.h"
> +#include "cm44xx.h"
> +#include "cminst44xx.h"
> +#include "cm-regbits-44xx.h"
> +#include "prcm44xx.h"
> +#include "prm44xx.h"
> +#include "prcm_mpu44xx.h"
> +
> +static u32 _cm_bases[OMAP4_MAX_PRCM_PARTITIONS] = {
> + [OMAP4430_INVALID_PRCM_PARTITION] = 0,
> + [OMAP4430_PRM_PARTITION] = OMAP4430_PRM_BASE,
> + [OMAP4430_CM1_PARTITION] = OMAP4430_CM1_BASE,
> + [OMAP4430_CM2_PARTITION] = OMAP4430_CM2_BASE,
> + [OMAP4430_SCRM_PARTITION] = 0,
> + [OMAP4430_PRCM_MPU_PARTITION] = OMAP4430_PRCM_MPU_BASE,
> +};
> +
> +/* Read a register in a CM instance */
> +u32 omap4_cminst_read_inst_reg(u8 part, s16 inst, u16 idx)
> +{
> + BUG_ON(part >= OMAP4_MAX_PRCM_PARTITIONS ||
> + part == OMAP4430_INVALID_PRCM_PARTITION ||
> + !_cm_bases[part]);
> + return __raw_readl(OMAP2_L4_IO_ADDRESS(_cm_bases[part] + inst +
idx));
> +}
> +
> +/* Write into a register in a CM instance */
> +void omap4_cminst_write_inst_reg(u32 val, u8 part, s16 inst, u16 idx)
> +{
> + BUG_ON(part >= OMAP4_MAX_PRCM_PARTITIONS ||
> + part == OMAP4430_INVALID_PRCM_PARTITION ||
> + !_cm_bases[part]);
> + __raw_writel(val, OMAP2_L4_IO_ADDRESS(_cm_bases[part] + inst +
idx));
> +}
> +
> +/* Read-modify-write a register in CM1. Caller must lock */
> +u32 omap4_cminst_rmw_inst_reg_bits(u32 mask, u32 bits, u8 part, s16
inst,
> + s16 idx)
> +{
> + u32 v;
> +
> + v = omap4_cminst_read_inst_reg(part, inst, idx);
> + v &= ~mask;
> + v |= bits;
> + omap4_cminst_write_inst_reg(v, part, inst, idx);
> +
> + return v;
> +}
> +
> +
> +/**
> + * omap4_cm_wait_module_ready - wait for a module to be in 'func' state
> + * @clkctrl_reg: CLKCTRL module address
> + *
> + * Wait for the module IDLEST to be functional. If the idle state is in
any
> + * the non functional state (trans, idle or disabled), module and thus
the
> + * sysconfig cannot be accessed and will probably lead to an "imprecise
> + * external abort"
> + *
> + * Module idle state:
> + * 0x0 func: Module is fully functional, including OCP
> + * 0x1 trans: Module is performing transition: wakeup, or sleep,
or sleep
> + * abortion
> + * 0x2 idle: Module is in Idle mode (only OCP part). It is
functional if
> + * using separate functional clock
> + * 0x3 disabled: Module is disabled and cannot be accessed
> + *
> + */
> +int omap4_cm_wait_module_ready(void __iomem *clkctrl_reg)
> +{
> + int i = 0;
> +
> + if (!clkctrl_reg)
> + return 0;
> +
> + omap_test_timeout((
> + ((__raw_readl(clkctrl_reg) & OMAP4430_IDLEST_MASK) == 0)
||
> + (((__raw_readl(clkctrl_reg) & OMAP4430_IDLEST_MASK) >>
> + OMAP4430_IDLEST_SHIFT) == 0x2)),
> + MAX_MODULE_READY_TIME, i);
> +
> + return (i < MAX_MODULE_READY_TIME) ? 0 : -EBUSY;
> +}
> +
> diff --git a/arch/arm/mach-omap2/cminst44xx.h
b/arch/arm/mach-omap2/cminst44xx.h
> new file mode 100644
> index 0000000..6baa4c7
> --- /dev/null
> +++ b/arch/arm/mach-omap2/cminst44xx.h
> @@ -0,0 +1,25 @@
> +/*
> + * OMAP4 Clock Management (CM) function prototypes
> + *
> + * Copyright (C) 2010 Nokia Corporation
> + * Paul Walmsley
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + */
> +#ifndef __ARCH_ASM_MACH_OMAP2_CMINST44XX_H
> +#define __ARCH_ASM_MACH_OMAP2_CMINST44XX_H
> +
> +/*
> + * In an ideal world, we would not export these low-level functions,
> + * but this will probably take some time to fix properly
> + */
> +extern u32 omap4_cminst_read_inst_reg(u8 part, s16 inst, u16 idx);
> +extern void omap4_cminst_write_inst_reg(u32 val, u8 part, s16 inst, u16
idx);
> +extern u32 omap4_cminst_rmw_inst_reg_bits(u32 mask, u32 bits, u8 part,
> + s16 inst, s16 idx);
> +
> +extern int omap4_cm_wait_module_ready(void __iomem *clkctrl_reg);
> +
> +#endif
> diff --git a/arch/arm/mach-omap2/prcm.c b/arch/arm/mach-omap2/prcm.c
> index dd95cbb..fe0865b 100644
> --- a/arch/arm/mach-omap2/prcm.c
> +++ b/arch/arm/mach-omap2/prcm.c
> @@ -33,6 +33,7 @@
> #include "cm44xx.h"
> #include "prm2xxx_3xxx.h"
> #include "prm44xx.h"
> +#include "prcm44xx.h"
> #include "prm-regbits-24xx.h"
> #include "prm-regbits-44xx.h"
> #include "control.h"
> @@ -80,31 +81,6 @@ void omap_prcm_arch_reset(char mode, const char *cmd)
> prcm_offs, OMAP4_RM_RSTCTRL);
> }
>
> -/* Read a PRM register, AND it, and shift the result down to bit 0 */
> -u32 omap4_prm_read_bits_shift(void __iomem *reg, u32 mask)
> -{
> - u32 v;
> -
> - v = __raw_readl(reg);
> - v &= mask;
> - v >>= __ffs(mask);
> -
> - return v;
> -}
> -
> -/* Read-modify-write a register in a PRM module. Caller must lock */
> -u32 omap4_prm_rmw_reg_bits(u32 mask, u32 bits, void __iomem *reg)
> -{
> - u32 v;
> -
> - v = __raw_readl(reg);
> - v &= ~mask;
> - v |= bits;
> - __raw_writel(v, reg);
> -
> - return v;
> -}
> -
> /**
> * omap2_cm_wait_idlest - wait for IDLEST bit to indicate module
readiness
> * @reg: physical address of module IDLEST register
> diff --git a/arch/arm/mach-omap2/prcm44xx.h
b/arch/arm/mach-omap2/prcm44xx.h
> new file mode 100644
> index 0000000..7334ffb
> --- /dev/null
> +++ b/arch/arm/mach-omap2/prcm44xx.h
> @@ -0,0 +1,42 @@
> +/*
> + * OMAP4 PRCM definitions
> + *
> + * Copyright (C) 2010 Texas Instruments, Inc.
> + * Copyright (C) 2010 Nokia Corporation
> + *
> + * Paul Walmsley
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + *
> + * This file contains macros and functions that are common to all of
> + * the PRM/CM/PRCM blocks on the OMAP4 devices: PRM, CM1, CM2,
> + * PRCM_MPU, SCRM
> + */
> +
> +#ifndef __ARCH_ARM_MACH_OMAP2_PRCM44XX_H
> +#define __ARCH_ARM_MACH_OMAP2_PRCM44XX_H
> +
> +/*
> + * OMAP4 PRCM partition IDs
> + *
> + * The numbers and order are arbitrary, but 0 is reserved for the
> + * 'invalid' partition in case someone forgets to add a
> + * .prcm_partition field.
> + */
> +#define OMAP4430_INVALID_PRCM_PARTITION 0
> +#define OMAP4430_PRM_PARTITION 1
> +#define OMAP4430_CM1_PARTITION 2
> +#define OMAP4430_CM2_PARTITION 3
> +#define OMAP4430_SCRM_PARTITION 4
> +#define OMAP4430_PRCM_MPU_PARTITION 5
> +
> +/*
> + * OMAP4_MAX_PRCM_PARTITIONS: set to the highest value of the PRCM
partition
> + * IDs, plus one
> + */
> +#define OMAP4_MAX_PRCM_PARTITIONS 6
> +
> +
> +#endif
> diff --git a/arch/arm/mach-omap2/prcm_mpu44xx.c
b/arch/arm/mach-omap2/prcm_mpu44xx.c
> new file mode 100644
> index 0000000..171fe17
> --- /dev/null
> +++ b/arch/arm/mach-omap2/prcm_mpu44xx.c
> @@ -0,0 +1,45 @@
> +/*
> + * OMAP4 PRCM_MPU module functions
> + *
> + * Copyright (C) 2009 Nokia Corporation
> + * Paul Walmsley
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + */
> +
> +#include <linux/kernel.h>
> +#include <linux/types.h>
> +#include <linux/errno.h>
> +#include <linux/err.h>
> +#include <linux/io.h>
> +
> +#include <plat/common.h>
> +
> +#include "prcm_mpu44xx.h"
> +#include "cm-regbits-44xx.h"
> +
> +/* PRCM_MPU low-level functions */
> +
> +u32 omap4_prcm_mpu_read_inst_reg(s16 inst, u16 reg)
> +{
> + return __raw_readl(OMAP44XX_PRCM_MPU_REGADDR(inst, reg));
> +}
> +
> +void omap4_prcm_mpu_write_inst_reg(u32 val, s16 inst, u16 reg)
> +{
> + __raw_writel(val, OMAP44XX_PRCM_MPU_REGADDR(inst, reg));
> +}
> +
> +u32 omap4_prcm_mpu_rmw_inst_reg_bits(u32 mask, u32 bits, s16 inst, s16
reg)
> +{
> + u32 v;
> +
> + v = omap4_prcm_mpu_read_inst_reg(inst, reg);
> + v &= ~mask;
> + v |= bits;
> + omap4_prcm_mpu_write_inst_reg(v, inst, reg);
> +
> + return v;
> +}
> diff --git a/arch/arm/mach-omap2/prcm_mpu44xx.h
b/arch/arm/mach-omap2/prcm_mpu44xx.h
> index 80e00c1..e5190e9 100644
> --- a/arch/arm/mach-omap2/prcm_mpu44xx.h
> +++ b/arch/arm/mach-omap2/prcm_mpu44xx.h
> @@ -88,4 +88,12 @@
> #define OMAP4_CM_CPU1_CLKSTCTRL_OFFSET 0x0018
> #define OMAP4430_CM_CPU1_CLKSTCTRL
> OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU1_INST, 0x0018)
>
> +/* Function prototypes */
> +# ifndef __ASSEMBLER__
> +extern u32 omap4_prcm_mpu_read_inst_reg(s16 inst, u16 idx);
> +extern void omap4_prcm_mpu_write_inst_reg(u32 val, s16 inst, u16 idx);
> +extern u32 omap4_prcm_mpu_rmw_inst_reg_bits(u32 mask, u32 bits, s16
inst,
> + s16 idx);
> +# endif
> +
> #endif
> diff --git a/arch/arm/mach-omap2/prm44xx.c
b/arch/arm/mach-omap2/prm44xx.c
> index 697b58f..c016ae4 100644
> --- a/arch/arm/mach-omap2/prm44xx.c
> +++ b/arch/arm/mach-omap2/prm44xx.c
> @@ -15,6 +15,7 @@
> #include <linux/delay.h>
> #include <linux/errno.h>
> #include <linux/err.h>
> +#include <linux/io.h>
>
> #include <plat/common.h>
> #include <plat/cpu.h>
> @@ -29,6 +30,70 @@
> */
> #define OMAP4_RST_CTRL_ST_OFFSET 4
>
> +/* PRM low-level functions */
> +
> +/* Read a register in a CM/PRM instance in the PRM module */
> +u32 omap4_prm_read_inst_reg(s16 inst, u16 reg)
> +{
> + return __raw_readl(OMAP44XX_PRM_REGADDR(inst, reg));
> +}
> +
> +/* Write into a register in a CM/PRM instance in the PRM module */
> +void omap4_prm_write_inst_reg(u32 val, s16 inst, u16 reg)
> +{
> + __raw_writel(val, OMAP44XX_PRM_REGADDR(inst, reg));
> +}
> +
> +/* Read-modify-write a register in a PRM module. Caller must lock */
> +u32 omap4_prm_rmw_inst_reg_bits(u32 mask, u32 bits, s16 inst, s16 reg)
> +{
> + u32 v;
> +
> + v = omap4_prm_read_inst_reg(inst, reg);
> + v &= ~mask;
> + v |= bits;
> + omap4_prm_write_inst_reg(v, inst, reg);
> +
> + return v;
> +}
> +
> +/* Read a PRM register, AND it, and shift the result down to bit 0 */
> +/* XXX deprecated */
> +u32 omap4_prm_read_bits_shift(void __iomem *reg, u32 mask)
> +{
> + u32 v;
> +
> + v = __raw_readl(reg);
> + v &= mask;
> + v >>= __ffs(mask);
> +
> + return v;
> +}
> +
> +/* Read-modify-write a register in a PRM module. Caller must lock */
> +/* XXX deprecated */
> +u32 omap4_prm_rmw_reg_bits(u32 mask, u32 bits, void __iomem *reg)
> +{
> + u32 v;
> +
> + v = __raw_readl(reg);
> + v &= ~mask;
> + v |= bits;
> + __raw_writel(v, reg);
> +
> + return v;
> +}
> +
> +u32 omap4_prm_set_inst_reg_bits(u32 bits, s16 inst, s16 reg)
> +{
> + return omap4_prm_rmw_inst_reg_bits(bits, bits, inst, reg);
> +}
> +
> +u32 omap4_prm_clear_inst_reg_bits(u32 bits, s16 inst, s16 reg)
> +{
> + return omap4_prm_rmw_inst_reg_bits(bits, 0x0, inst, reg);
> +}
> +
> /**
> * omap4_prm_is_hardreset_asserted - read the HW reset line state of
> * submodules contained in the hwmod module
> diff --git a/arch/arm/mach-omap2/prm44xx.h
b/arch/arm/mach-omap2/prm44xx.h
> index 3d36149..3588653 100644
> --- a/arch/arm/mach-omap2/prm44xx.h
> +++ b/arch/arm/mach-omap2/prm44xx.h
> @@ -744,6 +744,12 @@
> /* Function prototypes */
> # ifndef __ASSEMBLER__
>
> +extern u32 omap4_prm_read_inst_reg(s16 inst, u16 idx);
> +extern void omap4_prm_write_inst_reg(u32 val, s16 inst, u16 idx);
> +extern u32 omap4_prm_rmw_inst_reg_bits(u32 mask, u32 bits, s16 inst,
s16 idx);
> +extern u32 omap4_prm_rmw_reg_bits(u32 mask, u32 bits, void __iomem
*reg);
> +extern u32 omap4_prm_set_inst_reg_bits(u32 bits, s16 inst, s16 idx);
> +extern u32 omap4_prm_clear_inst_reg_bits(u32 bits, s16 inst, s16 idx);
> extern u32 omap4_prm_read_bits_shift(void __iomem *reg, u32 mask);
>
> extern int omap4_prm_is_hardreset_asserted(void __iomem *rstctrl_reg,
u8 shift);
> diff --git a/arch/arm/mach-omap2/prminst44xx.c
b/arch/arm/mach-omap2/prminst44xx.c
> new file mode 100644
> index 0000000..a303242
> --- /dev/null
> +++ b/arch/arm/mach-omap2/prminst44xx.c
> @@ -0,0 +1,66 @@
> +/*
> + * OMAP4 PRM instance functions
> + *
> + * Copyright (C) 2009 Nokia Corporation
> + * Paul Walmsley
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + */
> +
> +#include <linux/kernel.h>
> +#include <linux/types.h>
> +#include <linux/errno.h>
> +#include <linux/err.h>
> +#include <linux/io.h>
> +
> +#include <plat/common.h>
> +
> +#include "prm44xx.h"
> +#include "prminst44xx.h"
> +#include "prm-regbits-44xx.h"
> +#include "prcm44xx.h"
> +#include "prcm_mpu44xx.h"
> +
> +static u32 _prm_bases[OMAP4_MAX_PRCM_PARTITIONS] = {
> + [OMAP4430_INVALID_PRCM_PARTITION] = 0,
> + [OMAP4430_PRM_PARTITION] = OMAP4430_PRM_BASE,
> + [OMAP4430_CM1_PARTITION] = 0,
> + [OMAP4430_CM2_PARTITION] = 0,
> + [OMAP4430_SCRM_PARTITION] = 0,
> + [OMAP4430_PRCM_MPU_PARTITION] = OMAP4430_PRCM_MPU_BASE,
> +};
> +
> +/* Read a register in a PRM instance */
> +u32 omap4_prminst_read_inst_reg(u8 part, s16 inst, u16 idx)
> +{
> + BUG_ON(part >= OMAP4_MAX_PRCM_PARTITIONS ||
> + part == OMAP4430_INVALID_PRCM_PARTITION ||
> + !_prm_bases[part]);
> + return __raw_readl(OMAP2_L4_IO_ADDRESS(_prm_bases[part] + inst +
> + idx));
> +}
> +
> +/* Write into a register in a PRM instance */
> +void omap4_prminst_write_inst_reg(u32 val, u8 part, s16 inst, u16 idx)
> +{
> + BUG_ON(part >= OMAP4_MAX_PRCM_PARTITIONS ||
> + part == OMAP4430_INVALID_PRCM_PARTITION ||
> + !_prm_bases[part]);
> + __raw_writel(val, OMAP2_L4_IO_ADDRESS(_prm_bases[part] + inst +
idx));
> +}
> +
> +/* Read-modify-write a register in PRM. Caller must lock */
> +u32 omap4_prminst_rmw_inst_reg_bits(u32 mask, u32 bits, u8 part, s16
inst,
> + s16 idx)
> +{
> + u32 v;
> +
> + v = omap4_prminst_read_inst_reg(part, inst, idx);
> + v &= ~mask;
> + v |= bits;
> + omap4_prminst_write_inst_reg(v, part, inst, idx);
> +
> + return v;
> +}
> diff --git a/arch/arm/mach-omap2/prminst44xx.h
b/arch/arm/mach-omap2/prminst44xx.h
> new file mode 100644
> index 0000000..02dd66d
> --- /dev/null
> +++ b/arch/arm/mach-omap2/prminst44xx.h
> @@ -0,0 +1,25 @@
> +/*
> + * OMAP4 Power/Reset Management (PRM) function prototypes
> + *
> + * Copyright (C) 2010 Nokia Corporation
> + * Paul Walmsley
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + */
> +#ifndef __ARCH_ASM_MACH_OMAP2_PRMINST44XX_H
> +#define __ARCH_ASM_MACH_OMAP2_PRMINST44XX_H
> +
> +/*
> + * In an ideal world, we would not export these low-level functions,
> + * but this will probably take some time to fix properly
> + */
> +extern u32 omap4_prminst_read_inst_reg(u8 part, s16 inst, u16 idx);
> +extern void omap4_prminst_write_inst_reg(u32 val, u8 part, s16 inst,
u16 idx);
> +extern u32 omap4_prminst_rmw_inst_reg_bits(u32 mask, u32 bits, u8 part,
> + s16 inst, s16 idx);
> +
> +extern void omap4_prm_global_warm_sw_reset(void);
> +
> +#endif
> diff --git a/arch/arm/plat-omap/include/plat/prcm.h
b/arch/arm/plat-omap/include/plat/prcm.h
> index d059a05..078906d 100644
> --- a/arch/arm/plat-omap/include/plat/prcm.h
> +++ b/arch/arm/plat-omap/include/plat/prcm.h
> @@ -18,6 +18,10 @@
> * You should have received a copy of the GNU General Public License
> * along with this program; if not, write to the Free Software
> * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307
USA
> + *
> + * XXX This file is deprecated. The PRCM is an OMAP2+-only subsystem,
> + * so this file doesn't belong in plat-omap/include/plat. Please
> + * do not add anything new to this file.
> */
>
> #ifndef __ASM_ARM_ARCH_OMAP_PRCM_H
> @@ -31,9 +35,6 @@ int omap2_cm_wait_idlest(void __iomem *reg, u32 mask,
u8 idlest,
> #define START_PADCONF_SAVE 0x2
> #define PADCONF_SAVE_DONE 0x1
>
> -u32 omap4_prm_read_bits_shift(void __iomem *reg, u32 mask);
> -u32 omap4_prm_rmw_reg_bits(u32 mask, u32 bits, void __iomem *reg);
> -
> #endif
>
>
> --
> 1.7.2.3
^ permalink raw reply [flat|nested] 38+ messages in thread* [PATCH 01/11] OMAP4: PRCM: add OMAP4-specific accessor/mutatorfunctions
2010-12-15 6:48 ` Paul Walmsley
2010-12-15 11:08 ` Rajendra Nayak
@ 2010-12-15 11:57 ` Santosh Shilimkar
2010-12-15 12:43 ` Cousson, Benoit
2 siblings, 0 replies; 38+ messages in thread
From: Santosh Shilimkar @ 2010-12-15 11:57 UTC (permalink / raw)
To: linux-arm-kernel
> -----Original Message-----
> From: Paul Walmsley [mailto:paul at pwsan.com]
> Sent: Wednesday, December 15, 2010 12:18 PM
> To: Rajendra Nayak
> Cc: linux-omap at vger.kernel.org; linux-arm-kernel at lists.infradead.org;
> Santosh Shilimkar; Benoit Cousson
> Subject: RE: [PATCH 01/11] OMAP4: PRCM: add OMAP4-specific
> accessor/mutatorfunctions
>
> Hi Rajendra
>
> On Wed, 8 Dec 2010, Rajendra Nayak wrote:
>
> > Would it help if we can avoid one more level of function
> > indirection (given that these are low level apis) and store
> > the Partition offsets in the tables above (instead of func
> > pointers) and do some thing like this.
> >
> > return __raw_readl(OMAP2_L4_IO_ADDRESS(cm_read_offset[part],
> > module, idx));
> >
> > with the table entries of cm_read_offset looking something like
> > > + [OMAP4430_PRM_PARTITION] = OMAP4430_PRM_BASE,
> > > + [OMAP4430_CM1_PARTITION] = OMAP4430_CM1_BASE,
> > > + [OMAP4430_CM2_PARTITION] = OMAP4430_CM2_BASE,
>
> I did a version of this patch without the extra level of indirection.
> I'm not sure if it's better or worse. The original seems conceptually
> cleaner to me, but this revised version is probably slightly more
> efficient. Do you (or anyone else) have a strong preference?
>
I think we need to cut down on number of indirections we
need to do to reach to hardware register read/writes to be more
efficient especially for low level accessory APIs. We use them in
performance/latency critical path more often and having these
accessory apis as fast as they can be, keeping all the needed
abstraction should be ideal.
Again not a very strong opinion here but I like this version than the
previous just on the fact that it's cut down one indirection
and still gives the same flexibility. :)
> Note that the patch has not yet been boot-tested, but I think the
> principle is clear.
>
>
> - Paul
>
> From: Paul Walmsley <paul@pwsan.com>
> Date: Tue, 14 Dec 2010 22:23:49 -0700
> Subject: [PATCH] OMAP4: PRCM: add OMAP4-specific accessor/mutator
> functions
>
> In some ways, the OMAP4 PRCM register layout is quite different than
> the OMAP2/3 PRCM register layout. For example, on OMAP2/3, from a
> register layout point of view, all CM instances were located in the CM
> subsystem, and all PRM instances were located in the PRM subsystem.
> OMAP4 changes this. Now, for example, some CM instances, such as
> WKUP_CM and EMU_CM, are located in the system PRM subsystem. And a
> "local PRCM" exists for the MPU - this PRCM combines registers that
> would normally appear in both CM and PRM instances, but uses its own
> register layout which matches neither the OMAP2/3 PRCM layout nor the
> OMAP4 PRCM layout.
>
> To try to deal with this, introduce some new functions, omap4_cminst*
> and omap4_prminst*. The former is to be used when writing to a CM
> instance register (no matter what subsystem or hardware module it
> exists in), and the latter, similarly, with PRM instance registers.
> To determine which "PRCM partition" to write to, the functions take a
> PRCM instance ID argument. Subsequent patches add these partition IDs
> to the OMAP4 powerdomain and clockdomain definitions.
>
> As far as I can see, there's really no good way to handle these types
> of register access inconsistencies. This patch seemed like the least
> bad approach.
>
> Moving forward, the long-term goal is to remove all direct PRCM
> register access from the PM code. PRCM register access should go
> through layers such as the powerdomain and clockdomain code that can
> hide the details of how to interact with the specific hardware
> variant.
>
> While here, rename cm4xxx.c to cm44xx.c to match the naming convention
> of the other OMAP4 PRCM files.
>
> Thanks to Santosh Shilimkar <santosh.shilimkar@ti.com> for some
comments.
>
> Signed-off-by: Paul Walmsley <paul@pwsan.com>
> Cc: Beno?t Cousson <b-cousson@ti.com>
> Cc: Rajendra Nayak <rnayak@ti.com>
> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
> ---
> arch/arm/mach-omap2/Makefile | 4 +-
> arch/arm/mach-omap2/cm1_44xx.h | 5 ++
> arch/arm/mach-omap2/cm2_44xx.h | 6 ++
> arch/arm/mach-omap2/cm44xx.c | 52 +++++++++++++++
> arch/arm/mach-omap2/cm4xxx.c | 62 ------------------
> arch/arm/mach-omap2/cminst44xx.c | 109
> ++++++++++++++++++++++++++++++++
> arch/arm/mach-omap2/cminst44xx.h | 25 +++++++
> arch/arm/mach-omap2/prcm.c | 26 +-------
> arch/arm/mach-omap2/prcm44xx.h | 42 ++++++++++++
> arch/arm/mach-omap2/prcm_mpu44xx.c | 45 +++++++++++++
> arch/arm/mach-omap2/prcm_mpu44xx.h | 8 +++
> arch/arm/mach-omap2/prm44xx.c | 65 +++++++++++++++++++
> arch/arm/mach-omap2/prm44xx.h | 6 ++
> arch/arm/mach-omap2/prminst44xx.c | 66 +++++++++++++++++++
> arch/arm/mach-omap2/prminst44xx.h | 25 +++++++
> arch/arm/plat-omap/include/plat/prcm.h | 7 +-
> 16 files changed, 462 insertions(+), 91 deletions(-)
> create mode 100644 arch/arm/mach-omap2/cm44xx.c
> delete mode 100644 arch/arm/mach-omap2/cm4xxx.c
> create mode 100644 arch/arm/mach-omap2/cminst44xx.c
> create mode 100644 arch/arm/mach-omap2/cminst44xx.h
> create mode 100644 arch/arm/mach-omap2/prcm44xx.h
> create mode 100644 arch/arm/mach-omap2/prcm_mpu44xx.c
> create mode 100644 arch/arm/mach-omap2/prminst44xx.c
> create mode 100644 arch/arm/mach-omap2/prminst44xx.h
>
> diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
> index aee22f9..0c0cdd9 100644
> --- a/arch/arm/mach-omap2/Makefile
> +++ b/arch/arm/mach-omap2/Makefile
> @@ -69,7 +69,9 @@ obj-$(CONFIG_ARCH_OMAP3) += prcm.o
> cm2xxx_3xxx.o prm2xxx_3xxx.o
> # XXX The presence of cm2xxx_3xxx.o on the line below is temporary and
> # will be removed once the OMAP4 part of the codebase is converted to
> # use OMAP4-specific PRCM functions.
> -obj-$(CONFIG_ARCH_OMAP4) += prcm.o cm2xxx_3xxx.o cm4xxx.o
> +obj-$(CONFIG_ARCH_OMAP4) += prcm.o cm2xxx_3xxx.o
cminst44xx.o \
> + cm44xx.o prcm_mpu44xx.o \
> + prminst44xx.o
>
> # OMAP powerdomain framework
> powerdomain-common += powerdomain.o
powerdomain-common.o
> diff --git a/arch/arm/mach-omap2/cm1_44xx.h b/arch/arm/mach-
> omap2/cm1_44xx.h
> index aa2ee78..63ef9e3 100644
> --- a/arch/arm/mach-omap2/cm1_44xx.h
> +++ b/arch/arm/mach-omap2/cm1_44xx.h
> @@ -248,4 +248,9 @@
> #define OMAP4_CM_DYN_DEP_PRESCAL_RESTORE_OFFSET 0x0040
> #define OMAP4430_CM_DYN_DEP_PRESCAL_RESTORE
> OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_INST, 0x0040)
>
> +/* Function prototypes */
> +extern u32 omap4_cm1_read_inst_reg(s16 inst, u16 idx);
> +extern void omap4_cm1_write_inst_reg(u32 val, s16 inst, u16 idx);
> +extern u32 omap4_cm1_rmw_inst_reg_bits(u32 mask, u32 bits, s16 inst,
s16
> idx);
> +
> #endif
> diff --git a/arch/arm/mach-omap2/cm2_44xx.h b/arch/arm/mach-
> omap2/cm2_44xx.h
> index 89c9522..0fd0210 100644
> --- a/arch/arm/mach-omap2/cm2_44xx.h
> +++ b/arch/arm/mach-omap2/cm2_44xx.h
> @@ -480,4 +480,10 @@
> #define OMAP4430_CM_L3INIT_USB_TLL_CLKCTRL_RESTORE
> OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x0058)
> #define OMAP4_CM_SDMA_STATICDEP_RESTORE_OFFSET 0x005c
> #define OMAP4430_CM_SDMA_STATICDEP_RESTORE
> OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x005c)
> +
> +/* Function prototypes */
> +extern u32 omap4_cm2_read_inst_reg(s16 inst, u16 idx);
> +extern void omap4_cm2_write_inst_reg(u32 val, s16 inst, u16 idx);
> +extern u32 omap4_cm2_rmw_inst_reg_bits(u32 mask, u32 bits, s16 inst,
s16
> idx);
> +
> #endif
> diff --git a/arch/arm/mach-omap2/cm44xx.c b/arch/arm/mach-omap2/cm44xx.c
> new file mode 100644
> index 0000000..e96f53e
> --- /dev/null
> +++ b/arch/arm/mach-omap2/cm44xx.c
> @@ -0,0 +1,52 @@
> +/*
> + * OMAP4 CM1, CM2 module low-level functions
> + *
> + * Copyright (C) 2010 Nokia Corporation
> + * Paul Walmsley
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + *
> + * These functions are intended to be used only by the cminst44xx.c
file.
> + * XXX Perhaps we should just move them there and make them static.
> + */
> +
> +#include <linux/kernel.h>
> +#include <linux/types.h>
> +#include <linux/errno.h>
> +#include <linux/err.h>
> +#include <linux/io.h>
> +
> +#include <plat/common.h>
> +
> +#include "cm.h"
> +#include "cm1_44xx.h"
> +#include "cm2_44xx.h"
> +#include "cm-regbits-44xx.h"
> +
> +/* CM1 hardware module low-level functions */
> +
> +/* Read a register in CM1 */
> +u32 omap4_cm1_read_inst_reg(s16 inst, u16 reg)
> +{
> + return __raw_readl(OMAP44XX_CM1_REGADDR(inst, reg));
> +}
> +
> +/* Write into a register in CM1 */
> +void omap4_cm1_write_inst_reg(u32 val, s16 inst, u16 reg)
> +{
> + __raw_writel(val, OMAP44XX_CM1_REGADDR(inst, reg));
> +}
> +
> +/* Read a register in CM2 */
> +u32 omap4_cm2_read_inst_reg(s16 inst, u16 reg)
> +{
> + return __raw_readl(OMAP44XX_CM2_REGADDR(inst, reg));
> +}
> +
> +/* Write into a register in CM2 */
> +void omap4_cm2_write_inst_reg(u32 val, s16 inst, u16 reg)
> +{
> + __raw_writel(val, OMAP44XX_CM2_REGADDR(inst, reg));
> +}
> diff --git a/arch/arm/mach-omap2/cm4xxx.c b/arch/arm/mach-omap2/cm4xxx.c
> deleted file mode 100644
> index 25d2b3e..0000000
> --- a/arch/arm/mach-omap2/cm4xxx.c
> +++ /dev/null
> @@ -1,62 +0,0 @@
> -/*
> - * OMAP4 CM module functions
> - *
> - * Copyright (C) 2009 Nokia Corporation
> - * Paul Walmsley
> - *
> - * This program is free software; you can redistribute it and/or modify
> - * it under the terms of the GNU General Public License version 2 as
> - * published by the Free Software Foundation.
> - */
> -
> -#include <linux/kernel.h>
> -#include <linux/module.h>
> -#include <linux/types.h>
> -#include <linux/delay.h>
> -#include <linux/spinlock.h>
> -#include <linux/list.h>
> -#include <linux/errno.h>
> -#include <linux/err.h>
> -#include <linux/io.h>
> -
> -#include <asm/atomic.h>
> -
> -#include <plat/common.h>
> -
> -#include "cm44xx.h"
> -#include "cm-regbits-44xx.h"
> -
> -/**
> - * omap4_cm_wait_module_ready - wait for a module to be in 'func' state
> - * @clkctrl_reg: CLKCTRL module address
> - *
> - * Wait for the module IDLEST to be functional. If the idle state is in
> any
> - * the non functional state (trans, idle or disabled), module and thus
> the
> - * sysconfig cannot be accessed and will probably lead to an "imprecise
> - * external abort"
> - *
> - * Module idle state:
> - * 0x0 func: Module is fully functional, including OCP
> - * 0x1 trans: Module is performing transition: wakeup, or sleep,
or
> sleep
> - * abortion
> - * 0x2 idle: Module is in Idle mode (only OCP part). It is
> functional if
> - * using separate functional clock
> - * 0x3 disabled: Module is disabled and cannot be accessed
> - *
> - */
> -int omap4_cm_wait_module_ready(void __iomem *clkctrl_reg)
> -{
> - int i = 0;
> -
> - if (!clkctrl_reg)
> - return 0;
> -
> - omap_test_timeout((
> - ((__raw_readl(clkctrl_reg) & OMAP4430_IDLEST_MASK) == 0)
||
> - (((__raw_readl(clkctrl_reg) & OMAP4430_IDLEST_MASK) >>
> - OMAP4430_IDLEST_SHIFT) == 0x2)),
> - MAX_MODULE_READY_TIME, i);
> -
> - return (i < MAX_MODULE_READY_TIME) ? 0 : -EBUSY;
> -}
> -
> diff --git a/arch/arm/mach-omap2/cminst44xx.c b/arch/arm/mach-
> omap2/cminst44xx.c
> new file mode 100644
> index 0000000..c13613b
> --- /dev/null
> +++ b/arch/arm/mach-omap2/cminst44xx.c
> @@ -0,0 +1,109 @@
> +/*
> + * OMAP4 CM instance functions
> + *
> + * Copyright (C) 2009 Nokia Corporation
> + * Paul Walmsley
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + *
> + * This is needed since CM instances can be in the PRM, PRCM_MPU, CM1,
> + * or CM2 hardware modules. For example, the EMU_CM CM instance is in
> + * the PRM hardware module. What a mess...
> + */
> +
> +#include <linux/kernel.h>
> +#include <linux/types.h>
> +#include <linux/errno.h>
> +#include <linux/err.h>
> +#include <linux/io.h>
> +
> +#include <plat/common.h>
> +
> +#include "cm.h"
> +#include "cm1_44xx.h"
> +#include "cm2_44xx.h"
> +#include "cm44xx.h"
> +#include "cminst44xx.h"
> +#include "cm-regbits-44xx.h"
> +#include "prcm44xx.h"
> +#include "prm44xx.h"
> +#include "prcm_mpu44xx.h"
> +
> +static u32 _cm_bases[OMAP4_MAX_PRCM_PARTITIONS] = {
> + [OMAP4430_INVALID_PRCM_PARTITION] = 0,
> + [OMAP4430_PRM_PARTITION] = OMAP4430_PRM_BASE,
> + [OMAP4430_CM1_PARTITION] = OMAP4430_CM1_BASE,
> + [OMAP4430_CM2_PARTITION] = OMAP4430_CM2_BASE,
> + [OMAP4430_SCRM_PARTITION] = 0,
> + [OMAP4430_PRCM_MPU_PARTITION] = OMAP4430_PRCM_MPU_BASE,
> +};
> +
> +/* Read a register in a CM instance */
> +u32 omap4_cminst_read_inst_reg(u8 part, s16 inst, u16 idx)
> +{
> + BUG_ON(part >= OMAP4_MAX_PRCM_PARTITIONS ||
> + part == OMAP4430_INVALID_PRCM_PARTITION ||
> + !_cm_bases[part]);
> + return __raw_readl(OMAP2_L4_IO_ADDRESS(_cm_bases[part] + inst +
> idx));
> +}
> +
> +/* Write into a register in a CM instance */
> +void omap4_cminst_write_inst_reg(u32 val, u8 part, s16 inst, u16 idx)
> +{
> + BUG_ON(part >= OMAP4_MAX_PRCM_PARTITIONS ||
> + part == OMAP4430_INVALID_PRCM_PARTITION ||
> + !_cm_bases[part]);
> + __raw_writel(val, OMAP2_L4_IO_ADDRESS(_cm_bases[part] + inst +
> idx));
> +}
> +
> +/* Read-modify-write a register in CM1. Caller must lock */
> +u32 omap4_cminst_rmw_inst_reg_bits(u32 mask, u32 bits, u8 part, s16
inst,
> + s16 idx)
> +{
> + u32 v;
> +
> + v = omap4_cminst_read_inst_reg(part, inst, idx);
> + v &= ~mask;
> + v |= bits;
> + omap4_cminst_write_inst_reg(v, part, inst, idx);
> +
> + return v;
> +}
> +
> +
> +/**
> + * omap4_cm_wait_module_ready - wait for a module to be in 'func' state
> + * @clkctrl_reg: CLKCTRL module address
> + *
> + * Wait for the module IDLEST to be functional. If the idle state is in
> any
> + * the non functional state (trans, idle or disabled), module and thus
> the
> + * sysconfig cannot be accessed and will probably lead to an "imprecise
> + * external abort"
> + *
> + * Module idle state:
> + * 0x0 func: Module is fully functional, including OCP
> + * 0x1 trans: Module is performing transition: wakeup, or sleep,
or
> sleep
> + * abortion
> + * 0x2 idle: Module is in Idle mode (only OCP part). It is
> functional if
> + * using separate functional clock
> + * 0x3 disabled: Module is disabled and cannot be accessed
> + *
> + */
> +int omap4_cm_wait_module_ready(void __iomem *clkctrl_reg)
> +{
> + int i = 0;
> +
> + if (!clkctrl_reg)
> + return 0;
> +
> + omap_test_timeout((
> + ((__raw_readl(clkctrl_reg) & OMAP4430_IDLEST_MASK) == 0)
||
> + (((__raw_readl(clkctrl_reg) & OMAP4430_IDLEST_MASK) >>
> + OMAP4430_IDLEST_SHIFT) == 0x2)),
> + MAX_MODULE_READY_TIME, i);
> +
> + return (i < MAX_MODULE_READY_TIME) ? 0 : -EBUSY;
> +}
> +
> diff --git a/arch/arm/mach-omap2/cminst44xx.h b/arch/arm/mach-
> omap2/cminst44xx.h
> new file mode 100644
> index 0000000..6baa4c7
> --- /dev/null
> +++ b/arch/arm/mach-omap2/cminst44xx.h
> @@ -0,0 +1,25 @@
> +/*
> + * OMAP4 Clock Management (CM) function prototypes
> + *
> + * Copyright (C) 2010 Nokia Corporation
> + * Paul Walmsley
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + */
> +#ifndef __ARCH_ASM_MACH_OMAP2_CMINST44XX_H
> +#define __ARCH_ASM_MACH_OMAP2_CMINST44XX_H
> +
> +/*
> + * In an ideal world, we would not export these low-level functions,
> + * but this will probably take some time to fix properly
> + */
> +extern u32 omap4_cminst_read_inst_reg(u8 part, s16 inst, u16 idx);
> +extern void omap4_cminst_write_inst_reg(u32 val, u8 part, s16 inst, u16
> idx);
> +extern u32 omap4_cminst_rmw_inst_reg_bits(u32 mask, u32 bits, u8 part,
> + s16 inst, s16 idx);
> +
> +extern int omap4_cm_wait_module_ready(void __iomem *clkctrl_reg);
> +
> +#endif
> diff --git a/arch/arm/mach-omap2/prcm.c b/arch/arm/mach-omap2/prcm.c
> index dd95cbb..fe0865b 100644
> --- a/arch/arm/mach-omap2/prcm.c
> +++ b/arch/arm/mach-omap2/prcm.c
> @@ -33,6 +33,7 @@
> #include "cm44xx.h"
> #include "prm2xxx_3xxx.h"
> #include "prm44xx.h"
> +#include "prcm44xx.h"
> #include "prm-regbits-24xx.h"
> #include "prm-regbits-44xx.h"
> #include "control.h"
> @@ -80,31 +81,6 @@ void omap_prcm_arch_reset(char mode, const char *cmd)
> prcm_offs, OMAP4_RM_RSTCTRL);
> }
>
> -/* Read a PRM register, AND it, and shift the result down to bit 0 */
> -u32 omap4_prm_read_bits_shift(void __iomem *reg, u32 mask)
> -{
> - u32 v;
> -
> - v = __raw_readl(reg);
> - v &= mask;
> - v >>= __ffs(mask);
> -
> - return v;
> -}
> -
> -/* Read-modify-write a register in a PRM module. Caller must lock */
> -u32 omap4_prm_rmw_reg_bits(u32 mask, u32 bits, void __iomem *reg)
> -{
> - u32 v;
> -
> - v = __raw_readl(reg);
> - v &= ~mask;
> - v |= bits;
> - __raw_writel(v, reg);
> -
> - return v;
> -}
> -
> /**
> * omap2_cm_wait_idlest - wait for IDLEST bit to indicate module
> readiness
> * @reg: physical address of module IDLEST register
> diff --git a/arch/arm/mach-omap2/prcm44xx.h b/arch/arm/mach-
> omap2/prcm44xx.h
> new file mode 100644
> index 0000000..7334ffb
> --- /dev/null
> +++ b/arch/arm/mach-omap2/prcm44xx.h
> @@ -0,0 +1,42 @@
> +/*
> + * OMAP4 PRCM definitions
> + *
> + * Copyright (C) 2010 Texas Instruments, Inc.
> + * Copyright (C) 2010 Nokia Corporation
> + *
> + * Paul Walmsley
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + *
> + * This file contains macros and functions that are common to all of
> + * the PRM/CM/PRCM blocks on the OMAP4 devices: PRM, CM1, CM2,
> + * PRCM_MPU, SCRM
> + */
> +
> +#ifndef __ARCH_ARM_MACH_OMAP2_PRCM44XX_H
> +#define __ARCH_ARM_MACH_OMAP2_PRCM44XX_H
> +
> +/*
> + * OMAP4 PRCM partition IDs
> + *
> + * The numbers and order are arbitrary, but 0 is reserved for the
> + * 'invalid' partition in case someone forgets to add a
> + * .prcm_partition field.
> + */
> +#define OMAP4430_INVALID_PRCM_PARTITION 0
> +#define OMAP4430_PRM_PARTITION 1
> +#define OMAP4430_CM1_PARTITION 2
> +#define OMAP4430_CM2_PARTITION 3
> +#define OMAP4430_SCRM_PARTITION 4
> +#define OMAP4430_PRCM_MPU_PARTITION 5
> +
> +/*
> + * OMAP4_MAX_PRCM_PARTITIONS: set to the highest value of the PRCM
> partition
> + * IDs, plus one
> + */
> +#define OMAP4_MAX_PRCM_PARTITIONS 6
> +
> +
> +#endif
> diff --git a/arch/arm/mach-omap2/prcm_mpu44xx.c b/arch/arm/mach-
> omap2/prcm_mpu44xx.c
> new file mode 100644
> index 0000000..171fe17
> --- /dev/null
> +++ b/arch/arm/mach-omap2/prcm_mpu44xx.c
> @@ -0,0 +1,45 @@
> +/*
> + * OMAP4 PRCM_MPU module functions
> + *
> + * Copyright (C) 2009 Nokia Corporation
> + * Paul Walmsley
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + */
> +
> +#include <linux/kernel.h>
> +#include <linux/types.h>
> +#include <linux/errno.h>
> +#include <linux/err.h>
> +#include <linux/io.h>
> +
> +#include <plat/common.h>
> +
> +#include "prcm_mpu44xx.h"
> +#include "cm-regbits-44xx.h"
> +
> +/* PRCM_MPU low-level functions */
> +
> +u32 omap4_prcm_mpu_read_inst_reg(s16 inst, u16 reg)
> +{
> + return __raw_readl(OMAP44XX_PRCM_MPU_REGADDR(inst, reg));
> +}
> +
> +void omap4_prcm_mpu_write_inst_reg(u32 val, s16 inst, u16 reg)
> +{
> + __raw_writel(val, OMAP44XX_PRCM_MPU_REGADDR(inst, reg));
> +}
> +
> +u32 omap4_prcm_mpu_rmw_inst_reg_bits(u32 mask, u32 bits, s16 inst, s16
> reg)
> +{
> + u32 v;
> +
> + v = omap4_prcm_mpu_read_inst_reg(inst, reg);
> + v &= ~mask;
> + v |= bits;
> + omap4_prcm_mpu_write_inst_reg(v, inst, reg);
> +
> + return v;
> +}
> diff --git a/arch/arm/mach-omap2/prcm_mpu44xx.h b/arch/arm/mach-
> omap2/prcm_mpu44xx.h
> index 80e00c1..e5190e9 100644
> --- a/arch/arm/mach-omap2/prcm_mpu44xx.h
> +++ b/arch/arm/mach-omap2/prcm_mpu44xx.h
> @@ -88,4 +88,12 @@
> #define OMAP4_CM_CPU1_CLKSTCTRL_OFFSET 0x0018
> #define OMAP4430_CM_CPU1_CLKSTCTRL
> OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU1_INST, 0x0018)
>
> +/* Function prototypes */
> +# ifndef __ASSEMBLER__
> +extern u32 omap4_prcm_mpu_read_inst_reg(s16 inst, u16 idx);
> +extern void omap4_prcm_mpu_write_inst_reg(u32 val, s16 inst, u16 idx);
> +extern u32 omap4_prcm_mpu_rmw_inst_reg_bits(u32 mask, u32 bits, s16
inst,
> + s16 idx);
> +# endif
> +
> #endif
> diff --git a/arch/arm/mach-omap2/prm44xx.c
b/arch/arm/mach-omap2/prm44xx.c
> index 697b58f..c016ae4 100644
> --- a/arch/arm/mach-omap2/prm44xx.c
> +++ b/arch/arm/mach-omap2/prm44xx.c
> @@ -15,6 +15,7 @@
> #include <linux/delay.h>
> #include <linux/errno.h>
> #include <linux/err.h>
> +#include <linux/io.h>
>
> #include <plat/common.h>
> #include <plat/cpu.h>
> @@ -29,6 +30,70 @@
> */
> #define OMAP4_RST_CTRL_ST_OFFSET 4
>
> +/* PRM low-level functions */
> +
> +/* Read a register in a CM/PRM instance in the PRM module */
> +u32 omap4_prm_read_inst_reg(s16 inst, u16 reg)
> +{
> + return __raw_readl(OMAP44XX_PRM_REGADDR(inst, reg));
> +}
> +
> +/* Write into a register in a CM/PRM instance in the PRM module */
> +void omap4_prm_write_inst_reg(u32 val, s16 inst, u16 reg)
> +{
> + __raw_writel(val, OMAP44XX_PRM_REGADDR(inst, reg));
> +}
> +
> +/* Read-modify-write a register in a PRM module. Caller must lock */
> +u32 omap4_prm_rmw_inst_reg_bits(u32 mask, u32 bits, s16 inst, s16 reg)
> +{
> + u32 v;
> +
> + v = omap4_prm_read_inst_reg(inst, reg);
> + v &= ~mask;
> + v |= bits;
> + omap4_prm_write_inst_reg(v, inst, reg);
> +
> + return v;
> +}
> +
> +/* Read a PRM register, AND it, and shift the result down to bit 0 */
> +/* XXX deprecated */
> +u32 omap4_prm_read_bits_shift(void __iomem *reg, u32 mask)
> +{
> + u32 v;
> +
> + v = __raw_readl(reg);
> + v &= mask;
> + v >>= __ffs(mask);
> +
> + return v;
> +}
> +
> +/* Read-modify-write a register in a PRM module. Caller must lock */
> +/* XXX deprecated */
> +u32 omap4_prm_rmw_reg_bits(u32 mask, u32 bits, void __iomem *reg)
> +{
> + u32 v;
> +
> + v = __raw_readl(reg);
> + v &= ~mask;
> + v |= bits;
> + __raw_writel(v, reg);
> +
> + return v;
> +}
> +
> +u32 omap4_prm_set_inst_reg_bits(u32 bits, s16 inst, s16 reg)
> +{
> + return omap4_prm_rmw_inst_reg_bits(bits, bits, inst, reg);
> +}
> +
> +u32 omap4_prm_clear_inst_reg_bits(u32 bits, s16 inst, s16 reg)
> +{
> + return omap4_prm_rmw_inst_reg_bits(bits, 0x0, inst, reg);
> +}
> +
> /**
> * omap4_prm_is_hardreset_asserted - read the HW reset line state of
> * submodules contained in the hwmod module
> diff --git a/arch/arm/mach-omap2/prm44xx.h
b/arch/arm/mach-omap2/prm44xx.h
> index 3d36149..3588653 100644
> --- a/arch/arm/mach-omap2/prm44xx.h
> +++ b/arch/arm/mach-omap2/prm44xx.h
> @@ -744,6 +744,12 @@
> /* Function prototypes */
> # ifndef __ASSEMBLER__
>
> +extern u32 omap4_prm_read_inst_reg(s16 inst, u16 idx);
> +extern void omap4_prm_write_inst_reg(u32 val, s16 inst, u16 idx);
> +extern u32 omap4_prm_rmw_inst_reg_bits(u32 mask, u32 bits, s16 inst,
s16
> idx);
> +extern u32 omap4_prm_rmw_reg_bits(u32 mask, u32 bits, void __iomem
*reg);
> +extern u32 omap4_prm_set_inst_reg_bits(u32 bits, s16 inst, s16 idx);
> +extern u32 omap4_prm_clear_inst_reg_bits(u32 bits, s16 inst, s16 idx);
> extern u32 omap4_prm_read_bits_shift(void __iomem *reg, u32 mask);
>
> extern int omap4_prm_is_hardreset_asserted(void __iomem *rstctrl_reg,
u8
> shift);
> diff --git a/arch/arm/mach-omap2/prminst44xx.c b/arch/arm/mach-
> omap2/prminst44xx.c
> new file mode 100644
> index 0000000..a303242
> --- /dev/null
> +++ b/arch/arm/mach-omap2/prminst44xx.c
> @@ -0,0 +1,66 @@
> +/*
> + * OMAP4 PRM instance functions
> + *
> + * Copyright (C) 2009 Nokia Corporation
> + * Paul Walmsley
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + */
> +
> +#include <linux/kernel.h>
> +#include <linux/types.h>
> +#include <linux/errno.h>
> +#include <linux/err.h>
> +#include <linux/io.h>
> +
> +#include <plat/common.h>
> +
> +#include "prm44xx.h"
> +#include "prminst44xx.h"
> +#include "prm-regbits-44xx.h"
> +#include "prcm44xx.h"
> +#include "prcm_mpu44xx.h"
> +
> +static u32 _prm_bases[OMAP4_MAX_PRCM_PARTITIONS] = {
> + [OMAP4430_INVALID_PRCM_PARTITION] = 0,
> + [OMAP4430_PRM_PARTITION] = OMAP4430_PRM_BASE,
> + [OMAP4430_CM1_PARTITION] = 0,
> + [OMAP4430_CM2_PARTITION] = 0,
> + [OMAP4430_SCRM_PARTITION] = 0,
> + [OMAP4430_PRCM_MPU_PARTITION] = OMAP4430_PRCM_MPU_BASE,
> +};
> +
> +/* Read a register in a PRM instance */
> +u32 omap4_prminst_read_inst_reg(u8 part, s16 inst, u16 idx)
> +{
> + BUG_ON(part >= OMAP4_MAX_PRCM_PARTITIONS ||
> + part == OMAP4430_INVALID_PRCM_PARTITION ||
> + !_prm_bases[part]);
> + return __raw_readl(OMAP2_L4_IO_ADDRESS(_prm_bases[part] + inst +
> + idx));
> +}
> +
> +/* Write into a register in a PRM instance */
> +void omap4_prminst_write_inst_reg(u32 val, u8 part, s16 inst, u16 idx)
> +{
> + BUG_ON(part >= OMAP4_MAX_PRCM_PARTITIONS ||
> + part == OMAP4430_INVALID_PRCM_PARTITION ||
> + !_prm_bases[part]);
> + __raw_writel(val, OMAP2_L4_IO_ADDRESS(_prm_bases[part] + inst +
> idx));
> +}
> +
> +/* Read-modify-write a register in PRM. Caller must lock */
> +u32 omap4_prminst_rmw_inst_reg_bits(u32 mask, u32 bits, u8 part, s16
inst,
> + s16 idx)
> +{
> + u32 v;
> +
> + v = omap4_prminst_read_inst_reg(part, inst, idx);
> + v &= ~mask;
> + v |= bits;
> + omap4_prminst_write_inst_reg(v, part, inst, idx);
> +
> + return v;
> +}
> diff --git a/arch/arm/mach-omap2/prminst44xx.h b/arch/arm/mach-
> omap2/prminst44xx.h
> new file mode 100644
> index 0000000..02dd66d
> --- /dev/null
> +++ b/arch/arm/mach-omap2/prminst44xx.h
> @@ -0,0 +1,25 @@
> +/*
> + * OMAP4 Power/Reset Management (PRM) function prototypes
> + *
> + * Copyright (C) 2010 Nokia Corporation
> + * Paul Walmsley
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + */
> +#ifndef __ARCH_ASM_MACH_OMAP2_PRMINST44XX_H
> +#define __ARCH_ASM_MACH_OMAP2_PRMINST44XX_H
> +
> +/*
> + * In an ideal world, we would not export these low-level functions,
> + * but this will probably take some time to fix properly
> + */
> +extern u32 omap4_prminst_read_inst_reg(u8 part, s16 inst, u16 idx);
> +extern void omap4_prminst_write_inst_reg(u32 val, u8 part, s16 inst,
u16
> idx);
> +extern u32 omap4_prminst_rmw_inst_reg_bits(u32 mask, u32 bits, u8 part,
> + s16 inst, s16 idx);
> +
> +extern void omap4_prm_global_warm_sw_reset(void);
> +
> +#endif
> diff --git a/arch/arm/plat-omap/include/plat/prcm.h b/arch/arm/plat-
> omap/include/plat/prcm.h
> index d059a05..078906d 100644
> --- a/arch/arm/plat-omap/include/plat/prcm.h
> +++ b/arch/arm/plat-omap/include/plat/prcm.h
> @@ -18,6 +18,10 @@
> * You should have received a copy of the GNU General Public License
> * along with this program; if not, write to the Free Software
> * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307
> USA
> + *
> + * XXX This file is deprecated. The PRCM is an OMAP2+-only subsystem,
> + * so this file doesn't belong in plat-omap/include/plat. Please
> + * do not add anything new to this file.
> */
>
> #ifndef __ASM_ARM_ARCH_OMAP_PRCM_H
> @@ -31,9 +35,6 @@ int omap2_cm_wait_idlest(void __iomem *reg, u32 mask,
u8
> idlest,
> #define START_PADCONF_SAVE 0x2
> #define PADCONF_SAVE_DONE 0x1
>
> -u32 omap4_prm_read_bits_shift(void __iomem *reg, u32 mask);
> -u32 omap4_prm_rmw_reg_bits(u32 mask, u32 bits, void __iomem *reg);
> -
> #endif
>
>
> --
> 1.7.2.3
^ permalink raw reply [flat|nested] 38+ messages in thread* [PATCH 01/11] OMAP4: PRCM: add OMAP4-specific accessor/mutatorfunctions
2010-12-15 6:48 ` Paul Walmsley
2010-12-15 11:08 ` Rajendra Nayak
2010-12-15 11:57 ` Santosh Shilimkar
@ 2010-12-15 12:43 ` Cousson, Benoit
2010-12-18 10:47 ` Paul Walmsley
2 siblings, 1 reply; 38+ messages in thread
From: Cousson, Benoit @ 2010-12-15 12:43 UTC (permalink / raw)
To: linux-arm-kernel
On 12/15/2010 7:48 AM, Paul Walmsley wrote:
> Hi Rajendra
>
> On Wed, 8 Dec 2010, Rajendra Nayak wrote:
>
>> Would it help if we can avoid one more level of function
>> indirection (given that these are low level apis) and store
>> the Partition offsets in the tables above (instead of func
>> pointers) and do some thing like this.
>>
>> return __raw_readl(OMAP2_L4_IO_ADDRESS(cm_read_offset[part],
>> module, idx));
>>
>> with the table entries of cm_read_offset looking something like
>>> + [OMAP4430_PRM_PARTITION] = OMAP4430_PRM_BASE,
>>> + [OMAP4430_CM1_PARTITION] = OMAP4430_CM1_BASE,
>>> + [OMAP4430_CM2_PARTITION] = OMAP4430_CM2_BASE,
>
> I did a version of this patch without the extra level of indirection.
> I'm not sure if it's better or worse. The original seems conceptually
> cleaner to me, but this revised version is probably slightly more
> efficient. Do you (or anyone else) have a strong preference?
I do not have a strong but a slight preference for that. It is a little
bit more readable that function pointers for my point of view.
On the other hand, the function pointers might allow to handle tricky
differences that this solution will not.
Regards,
Benoit
^ permalink raw reply [flat|nested] 38+ messages in thread
* [PATCH 01/11] OMAP4: PRCM: add OMAP4-specific accessor/mutatorfunctions
2010-12-08 6:18 ` [PATCH 01/11] OMAP4: PRCM: add OMAP4-specific accessor/mutator functions Paul Walmsley
2010-12-08 9:48 ` [PATCH 01/11] OMAP4: PRCM: add OMAP4-specific accessor/mutatorfunctions Santosh Shilimkar
2010-12-08 12:33 ` Rajendra Nayak
@ 2010-12-08 13:50 ` Rajendra Nayak
2010-12-08 19:46 ` Paul Walmsley
2 siblings, 1 reply; 38+ messages in thread
From: Rajendra Nayak @ 2010-12-08 13:50 UTC (permalink / raw)
To: linux-arm-kernel
<snip>...
> +++ b/arch/arm/mach-omap2/cminst44xx.c
> @@ -0,0 +1,118 @@
> +/*
> + * OMAP4 CM instance functions
> + *
> + * Copyright (C) 2009 Nokia Corporation
> + * Paul Walmsley
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + *
> + * This is needed since CM instances can be in the PRM, PRCM_MPU, CM1,
> + * or CM2 hardware modules. For example, the EMU_CM CM instance is in
> + * the PRM hardware module. What a mess...
> + */
> +
> +#include <linux/kernel.h>
> +#include <linux/types.h>
> +#include <linux/errno.h>
> +#include <linux/err.h>
> +#include <linux/io.h>
> +
> +#include <plat/common.h>
> +
> +#include "cm.h"
> +#include "cm1_44xx.h"
> +#include "cm2_44xx.h"
> +#include "cm44xx.h"
> +#include "cminst44xx.h"
This header seems to be missed in the series.
> +#include "cm-regbits-44xx.h"
> +#include "prcm44xx.h"
> +#include "prm44xx.h"
> +#include "prcm_mpu44xx.h"
> +
> +static u32 (*_cm_read_fns[OMAP4_MAX_PRCM_PARTITIONS])(s16, u16) = {
> + [OMAP4430_INVALID_PRCM_PARTITION] = NULL,
> + [OMAP4430_PRM_PARTITION] =
&omap4_prm_read_inst_reg,
> + [OMAP4430_CM1_PARTITION] =
&omap4_cm1_read_inst_reg,
> + [OMAP4430_CM2_PARTITION] =
&omap4_cm2_read_inst_reg,
> + [OMAP4430_SCRM_PARTITION] = NULL,
> + [OMAP4430_PRCM_MPU_PARTITION] =
&omap4_prcm_mpu_read_inst_reg
> +};
> +
> +static void (*_cm_write_fns[OMAP4_MAX_PRCM_PARTITIONS])(u32, s16, u16)
= {
> + [OMAP4430_INVALID_PRCM_PARTITION] = NULL,
> + [OMAP4430_PRM_PARTITION] =
&omap4_prm_write_inst_reg,
> + [OMAP4430_CM1_PARTITION] =
&omap4_cm1_write_inst_reg,
> + [OMAP4430_CM2_PARTITION] =
&omap4_cm2_write_inst_reg,
> + [OMAP4430_SCRM_PARTITION] = NULL,
> + [OMAP4430_PRCM_MPU_PARTITION] =
&omap4_prcm_mpu_write_inst_reg
> +};
> +
> +/* Read a register in a CM instance */
> +u32 omap4_cminst_read_inst_reg(u8 part, s16 module, u16 idx)
> +{
> + BUG_ON(part >= OMAP4_MAX_PRCM_PARTITIONS ||
> + part == OMAP4430_INVALID_PRCM_PARTITION ||
> + !_cm_read_fns[part]);
> + return _cm_read_fns[part](module, idx);
> +}
> +
> +/* Write into a register in a CM instance */
> +void omap4_cminst_write_inst_reg(u32 val, u8 part, s16 module, u16 idx)
> +{
> + BUG_ON(part >= OMAP4_MAX_PRCM_PARTITIONS ||
> + part == OMAP4430_INVALID_PRCM_PARTITION ||
> + !_cm_write_fns[part]);
> + _cm_write_fns[part](val, module, idx);
> +}
> +
> +/* Read-modify-write a register in CM1. Caller must lock */
> +u32 omap4_cminst_rmw_inst_reg_bits(u32 mask, u32 bits, u8 part,
> + s16 module, s16 idx)
> +{
> + u32 v;
> +
> + v = omap4_cminst_read_inst_reg(part, module, idx);
> + v &= ~mask;
> + v |= bits;
> + omap4_cminst_write_inst_reg(v, part, module, idx);
> +
> + return v;
> +}
> +
> +
> +/**
> + * omap4_cm_wait_module_ready - wait for a module to be in 'func' state
> + * @clkctrl_reg: CLKCTRL module address
> + *
> + * Wait for the module IDLEST to be functional. If the idle state is in
any
> + * the non functional state (trans, idle or disabled), module and thus
the
> + * sysconfig cannot be accessed and will probably lead to an "imprecise
> + * external abort"
> + *
> + * Module idle state:
> + * 0x0 func: Module is fully functional, including OCP
> + * 0x1 trans: Module is performing transition: wakeup, or sleep,
or sleep
> + * abortion
> + * 0x2 idle: Module is in Idle mode (only OCP part). It is
functional if
> + * using separate functional clock
> + * 0x3 disabled: Module is disabled and cannot be accessed
> + *
> + */
> +int omap4_cm_wait_module_ready(void __iomem *clkctrl_reg)
> +{
> + int i = 0;
> +
> + if (!clkctrl_reg)
> + return 0;
> +
> + omap_test_timeout((
> + ((__raw_readl(clkctrl_reg) & OMAP4430_IDLEST_MASK) == 0)
||
> + (((__raw_readl(clkctrl_reg) & OMAP4430_IDLEST_MASK) >>
> + OMAP4430_IDLEST_SHIFT) == 0x2)),
> + MAX_MODULE_READY_TIME, i);
> +
> + return (i < MAX_MODULE_READY_TIME) ? 0 : -EBUSY;
> +}
> +
> diff --git a/arch/arm/mach-omap2/prcm.c b/arch/arm/mach-omap2/prcm.c
> index dd95cbb..fe0865b 100644
> --- a/arch/arm/mach-omap2/prcm.c
> +++ b/arch/arm/mach-omap2/prcm.c
> @@ -33,6 +33,7 @@
> #include "cm44xx.h"
> #include "prm2xxx_3xxx.h"
> #include "prm44xx.h"
> +#include "prcm44xx.h"
> #include "prm-regbits-24xx.h"
> #include "prm-regbits-44xx.h"
> #include "control.h"
> @@ -80,31 +81,6 @@ void omap_prcm_arch_reset(char mode, const char *cmd)
> prcm_offs, OMAP4_RM_RSTCTRL);
> }
>
> -/* Read a PRM register, AND it, and shift the result down to bit 0 */
> -u32 omap4_prm_read_bits_shift(void __iomem *reg, u32 mask)
> -{
> - u32 v;
> -
> - v = __raw_readl(reg);
> - v &= mask;
> - v >>= __ffs(mask);
> -
> - return v;
> -}
> -
> -/* Read-modify-write a register in a PRM module. Caller must lock */
> -u32 omap4_prm_rmw_reg_bits(u32 mask, u32 bits, void __iomem *reg)
> -{
> - u32 v;
> -
> - v = __raw_readl(reg);
> - v &= ~mask;
> - v |= bits;
> - __raw_writel(v, reg);
> -
> - return v;
> -}
> -
> /**
> * omap2_cm_wait_idlest - wait for IDLEST bit to indicate module
readiness
> * @reg: physical address of module IDLEST register
> diff --git a/arch/arm/mach-omap2/prcm44xx.h
b/arch/arm/mach-omap2/prcm44xx.h
> new file mode 100644
> index 0000000..7334ffb
> --- /dev/null
> +++ b/arch/arm/mach-omap2/prcm44xx.h
> @@ -0,0 +1,42 @@
> +/*
> + * OMAP4 PRCM definitions
> + *
> + * Copyright (C) 2010 Texas Instruments, Inc.
> + * Copyright (C) 2010 Nokia Corporation
> + *
> + * Paul Walmsley
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + *
> + * This file contains macros and functions that are common to all of
> + * the PRM/CM/PRCM blocks on the OMAP4 devices: PRM, CM1, CM2,
> + * PRCM_MPU, SCRM
> + */
> +
> +#ifndef __ARCH_ARM_MACH_OMAP2_PRCM44XX_H
> +#define __ARCH_ARM_MACH_OMAP2_PRCM44XX_H
> +
> +/*
> + * OMAP4 PRCM partition IDs
> + *
> + * The numbers and order are arbitrary, but 0 is reserved for the
> + * 'invalid' partition in case someone forgets to add a
> + * .prcm_partition field.
> + */
> +#define OMAP4430_INVALID_PRCM_PARTITION 0
> +#define OMAP4430_PRM_PARTITION 1
> +#define OMAP4430_CM1_PARTITION 2
> +#define OMAP4430_CM2_PARTITION 3
> +#define OMAP4430_SCRM_PARTITION 4
> +#define OMAP4430_PRCM_MPU_PARTITION 5
> +
> +/*
> + * OMAP4_MAX_PRCM_PARTITIONS: set to the highest value of the PRCM
partition
> + * IDs, plus one
> + */
> +#define OMAP4_MAX_PRCM_PARTITIONS 6
> +
> +
> +#endif
> diff --git a/arch/arm/mach-omap2/prcm_mpu44xx.c
b/arch/arm/mach-omap2/prcm_mpu44xx.c
> new file mode 100644
> index 0000000..171fe17
> --- /dev/null
> +++ b/arch/arm/mach-omap2/prcm_mpu44xx.c
> @@ -0,0 +1,45 @@
> +/*
> + * OMAP4 PRCM_MPU module functions
> + *
> + * Copyright (C) 2009 Nokia Corporation
> + * Paul Walmsley
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + */
> +
> +#include <linux/kernel.h>
> +#include <linux/types.h>
> +#include <linux/errno.h>
> +#include <linux/err.h>
> +#include <linux/io.h>
> +
> +#include <plat/common.h>
> +
> +#include "prcm_mpu44xx.h"
> +#include "cm-regbits-44xx.h"
> +
> +/* PRCM_MPU low-level functions */
> +
> +u32 omap4_prcm_mpu_read_inst_reg(s16 inst, u16 reg)
> +{
> + return __raw_readl(OMAP44XX_PRCM_MPU_REGADDR(inst, reg));
> +}
> +
> +void omap4_prcm_mpu_write_inst_reg(u32 val, s16 inst, u16 reg)
> +{
> + __raw_writel(val, OMAP44XX_PRCM_MPU_REGADDR(inst, reg));
> +}
> +
> +u32 omap4_prcm_mpu_rmw_inst_reg_bits(u32 mask, u32 bits, s16 inst, s16
reg)
> +{
> + u32 v;
> +
> + v = omap4_prcm_mpu_read_inst_reg(inst, reg);
> + v &= ~mask;
> + v |= bits;
> + omap4_prcm_mpu_write_inst_reg(v, inst, reg);
> +
> + return v;
> +}
> diff --git a/arch/arm/mach-omap2/prcm_mpu44xx.h
b/arch/arm/mach-omap2/prcm_mpu44xx.h
> index 80e00c1..e5190e9 100644
> --- a/arch/arm/mach-omap2/prcm_mpu44xx.h
> +++ b/arch/arm/mach-omap2/prcm_mpu44xx.h
> @@ -88,4 +88,12 @@
> #define OMAP4_CM_CPU1_CLKSTCTRL_OFFSET 0x0018
> #define OMAP4430_CM_CPU1_CLKSTCTRL
> OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU1_INST, 0x0018)
>
> +/* Function prototypes */
> +# ifndef __ASSEMBLER__
> +extern u32 omap4_prcm_mpu_read_inst_reg(s16 inst, u16 idx);
> +extern void omap4_prcm_mpu_write_inst_reg(u32 val, s16 inst, u16 idx);
> +extern u32 omap4_prcm_mpu_rmw_inst_reg_bits(u32 mask, u32 bits, s16
inst,
> + s16 idx);
> +# endif
> +
> #endif
> diff --git a/arch/arm/mach-omap2/prm44xx.c
b/arch/arm/mach-omap2/prm44xx.c
> index 697b58f..c016ae4 100644
> --- a/arch/arm/mach-omap2/prm44xx.c
> +++ b/arch/arm/mach-omap2/prm44xx.c
> @@ -15,6 +15,7 @@
> #include <linux/delay.h>
> #include <linux/errno.h>
> #include <linux/err.h>
> +#include <linux/io.h>
>
> #include <plat/common.h>
> #include <plat/cpu.h>
> @@ -29,6 +30,70 @@
> */
> #define OMAP4_RST_CTRL_ST_OFFSET 4
>
> +/* PRM low-level functions */
> +
> +/* Read a register in a CM/PRM instance in the PRM module */
> +u32 omap4_prm_read_inst_reg(s16 inst, u16 reg)
> +{
> + return __raw_readl(OMAP44XX_PRM_REGADDR(inst, reg));
> +}
> +
> +/* Write into a register in a CM/PRM instance in the PRM module */
> +void omap4_prm_write_inst_reg(u32 val, s16 inst, u16 reg)
> +{
> + __raw_writel(val, OMAP44XX_PRM_REGADDR(inst, reg));
> +}
> +
> +/* Read-modify-write a register in a PRM module. Caller must lock */
> +u32 omap4_prm_rmw_inst_reg_bits(u32 mask, u32 bits, s16 inst, s16 reg)
> +{
> + u32 v;
> +
> + v = omap4_prm_read_inst_reg(inst, reg);
> + v &= ~mask;
> + v |= bits;
> + omap4_prm_write_inst_reg(v, inst, reg);
> +
> + return v;
> +}
> +
> +/* Read a PRM register, AND it, and shift the result down to bit 0 */
> +/* XXX deprecated */
> +u32 omap4_prm_read_bits_shift(void __iomem *reg, u32 mask)
> +{
> + u32 v;
> +
> + v = __raw_readl(reg);
> + v &= mask;
> + v >>= __ffs(mask);
> +
> + return v;
> +}
> +
> +/* Read-modify-write a register in a PRM module. Caller must lock */
> +/* XXX deprecated */
> +u32 omap4_prm_rmw_reg_bits(u32 mask, u32 bits, void __iomem *reg)
> +{
> + u32 v;
> +
> + v = __raw_readl(reg);
> + v &= ~mask;
> + v |= bits;
> + __raw_writel(v, reg);
> +
> + return v;
> +}
> +
> +u32 omap4_prm_set_inst_reg_bits(u32 bits, s16 inst, s16 reg)
> +{
> + return omap4_prm_rmw_inst_reg_bits(bits, bits, inst, reg);
> +}
> +
> +u32 omap4_prm_clear_inst_reg_bits(u32 bits, s16 inst, s16 reg)
> +{
> + return omap4_prm_rmw_inst_reg_bits(bits, 0x0, inst, reg);
> +}
> +
> /**
> * omap4_prm_is_hardreset_asserted - read the HW reset line state of
> * submodules contained in the hwmod module
> diff --git a/arch/arm/mach-omap2/prm44xx.h
b/arch/arm/mach-omap2/prm44xx.h
> index 3d36149..3588653 100644
> --- a/arch/arm/mach-omap2/prm44xx.h
> +++ b/arch/arm/mach-omap2/prm44xx.h
> @@ -744,6 +744,12 @@
> /* Function prototypes */
> # ifndef __ASSEMBLER__
>
> +extern u32 omap4_prm_read_inst_reg(s16 inst, u16 idx);
> +extern void omap4_prm_write_inst_reg(u32 val, s16 inst, u16 idx);
> +extern u32 omap4_prm_rmw_inst_reg_bits(u32 mask, u32 bits, s16 inst,
s16 idx);
> +extern u32 omap4_prm_rmw_reg_bits(u32 mask, u32 bits, void __iomem
*reg);
> +extern u32 omap4_prm_set_inst_reg_bits(u32 bits, s16 inst, s16 idx);
> +extern u32 omap4_prm_clear_inst_reg_bits(u32 bits, s16 inst, s16 idx);
> extern u32 omap4_prm_read_bits_shift(void __iomem *reg, u32 mask);
>
> extern int omap4_prm_is_hardreset_asserted(void __iomem *rstctrl_reg,
u8 shift);
> diff --git a/arch/arm/mach-omap2/prminst44xx.c
b/arch/arm/mach-omap2/prminst44xx.c
> new file mode 100644
> index 0000000..01c57b6
> --- /dev/null
> +++ b/arch/arm/mach-omap2/prminst44xx.c
> @@ -0,0 +1,74 @@
> +/*
> + * OMAP4 PRM instance functions
> + *
> + * Copyright (C) 2009 Nokia Corporation
> + * Paul Walmsley
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + */
> +
> +#include <linux/kernel.h>
> +#include <linux/types.h>
> +#include <linux/errno.h>
> +#include <linux/err.h>
> +#include <linux/io.h>
> +
> +#include <plat/common.h>
> +
> +#include "prm44xx.h"
> +#include "prminst44xx.h"
> +#include "prm-regbits-44xx.h"
> +#include "prcm44xx.h"
> +#include "prcm_mpu44xx.h"
> +
> +static u32 (*_prm_read_fns[OMAP4_MAX_PRCM_PARTITIONS])(s16, u16) = {
> + [OMAP4430_INVALID_PRCM_PARTITION] = NULL,
> + [OMAP4430_PRM_PARTITION] =
&omap4_prm_read_inst_reg,
> + [OMAP4430_CM1_PARTITION] = NULL,
> + [OMAP4430_CM2_PARTITION] = NULL,
> + [OMAP4430_SCRM_PARTITION] = NULL,
> + [OMAP4430_PRCM_MPU_PARTITION] =
&omap4_prcm_mpu_read_inst_reg
> +};
> +
> +static void (*_prm_write_fns[OMAP4_MAX_PRCM_PARTITIONS])(u32, s16, u16)
= {
> + [OMAP4430_INVALID_PRCM_PARTITION] = NULL,
> + [OMAP4430_PRM_PARTITION] =
&omap4_prm_write_inst_reg,
> + [OMAP4430_CM1_PARTITION] = NULL,
> + [OMAP4430_CM2_PARTITION] = NULL,
> + [OMAP4430_SCRM_PARTITION] = NULL,
> + [OMAP4430_PRCM_MPU_PARTITION] =
&omap4_prcm_mpu_write_inst_reg
> +};
> +
> +/* Read a register in a PRM instance */
> +u32 omap4_prminst_read_inst_reg(u8 part, s16 inst, u16 idx)
> +{
> + BUG_ON(part >= OMAP4_MAX_PRCM_PARTITIONS ||
> + part == OMAP4430_INVALID_PRCM_PARTITION ||
> + !_prm_read_fns[part]);
> + return _prm_read_fns[part](inst, idx);
> +}
> +
> +/* Write into a register in a PRM instance */
> +void omap4_prminst_write_inst_reg(u32 val, u8 part, s16 inst, u16 idx)
> +{
> + BUG_ON(part >= OMAP4_MAX_PRCM_PARTITIONS ||
> + part == OMAP4430_INVALID_PRCM_PARTITION ||
> + !_prm_write_fns[part]);
> + _prm_write_fns[part](val, inst, idx);
> +}
> +
> +/* Read-modify-write a register in PRM. Caller must lock */
> +u32 omap4_prminst_rmw_inst_reg_bits(u32 mask, u32 bits, u8 part, s16
inst,
> + s16 idx)
> +{
> + u32 v;
> +
> + v = omap4_prminst_read_inst_reg(part, inst, idx);
> + v &= ~mask;
> + v |= bits;
> + omap4_prminst_write_inst_reg(v, part, inst, idx);
> +
> + return v;
> +}
> diff --git a/arch/arm/mach-omap2/prminst44xx.h
b/arch/arm/mach-omap2/prminst44xx.h
> new file mode 100644
> index 0000000..02dd66d
> --- /dev/null
> +++ b/arch/arm/mach-omap2/prminst44xx.h
> @@ -0,0 +1,25 @@
> +/*
> + * OMAP4 Power/Reset Management (PRM) function prototypes
> + *
> + * Copyright (C) 2010 Nokia Corporation
> + * Paul Walmsley
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + */
> +#ifndef __ARCH_ASM_MACH_OMAP2_PRMINST44XX_H
> +#define __ARCH_ASM_MACH_OMAP2_PRMINST44XX_H
> +
> +/*
> + * In an ideal world, we would not export these low-level functions,
> + * but this will probably take some time to fix properly
> + */
> +extern u32 omap4_prminst_read_inst_reg(u8 part, s16 inst, u16 idx);
> +extern void omap4_prminst_write_inst_reg(u32 val, u8 part, s16 inst,
u16 idx);
> +extern u32 omap4_prminst_rmw_inst_reg_bits(u32 mask, u32 bits, u8 part,
> + s16 inst, s16 idx);
> +
> +extern void omap4_prm_global_warm_sw_reset(void);
> +
> +#endif
> diff --git a/arch/arm/plat-omap/include/plat/prcm.h
b/arch/arm/plat-omap/include/plat/prcm.h
> index d059a05..078906d 100644
> --- a/arch/arm/plat-omap/include/plat/prcm.h
> +++ b/arch/arm/plat-omap/include/plat/prcm.h
> @@ -18,6 +18,10 @@
> * You should have received a copy of the GNU General Public License
> * along with this program; if not, write to the Free Software
> * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307
USA
> + *
> + * XXX This file is deprecated. The PRCM is an OMAP2+-only subsystem,
> + * so this file doesn't belong in plat-omap/include/plat. Please
> + * do not add anything new to this file.
> */
>
> #ifndef __ASM_ARM_ARCH_OMAP_PRCM_H
> @@ -31,9 +35,6 @@ int omap2_cm_wait_idlest(void __iomem *reg, u32 mask,
u8 idlest,
> #define START_PADCONF_SAVE 0x2
> #define PADCONF_SAVE_DONE 0x1
>
> -u32 omap4_prm_read_bits_shift(void __iomem *reg, u32 mask);
> -u32 omap4_prm_rmw_reg_bits(u32 mask, u32 bits, void __iomem *reg);
> -
> #endif
>
>
>
^ permalink raw reply [flat|nested] 38+ messages in thread* [PATCH 01/11] OMAP4: PRCM: add OMAP4-specific accessor/mutatorfunctions
2010-12-08 13:50 ` Rajendra Nayak
@ 2010-12-08 19:46 ` Paul Walmsley
2010-12-08 20:16 ` Paul Walmsley
0 siblings, 1 reply; 38+ messages in thread
From: Paul Walmsley @ 2010-12-08 19:46 UTC (permalink / raw)
To: linux-arm-kernel
On Wed, 8 Dec 2010, Rajendra Nayak wrote:
> > +#include "cminst44xx.h"
>
> This header seems to be missed in the series.
Oops, sorry about that. Fixed in the git branch on git.pwsan.com.
Attached below is the final mach-omap2/cminst44xx.h file. It's created by
the first patch in this series ("OMAP4: PRCM: add OMAP4-specific
accessor/mutator functions") and modified by the seventh patch in the
series ("OMAP4: clockdomains: add OMAP4 PRCM data and OMAP4 support")
I will repost those.
- Paul
^ permalink raw reply [flat|nested] 38+ messages in thread* [PATCH 01/11] OMAP4: PRCM: add OMAP4-specific accessor/mutatorfunctions
2010-12-08 19:46 ` Paul Walmsley
@ 2010-12-08 20:16 ` Paul Walmsley
0 siblings, 0 replies; 38+ messages in thread
From: Paul Walmsley @ 2010-12-08 20:16 UTC (permalink / raw)
To: linux-arm-kernel
On Wed, 8 Dec 2010, Paul Walmsley wrote:
> On Wed, 8 Dec 2010, Rajendra Nayak wrote:
>
> > > +#include "cminst44xx.h"
> >
> > This header seems to be missed in the series.
>
> Oops, sorry about that. Fixed in the git branch on git.pwsan.com.
>
> Attached below is the final mach-omap2/cminst44xx.h file.
Well, anyway, here it is.
- Paul
/*
* OMAP4 Power/Reset Management (CM) function prototypes
*
* Copyright (C) 2010 Nokia Corporation
* Paul Walmsley
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifndef __ARCH_ASM_MACH_OMAP2_CMINST44XX_H
#define __ARCH_ASM_MACH_OMAP2_CMINST44XX_H
extern bool omap4_cminst_is_clkdm_in_hwsup(u8 part, s16 inst, u16 cdoffs);
extern void omap4_cminst_clkdm_enable_hwsup(u8 part, s16 inst, u16 cdoffs);
extern void omap4_cminst_clkdm_disable_hwsup(u8 part, s16 inst, u16 cdoffs);
extern void omap4_cminst_clkdm_force_sleep(u8 part, s16 inst, u16 cdoffs);
extern void omap4_cminst_clkdm_force_wakeup(u8 part, s16 inst, u16 cdoffs);
/*
* In an ideal world, we would not export these low-level functions,
* but this will probably take some time to fix properly
*/
extern u32 omap4_cminst_read_inst_reg(u8 part, s16 inst, u16 idx);
extern void omap4_cminst_write_inst_reg(u32 val, u8 part, s16 inst, u16 idx);
extern u32 omap4_cminst_rmw_inst_reg_bits(u32 mask, u32 bits, u8 part,
s16 inst, s16 idx);
extern int omap4_cm_wait_module_ready(void __iomem *clkctrl_reg);
#endif
^ permalink raw reply [flat|nested] 38+ messages in thread
* [PATCH 02/11] OMAP4: PRCM: move global reset function for OMAP4 to an OMAP4-specific file
2010-12-08 6:18 [PATCH 00/11] OMAP: PRCM/powerdomain/clockdomain patches for 2.6.38, part two Paul Walmsley
2010-12-08 6:18 ` [PATCH 01/11] OMAP4: PRCM: add OMAP4-specific accessor/mutator functions Paul Walmsley
@ 2010-12-08 6:18 ` Paul Walmsley
2010-12-08 6:18 ` [PATCH 03/11] OMAP2/3: PRM/CM: prefix OMAP2 PRM/CM functions with "omap2_" Paul Walmsley
` (11 subsequent siblings)
13 siblings, 0 replies; 38+ messages in thread
From: Paul Walmsley @ 2010-12-08 6:18 UTC (permalink / raw)
To: linux-arm-kernel
Move the OMAP4 global software reset function to the OMAP4-specific
prm44xx.c file, where it belongs. Part of the long-term process of
moving all of the direct PRCM register writes into lower-layer code.
Also add OCP barriers on OMAP2/3/4 to reduce the chance that the MPU
will continue executing while the system is supposed to be resetting
itself.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
---
arch/arm/mach-omap2/prcm.c | 17 ++++++++---------
arch/arm/mach-omap2/prm44xx.c | 14 ++++++++++++++
arch/arm/mach-omap2/prm44xx.h | 2 ++
3 files changed, 24 insertions(+), 9 deletions(-)
diff --git a/arch/arm/mach-omap2/prcm.c b/arch/arm/mach-omap2/prcm.c
index fe0865b..68c541f 100644
--- a/arch/arm/mach-omap2/prcm.c
+++ b/arch/arm/mach-omap2/prcm.c
@@ -68,17 +68,16 @@ void omap_prcm_arch_reset(char mode, const char *cmd)
} else if (cpu_is_omap34xx()) {
prcm_offs = OMAP3430_GR_MOD;
omap3_ctrl_write_boot_mode((cmd ? (u8)*cmd : 0));
- } else if (cpu_is_omap44xx())
- prcm_offs = OMAP4430_PRM_DEVICE_INST;
- else
+ } else if (cpu_is_omap44xx()) {
+ omap4_prm_global_warm_sw_reset(); /* never returns */
+ } else {
WARN_ON(1);
+ }
- if (cpu_is_omap24xx() || cpu_is_omap34xx())
- prm_set_mod_reg_bits(OMAP_RST_DPLL3_MASK, prcm_offs,
- OMAP2_RM_RSTCTRL);
- if (cpu_is_omap44xx())
- prm_set_mod_reg_bits(OMAP4430_RST_GLOBAL_WARM_SW_MASK,
- prcm_offs, OMAP4_RM_RSTCTRL);
+ /* XXX should be moved to some OMAP2/3 specific code */
+ prm_set_mod_reg_bits(OMAP_RST_DPLL3_MASK, prcm_offs,
+ OMAP2_RM_RSTCTRL);
+ prm_read_mod_reg(prcm_offs, OMAP2_RM_RSTCTRL); /* OCP barrier */
}
/**
diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c
index c016ae4..a2a04bf 100644
--- a/arch/arm/mach-omap2/prm44xx.c
+++ b/arch/arm/mach-omap2/prm44xx.c
@@ -179,3 +179,17 @@ int omap4_prm_deassert_hardreset(void __iomem *rstctrl_reg, u8 shift)
return (c == MAX_MODULE_HARDRESET_WAIT) ? -EBUSY : 0;
}
+void omap4_prm_global_warm_sw_reset(void)
+{
+ u32 v;
+
+ v = omap4_prm_read_inst_reg(OMAP4430_PRM_DEVICE_INST,
+ OMAP4_RM_RSTCTRL);
+ v |= OMAP4430_RST_GLOBAL_WARM_SW_MASK;
+ omap4_prm_write_inst_reg(v, OMAP4430_PRM_DEVICE_INST,
+ OMAP4_RM_RSTCTRL);
+
+ /* OCP barrier */
+ v = omap4_prm_read_inst_reg(OMAP4430_PRM_DEVICE_INST,
+ OMAP4_RM_RSTCTRL);
+}
diff --git a/arch/arm/mach-omap2/prm44xx.h b/arch/arm/mach-omap2/prm44xx.h
index 3588653..95542ae 100644
--- a/arch/arm/mach-omap2/prm44xx.h
+++ b/arch/arm/mach-omap2/prm44xx.h
@@ -756,6 +756,8 @@ extern int omap4_prm_is_hardreset_asserted(void __iomem *rstctrl_reg, u8 shift);
extern int omap4_prm_assert_hardreset(void __iomem *rstctrl_reg, u8 shift);
extern int omap4_prm_deassert_hardreset(void __iomem *rstctrl_reg, u8 shift);
+extern void omap4_prm_global_warm_sw_reset(void);
+
# endif
#endif
^ permalink raw reply related [flat|nested] 38+ messages in thread* [PATCH 03/11] OMAP2/3: PRM/CM: prefix OMAP2 PRM/CM functions with "omap2_"
2010-12-08 6:18 [PATCH 00/11] OMAP: PRCM/powerdomain/clockdomain patches for 2.6.38, part two Paul Walmsley
2010-12-08 6:18 ` [PATCH 01/11] OMAP4: PRCM: add OMAP4-specific accessor/mutator functions Paul Walmsley
2010-12-08 6:18 ` [PATCH 02/11] OMAP4: PRCM: move global reset function for OMAP4 to an OMAP4-specific file Paul Walmsley
@ 2010-12-08 6:18 ` Paul Walmsley
2010-12-08 6:18 ` [PATCH 04/11] OMAP4: powerdomains: add PRCM partition data; use OMAP4 PRM functions Paul Walmsley
` (10 subsequent siblings)
13 siblings, 0 replies; 38+ messages in thread
From: Paul Walmsley @ 2010-12-08 6:18 UTC (permalink / raw)
To: linux-arm-kernel
Now that OMAP4-specific PRCM functions have been added, distinguish the
existing OMAP2/3-specific PRCM functions by prefixing them with "omap2_".
This patch should not result in any functional change.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
Cc: Jarkko Nikula <jhnikula@gmail.com>
Cc: Peter Ujfalusi <peter.ujfalusi@nokia.com>
Cc: Liam Girdwood <lrg@slimlogic.co.uk>
Cc: Mark Brown <broonie@opensource.wolfsonmicro.com>
---
arch/arm/mach-omap2/clkt2xxx_apll.c | 10 -
arch/arm/mach-omap2/clkt2xxx_dpllcore.c | 8 -
arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c | 12 -
arch/arm/mach-omap2/clockdomain.c | 22 +-
arch/arm/mach-omap2/cm2xxx_3xxx.c | 352 +++++++++++++-------------
arch/arm/mach-omap2/cm2xxx_3xxx.h | 10 -
arch/arm/mach-omap2/control.c | 40 ++-
arch/arm/mach-omap2/pm-debug.c | 8 -
arch/arm/mach-omap2/pm24xx.c | 194 +++++++-------
arch/arm/mach-omap2/pm34xx.c | 143 +++++------
arch/arm/mach-omap2/powerdomain2xxx_3xxx.c | 66 +++--
arch/arm/mach-omap2/powerdomain44xx.c | 33 +-
arch/arm/mach-omap2/prcm.c | 16 +
arch/arm/mach-omap2/prm2xxx_3xxx.c | 34 +--
arch/arm/mach-omap2/prm2xxx_3xxx.h | 12 -
arch/arm/mach-omap2/sdrc2xxx.c | 4
arch/arm/mach-omap2/serial.c | 1
arch/arm/plat-omap/mcbsp.c | 8 -
18 files changed, 501 insertions(+), 472 deletions(-)
diff --git a/arch/arm/mach-omap2/clkt2xxx_apll.c b/arch/arm/mach-omap2/clkt2xxx_apll.c
index 954d11f..f51cffd 100644
--- a/arch/arm/mach-omap2/clkt2xxx_apll.c
+++ b/arch/arm/mach-omap2/clkt2xxx_apll.c
@@ -49,14 +49,14 @@ static int omap2_clk_apll_enable(struct clk *clk, u32 status_mask)
apll_mask = EN_APLL_LOCKED << clk->enable_bit;
- cval = cm_read_mod_reg(PLL_MOD, CM_CLKEN);
+ cval = omap2_cm_read_mod_reg(PLL_MOD, CM_CLKEN);
if ((cval & apll_mask) == apll_mask)
return 0; /* apll already enabled */
cval &= ~apll_mask;
cval |= apll_mask;
- cm_write_mod_reg(cval, PLL_MOD, CM_CLKEN);
+ omap2_cm_write_mod_reg(cval, PLL_MOD, CM_CLKEN);
omap2_cm_wait_idlest(cm_idlest_pll, status_mask,
OMAP24XX_CM_IDLEST_VAL, clk->name);
@@ -83,9 +83,9 @@ static void omap2_clk_apll_disable(struct clk *clk)
{
u32 cval;
- cval = cm_read_mod_reg(PLL_MOD, CM_CLKEN);
+ cval = omap2_cm_read_mod_reg(PLL_MOD, CM_CLKEN);
cval &= ~(EN_APLL_LOCKED << clk->enable_bit);
- cm_write_mod_reg(cval, PLL_MOD, CM_CLKEN);
+ omap2_cm_write_mod_reg(cval, PLL_MOD, CM_CLKEN);
}
/* Public data */
@@ -106,7 +106,7 @@ u32 omap2xxx_get_apll_clkin(void)
{
u32 aplls, srate = 0;
- aplls = cm_read_mod_reg(PLL_MOD, CM_CLKSEL1);
+ aplls = omap2_cm_read_mod_reg(PLL_MOD, CM_CLKSEL1);
aplls &= OMAP24XX_APLLS_CLKIN_MASK;
aplls >>= OMAP24XX_APLLS_CLKIN_SHIFT;
diff --git a/arch/arm/mach-omap2/clkt2xxx_dpllcore.c b/arch/arm/mach-omap2/clkt2xxx_dpllcore.c
index 530a76b..4ae4392 100644
--- a/arch/arm/mach-omap2/clkt2xxx_dpllcore.c
+++ b/arch/arm/mach-omap2/clkt2xxx_dpllcore.c
@@ -54,7 +54,7 @@ unsigned long omap2xxx_clk_get_core_rate(struct clk *clk)
core_clk = omap2_get_dpll_rate(clk);
- v = cm_read_mod_reg(PLL_MOD, CM_CLKSEL2);
+ v = omap2_cm_read_mod_reg(PLL_MOD, CM_CLKSEL2);
v &= OMAP24XX_CORE_CLK_SRC_MASK;
if (v == CORE_CLK_SRC_32K)
@@ -73,7 +73,7 @@ static long omap2_dpllcore_round_rate(unsigned long target_rate)
{
u32 high, low, core_clk_src;
- core_clk_src = cm_read_mod_reg(PLL_MOD, CM_CLKSEL2);
+ core_clk_src = omap2_cm_read_mod_reg(PLL_MOD, CM_CLKSEL2);
core_clk_src &= OMAP24XX_CORE_CLK_SRC_MASK;
if (core_clk_src == CORE_CLK_SRC_DPLL) { /* DPLL clockout */
@@ -111,7 +111,7 @@ int omap2_reprogram_dpllcore(struct clk *clk, unsigned long rate)
const struct dpll_data *dd;
cur_rate = omap2xxx_clk_get_core_rate(dclk);
- mult = cm_read_mod_reg(PLL_MOD, CM_CLKSEL2);
+ mult = omap2_cm_read_mod_reg(PLL_MOD, CM_CLKSEL2);
mult &= OMAP24XX_CORE_CLK_SRC_MASK;
if ((rate == (cur_rate / 2)) && (mult == 2)) {
@@ -136,7 +136,7 @@ int omap2_reprogram_dpllcore(struct clk *clk, unsigned long rate)
tmpset.cm_clksel1_pll &= ~(dd->mult_mask |
dd->div1_mask);
div = ((curr_prcm_set->xtal_speed / 1000000) - 1);
- tmpset.cm_clksel2_pll = cm_read_mod_reg(PLL_MOD, CM_CLKSEL2);
+ tmpset.cm_clksel2_pll = omap2_cm_read_mod_reg(PLL_MOD, CM_CLKSEL2);
tmpset.cm_clksel2_pll &= ~OMAP24XX_CORE_CLK_SRC_MASK;
if (rate > low) {
tmpset.cm_clksel2_pll |= CORE_CLK_SRC_DPLL_X2;
diff --git a/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c b/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c
index f49f47d..39f9d5a 100644
--- a/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c
+++ b/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c
@@ -133,21 +133,21 @@ int omap2_select_table_rate(struct clk *clk, unsigned long rate)
done_rate = CORE_CLK_SRC_DPLL;
/* MPU divider */
- cm_write_mod_reg(prcm->cm_clksel_mpu, MPU_MOD, CM_CLKSEL);
+ omap2_cm_write_mod_reg(prcm->cm_clksel_mpu, MPU_MOD, CM_CLKSEL);
/* dsp + iva1 div(2420), iva2.1(2430) */
- cm_write_mod_reg(prcm->cm_clksel_dsp,
+ omap2_cm_write_mod_reg(prcm->cm_clksel_dsp,
OMAP24XX_DSP_MOD, CM_CLKSEL);
- cm_write_mod_reg(prcm->cm_clksel_gfx, GFX_MOD, CM_CLKSEL);
+ omap2_cm_write_mod_reg(prcm->cm_clksel_gfx, GFX_MOD, CM_CLKSEL);
/* Major subsystem dividers */
- tmp = cm_read_mod_reg(CORE_MOD, CM_CLKSEL1) & OMAP24XX_CLKSEL_DSS2_MASK;
- cm_write_mod_reg(prcm->cm_clksel1_core | tmp, CORE_MOD,
+ tmp = omap2_cm_read_mod_reg(CORE_MOD, CM_CLKSEL1) & OMAP24XX_CLKSEL_DSS2_MASK;
+ omap2_cm_write_mod_reg(prcm->cm_clksel1_core | tmp, CORE_MOD,
CM_CLKSEL1);
if (cpu_is_omap2430())
- cm_write_mod_reg(prcm->cm_clksel_mdm,
+ omap2_cm_write_mod_reg(prcm->cm_clksel_mdm,
OMAP2430_MDM_MOD, CM_CLKSEL);
/* x2 to enter omap2xxx_sdrc_init_params() */
diff --git a/arch/arm/mach-omap2/clockdomain.c b/arch/arm/mach-omap2/clockdomain.c
index a2142e0..da74f71 100644
--- a/arch/arm/mach-omap2/clockdomain.c
+++ b/arch/arm/mach-omap2/clockdomain.c
@@ -13,7 +13,6 @@
*/
#undef DEBUG
-#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/device.h>
#include <linux/list.h>
@@ -30,7 +29,6 @@
#include "prm2xxx_3xxx.h"
#include "prm-regbits-24xx.h"
#include "cm2xxx_3xxx.h"
-#include "cm2xxx_3xxx.h"
#include <plat/clock.h>
#include <plat/powerdomain.h>
@@ -410,7 +408,7 @@ int clkdm_add_wkdep(struct clockdomain *clkdm1, struct clockdomain *clkdm2)
pr_debug("clockdomain: hardware will wake up %s when %s wakes "
"up\n", clkdm1->name, clkdm2->name);
- prm_set_mod_reg_bits((1 << clkdm2->dep_bit),
+ omap2_prm_set_mod_reg_bits((1 << clkdm2->dep_bit),
clkdm1->pwrdm.ptr->prcm_offs, PM_WKDEP);
}
@@ -445,7 +443,7 @@ int clkdm_del_wkdep(struct clockdomain *clkdm1, struct clockdomain *clkdm2)
pr_debug("clockdomain: hardware will no longer wake up %s "
"after %s wakes up\n", clkdm1->name, clkdm2->name);
- prm_clear_mod_reg_bits((1 << clkdm2->dep_bit),
+ omap2_prm_clear_mod_reg_bits((1 << clkdm2->dep_bit),
clkdm1->pwrdm.ptr->prcm_offs, PM_WKDEP);
}
@@ -481,7 +479,7 @@ int clkdm_read_wkdep(struct clockdomain *clkdm1, struct clockdomain *clkdm2)
}
/* XXX It's faster to return the atomic wkdep_usecount */
- return prm_read_mod_bits_shift(clkdm1->pwrdm.ptr->prcm_offs, PM_WKDEP,
+ return omap2_prm_read_mod_bits_shift(clkdm1->pwrdm.ptr->prcm_offs, PM_WKDEP,
(1 << clkdm2->dep_bit));
}
@@ -515,7 +513,7 @@ int clkdm_clear_all_wkdeps(struct clockdomain *clkdm)
atomic_set(&cd->wkdep_usecount, 0);
}
- prm_clear_mod_reg_bits(mask, clkdm->pwrdm.ptr->prcm_offs, PM_WKDEP);
+ omap2_prm_clear_mod_reg_bits(mask, clkdm->pwrdm.ptr->prcm_offs, PM_WKDEP);
return 0;
}
@@ -554,7 +552,7 @@ int clkdm_add_sleepdep(struct clockdomain *clkdm1, struct clockdomain *clkdm2)
pr_debug("clockdomain: will prevent %s from sleeping if %s "
"is active\n", clkdm1->name, clkdm2->name);
- cm_set_mod_reg_bits((1 << clkdm2->dep_bit),
+ omap2_cm_set_mod_reg_bits((1 << clkdm2->dep_bit),
clkdm1->pwrdm.ptr->prcm_offs,
OMAP3430_CM_SLEEPDEP);
}
@@ -597,7 +595,7 @@ int clkdm_del_sleepdep(struct clockdomain *clkdm1, struct clockdomain *clkdm2)
"sleeping if %s is active\n", clkdm1->name,
clkdm2->name);
- cm_clear_mod_reg_bits((1 << clkdm2->dep_bit),
+ omap2_cm_clear_mod_reg_bits((1 << clkdm2->dep_bit),
clkdm1->pwrdm.ptr->prcm_offs,
OMAP3430_CM_SLEEPDEP);
}
@@ -640,7 +638,7 @@ int clkdm_read_sleepdep(struct clockdomain *clkdm1, struct clockdomain *clkdm2)
}
/* XXX It's faster to return the atomic sleepdep_usecount */
- return prm_read_mod_bits_shift(clkdm1->pwrdm.ptr->prcm_offs,
+ return omap2_prm_read_mod_bits_shift(clkdm1->pwrdm.ptr->prcm_offs,
OMAP3430_CM_SLEEPDEP,
(1 << clkdm2->dep_bit));
}
@@ -678,7 +676,7 @@ int clkdm_clear_all_sleepdeps(struct clockdomain *clkdm)
atomic_set(&cd->sleepdep_usecount, 0);
}
- prm_clear_mod_reg_bits(mask, clkdm->pwrdm.ptr->prcm_offs,
+ omap2_prm_clear_mod_reg_bits(mask, clkdm->pwrdm.ptr->prcm_offs,
OMAP3430_CM_SLEEPDEP);
return 0;
@@ -730,7 +728,7 @@ int omap2_clkdm_sleep(struct clockdomain *clkdm)
if (cpu_is_omap24xx()) {
- cm_set_mod_reg_bits(OMAP24XX_FORCESTATE_MASK,
+ omap2_cm_set_mod_reg_bits(OMAP24XX_FORCESTATE_MASK,
clkdm->pwrdm.ptr->prcm_offs, OMAP2_PM_PWSTCTRL);
} else if (cpu_is_omap34xx() || cpu_is_omap44xx()) {
@@ -774,7 +772,7 @@ int omap2_clkdm_wakeup(struct clockdomain *clkdm)
if (cpu_is_omap24xx()) {
- cm_clear_mod_reg_bits(OMAP24XX_FORCESTATE_MASK,
+ omap2_cm_clear_mod_reg_bits(OMAP24XX_FORCESTATE_MASK,
clkdm->pwrdm.ptr->prcm_offs, OMAP2_PM_PWSTCTRL);
} else if (cpu_is_omap34xx() || cpu_is_omap44xx()) {
diff --git a/arch/arm/mach-omap2/cm2xxx_3xxx.c b/arch/arm/mach-omap2/cm2xxx_3xxx.c
index 1c98dfc..e3d598a 100644
--- a/arch/arm/mach-omap2/cm2xxx_3xxx.c
+++ b/arch/arm/mach-omap2/cm2xxx_3xxx.c
@@ -29,37 +29,37 @@ static const u8 cm_idlest_offs[] = {
CM_IDLEST1, CM_IDLEST2, OMAP2430_CM_IDLEST3
};
-u32 cm_read_mod_reg(s16 module, u16 idx)
+u32 omap2_cm_read_mod_reg(s16 module, u16 idx)
{
return __raw_readl(cm_base + module + idx);
}
-void cm_write_mod_reg(u32 val, s16 module, u16 idx)
+void omap2_cm_write_mod_reg(u32 val, s16 module, u16 idx)
{
__raw_writel(val, cm_base + module + idx);
}
/* Read-modify-write a register in a CM module. Caller must lock */
-u32 cm_rmw_mod_reg_bits(u32 mask, u32 bits, s16 module, s16 idx)
+u32 omap2_cm_rmw_mod_reg_bits(u32 mask, u32 bits, s16 module, s16 idx)
{
u32 v;
- v = cm_read_mod_reg(module, idx);
+ v = omap2_cm_read_mod_reg(module, idx);
v &= ~mask;
v |= bits;
- cm_write_mod_reg(v, module, idx);
+ omap2_cm_write_mod_reg(v, module, idx);
return v;
}
-u32 cm_set_mod_reg_bits(u32 bits, s16 module, s16 idx)
+u32 omap2_cm_set_mod_reg_bits(u32 bits, s16 module, s16 idx)
{
- return cm_rmw_mod_reg_bits(bits, bits, module, idx);
+ return omap2_cm_rmw_mod_reg_bits(bits, bits, module, idx);
}
-u32 cm_clear_mod_reg_bits(u32 bits, s16 module, s16 idx)
+u32 omap2_cm_clear_mod_reg_bits(u32 bits, s16 module, s16 idx)
{
- return cm_rmw_mod_reg_bits(bits, 0x0, module, idx);
+ return omap2_cm_rmw_mod_reg_bits(bits, 0x0, module, idx);
}
/**
@@ -90,7 +90,7 @@ int omap2_cm_wait_module_ready(s16 prcm_mod, u8 idlest_id, u8 idlest_shift)
else
BUG();
- omap_test_timeout(((cm_read_mod_reg(prcm_mod, cm_idlest_reg) & mask) == ena),
+ omap_test_timeout(((omap2_cm_read_mod_reg(prcm_mod, cm_idlest_reg) & mask) == ena),
MAX_MODULE_READY_TIME, i);
return (i < MAX_MODULE_READY_TIME) ? 0 : -EBUSY;
@@ -166,228 +166,238 @@ static struct omap3_cm_regs cm_context;
void omap3_cm_save_context(void)
{
cm_context.iva2_cm_clksel1 =
- cm_read_mod_reg(OMAP3430_IVA2_MOD, CM_CLKSEL1);
+ omap2_cm_read_mod_reg(OMAP3430_IVA2_MOD, CM_CLKSEL1);
cm_context.iva2_cm_clksel2 =
- cm_read_mod_reg(OMAP3430_IVA2_MOD, CM_CLKSEL2);
+ omap2_cm_read_mod_reg(OMAP3430_IVA2_MOD, CM_CLKSEL2);
cm_context.cm_sysconfig = __raw_readl(OMAP3430_CM_SYSCONFIG);
cm_context.sgx_cm_clksel =
- cm_read_mod_reg(OMAP3430ES2_SGX_MOD, CM_CLKSEL);
+ omap2_cm_read_mod_reg(OMAP3430ES2_SGX_MOD, CM_CLKSEL);
cm_context.dss_cm_clksel =
- cm_read_mod_reg(OMAP3430_DSS_MOD, CM_CLKSEL);
+ omap2_cm_read_mod_reg(OMAP3430_DSS_MOD, CM_CLKSEL);
cm_context.cam_cm_clksel =
- cm_read_mod_reg(OMAP3430_CAM_MOD, CM_CLKSEL);
+ omap2_cm_read_mod_reg(OMAP3430_CAM_MOD, CM_CLKSEL);
cm_context.per_cm_clksel =
- cm_read_mod_reg(OMAP3430_PER_MOD, CM_CLKSEL);
+ omap2_cm_read_mod_reg(OMAP3430_PER_MOD, CM_CLKSEL);
cm_context.emu_cm_clksel =
- cm_read_mod_reg(OMAP3430_EMU_MOD, CM_CLKSEL1);
+ omap2_cm_read_mod_reg(OMAP3430_EMU_MOD, CM_CLKSEL1);
cm_context.emu_cm_clkstctrl =
- cm_read_mod_reg(OMAP3430_EMU_MOD, OMAP2_CM_CLKSTCTRL);
+ omap2_cm_read_mod_reg(OMAP3430_EMU_MOD, OMAP2_CM_CLKSTCTRL);
cm_context.pll_cm_autoidle2 =
- cm_read_mod_reg(PLL_MOD, CM_AUTOIDLE2);
+ omap2_cm_read_mod_reg(PLL_MOD, CM_AUTOIDLE2);
cm_context.pll_cm_clksel4 =
- cm_read_mod_reg(PLL_MOD, OMAP3430ES2_CM_CLKSEL4);
+ omap2_cm_read_mod_reg(PLL_MOD, OMAP3430ES2_CM_CLKSEL4);
cm_context.pll_cm_clksel5 =
- cm_read_mod_reg(PLL_MOD, OMAP3430ES2_CM_CLKSEL5);
+ omap2_cm_read_mod_reg(PLL_MOD, OMAP3430ES2_CM_CLKSEL5);
cm_context.pll_cm_clken2 =
- cm_read_mod_reg(PLL_MOD, OMAP3430ES2_CM_CLKEN2);
+ omap2_cm_read_mod_reg(PLL_MOD, OMAP3430ES2_CM_CLKEN2);
cm_context.cm_polctrl = __raw_readl(OMAP3430_CM_POLCTRL);
cm_context.iva2_cm_fclken =
- cm_read_mod_reg(OMAP3430_IVA2_MOD, CM_FCLKEN);
- cm_context.iva2_cm_clken_pll = cm_read_mod_reg(OMAP3430_IVA2_MOD,
- OMAP3430_CM_CLKEN_PLL);
+ omap2_cm_read_mod_reg(OMAP3430_IVA2_MOD, CM_FCLKEN);
+ cm_context.iva2_cm_clken_pll =
+ omap2_cm_read_mod_reg(OMAP3430_IVA2_MOD, OMAP3430_CM_CLKEN_PLL);
cm_context.core_cm_fclken1 =
- cm_read_mod_reg(CORE_MOD, CM_FCLKEN1);
+ omap2_cm_read_mod_reg(CORE_MOD, CM_FCLKEN1);
cm_context.core_cm_fclken3 =
- cm_read_mod_reg(CORE_MOD, OMAP3430ES2_CM_FCLKEN3);
+ omap2_cm_read_mod_reg(CORE_MOD, OMAP3430ES2_CM_FCLKEN3);
cm_context.sgx_cm_fclken =
- cm_read_mod_reg(OMAP3430ES2_SGX_MOD, CM_FCLKEN);
+ omap2_cm_read_mod_reg(OMAP3430ES2_SGX_MOD, CM_FCLKEN);
cm_context.wkup_cm_fclken =
- cm_read_mod_reg(WKUP_MOD, CM_FCLKEN);
+ omap2_cm_read_mod_reg(WKUP_MOD, CM_FCLKEN);
cm_context.dss_cm_fclken =
- cm_read_mod_reg(OMAP3430_DSS_MOD, CM_FCLKEN);
+ omap2_cm_read_mod_reg(OMAP3430_DSS_MOD, CM_FCLKEN);
cm_context.cam_cm_fclken =
- cm_read_mod_reg(OMAP3430_CAM_MOD, CM_FCLKEN);
+ omap2_cm_read_mod_reg(OMAP3430_CAM_MOD, CM_FCLKEN);
cm_context.per_cm_fclken =
- cm_read_mod_reg(OMAP3430_PER_MOD, CM_FCLKEN);
+ omap2_cm_read_mod_reg(OMAP3430_PER_MOD, CM_FCLKEN);
cm_context.usbhost_cm_fclken =
- cm_read_mod_reg(OMAP3430ES2_USBHOST_MOD, CM_FCLKEN);
+ omap2_cm_read_mod_reg(OMAP3430ES2_USBHOST_MOD, CM_FCLKEN);
cm_context.core_cm_iclken1 =
- cm_read_mod_reg(CORE_MOD, CM_ICLKEN1);
+ omap2_cm_read_mod_reg(CORE_MOD, CM_ICLKEN1);
cm_context.core_cm_iclken2 =
- cm_read_mod_reg(CORE_MOD, CM_ICLKEN2);
+ omap2_cm_read_mod_reg(CORE_MOD, CM_ICLKEN2);
cm_context.core_cm_iclken3 =
- cm_read_mod_reg(CORE_MOD, CM_ICLKEN3);
+ omap2_cm_read_mod_reg(CORE_MOD, CM_ICLKEN3);
cm_context.sgx_cm_iclken =
- cm_read_mod_reg(OMAP3430ES2_SGX_MOD, CM_ICLKEN);
+ omap2_cm_read_mod_reg(OMAP3430ES2_SGX_MOD, CM_ICLKEN);
cm_context.wkup_cm_iclken =
- cm_read_mod_reg(WKUP_MOD, CM_ICLKEN);
+ omap2_cm_read_mod_reg(WKUP_MOD, CM_ICLKEN);
cm_context.dss_cm_iclken =
- cm_read_mod_reg(OMAP3430_DSS_MOD, CM_ICLKEN);
+ omap2_cm_read_mod_reg(OMAP3430_DSS_MOD, CM_ICLKEN);
cm_context.cam_cm_iclken =
- cm_read_mod_reg(OMAP3430_CAM_MOD, CM_ICLKEN);
+ omap2_cm_read_mod_reg(OMAP3430_CAM_MOD, CM_ICLKEN);
cm_context.per_cm_iclken =
- cm_read_mod_reg(OMAP3430_PER_MOD, CM_ICLKEN);
+ omap2_cm_read_mod_reg(OMAP3430_PER_MOD, CM_ICLKEN);
cm_context.usbhost_cm_iclken =
- cm_read_mod_reg(OMAP3430ES2_USBHOST_MOD, CM_ICLKEN);
+ omap2_cm_read_mod_reg(OMAP3430ES2_USBHOST_MOD, CM_ICLKEN);
cm_context.iva2_cm_autoidle2 =
- cm_read_mod_reg(OMAP3430_IVA2_MOD, CM_AUTOIDLE2);
+ omap2_cm_read_mod_reg(OMAP3430_IVA2_MOD, CM_AUTOIDLE2);
cm_context.mpu_cm_autoidle2 =
- cm_read_mod_reg(MPU_MOD, CM_AUTOIDLE2);
+ omap2_cm_read_mod_reg(MPU_MOD, CM_AUTOIDLE2);
cm_context.iva2_cm_clkstctrl =
- cm_read_mod_reg(OMAP3430_IVA2_MOD, OMAP2_CM_CLKSTCTRL);
+ omap2_cm_read_mod_reg(OMAP3430_IVA2_MOD, OMAP2_CM_CLKSTCTRL);
cm_context.mpu_cm_clkstctrl =
- cm_read_mod_reg(MPU_MOD, OMAP2_CM_CLKSTCTRL);
+ omap2_cm_read_mod_reg(MPU_MOD, OMAP2_CM_CLKSTCTRL);
cm_context.core_cm_clkstctrl =
- cm_read_mod_reg(CORE_MOD, OMAP2_CM_CLKSTCTRL);
+ omap2_cm_read_mod_reg(CORE_MOD, OMAP2_CM_CLKSTCTRL);
cm_context.sgx_cm_clkstctrl =
- cm_read_mod_reg(OMAP3430ES2_SGX_MOD, OMAP2_CM_CLKSTCTRL);
+ omap2_cm_read_mod_reg(OMAP3430ES2_SGX_MOD, OMAP2_CM_CLKSTCTRL);
cm_context.dss_cm_clkstctrl =
- cm_read_mod_reg(OMAP3430_DSS_MOD, OMAP2_CM_CLKSTCTRL);
+ omap2_cm_read_mod_reg(OMAP3430_DSS_MOD, OMAP2_CM_CLKSTCTRL);
cm_context.cam_cm_clkstctrl =
- cm_read_mod_reg(OMAP3430_CAM_MOD, OMAP2_CM_CLKSTCTRL);
+ omap2_cm_read_mod_reg(OMAP3430_CAM_MOD, OMAP2_CM_CLKSTCTRL);
cm_context.per_cm_clkstctrl =
- cm_read_mod_reg(OMAP3430_PER_MOD, OMAP2_CM_CLKSTCTRL);
+ omap2_cm_read_mod_reg(OMAP3430_PER_MOD, OMAP2_CM_CLKSTCTRL);
cm_context.neon_cm_clkstctrl =
- cm_read_mod_reg(OMAP3430_NEON_MOD, OMAP2_CM_CLKSTCTRL);
+ omap2_cm_read_mod_reg(OMAP3430_NEON_MOD, OMAP2_CM_CLKSTCTRL);
cm_context.usbhost_cm_clkstctrl =
- cm_read_mod_reg(OMAP3430ES2_USBHOST_MOD, OMAP2_CM_CLKSTCTRL);
+ omap2_cm_read_mod_reg(OMAP3430ES2_USBHOST_MOD,
+ OMAP2_CM_CLKSTCTRL);
cm_context.core_cm_autoidle1 =
- cm_read_mod_reg(CORE_MOD, CM_AUTOIDLE1);
+ omap2_cm_read_mod_reg(CORE_MOD, CM_AUTOIDLE1);
cm_context.core_cm_autoidle2 =
- cm_read_mod_reg(CORE_MOD, CM_AUTOIDLE2);
+ omap2_cm_read_mod_reg(CORE_MOD, CM_AUTOIDLE2);
cm_context.core_cm_autoidle3 =
- cm_read_mod_reg(CORE_MOD, CM_AUTOIDLE3);
+ omap2_cm_read_mod_reg(CORE_MOD, CM_AUTOIDLE3);
cm_context.wkup_cm_autoidle =
- cm_read_mod_reg(WKUP_MOD, CM_AUTOIDLE);
+ omap2_cm_read_mod_reg(WKUP_MOD, CM_AUTOIDLE);
cm_context.dss_cm_autoidle =
- cm_read_mod_reg(OMAP3430_DSS_MOD, CM_AUTOIDLE);
+ omap2_cm_read_mod_reg(OMAP3430_DSS_MOD, CM_AUTOIDLE);
cm_context.cam_cm_autoidle =
- cm_read_mod_reg(OMAP3430_CAM_MOD, CM_AUTOIDLE);
+ omap2_cm_read_mod_reg(OMAP3430_CAM_MOD, CM_AUTOIDLE);
cm_context.per_cm_autoidle =
- cm_read_mod_reg(OMAP3430_PER_MOD, CM_AUTOIDLE);
+ omap2_cm_read_mod_reg(OMAP3430_PER_MOD, CM_AUTOIDLE);
cm_context.usbhost_cm_autoidle =
- cm_read_mod_reg(OMAP3430ES2_USBHOST_MOD, CM_AUTOIDLE);
+ omap2_cm_read_mod_reg(OMAP3430ES2_USBHOST_MOD, CM_AUTOIDLE);
cm_context.sgx_cm_sleepdep =
- cm_read_mod_reg(OMAP3430ES2_SGX_MOD, OMAP3430_CM_SLEEPDEP);
+ omap2_cm_read_mod_reg(OMAP3430ES2_SGX_MOD,
+ OMAP3430_CM_SLEEPDEP);
cm_context.dss_cm_sleepdep =
- cm_read_mod_reg(OMAP3430_DSS_MOD, OMAP3430_CM_SLEEPDEP);
+ omap2_cm_read_mod_reg(OMAP3430_DSS_MOD, OMAP3430_CM_SLEEPDEP);
cm_context.cam_cm_sleepdep =
- cm_read_mod_reg(OMAP3430_CAM_MOD, OMAP3430_CM_SLEEPDEP);
+ omap2_cm_read_mod_reg(OMAP3430_CAM_MOD, OMAP3430_CM_SLEEPDEP);
cm_context.per_cm_sleepdep =
- cm_read_mod_reg(OMAP3430_PER_MOD, OMAP3430_CM_SLEEPDEP);
+ omap2_cm_read_mod_reg(OMAP3430_PER_MOD, OMAP3430_CM_SLEEPDEP);
cm_context.usbhost_cm_sleepdep =
- cm_read_mod_reg(OMAP3430ES2_USBHOST_MOD, OMAP3430_CM_SLEEPDEP);
+ omap2_cm_read_mod_reg(OMAP3430ES2_USBHOST_MOD,
+ OMAP3430_CM_SLEEPDEP);
cm_context.cm_clkout_ctrl =
- cm_read_mod_reg(OMAP3430_CCR_MOD, OMAP3_CM_CLKOUT_CTRL_OFFSET);
+ omap2_cm_read_mod_reg(OMAP3430_CCR_MOD,
+ OMAP3_CM_CLKOUT_CTRL_OFFSET);
}
void omap3_cm_restore_context(void)
{
- cm_write_mod_reg(cm_context.iva2_cm_clksel1, OMAP3430_IVA2_MOD,
- CM_CLKSEL1);
- cm_write_mod_reg(cm_context.iva2_cm_clksel2, OMAP3430_IVA2_MOD,
- CM_CLKSEL2);
+ omap2_cm_write_mod_reg(cm_context.iva2_cm_clksel1, OMAP3430_IVA2_MOD,
+ CM_CLKSEL1);
+ omap2_cm_write_mod_reg(cm_context.iva2_cm_clksel2, OMAP3430_IVA2_MOD,
+ CM_CLKSEL2);
__raw_writel(cm_context.cm_sysconfig, OMAP3430_CM_SYSCONFIG);
- cm_write_mod_reg(cm_context.sgx_cm_clksel, OMAP3430ES2_SGX_MOD,
- CM_CLKSEL);
- cm_write_mod_reg(cm_context.dss_cm_clksel, OMAP3430_DSS_MOD,
- CM_CLKSEL);
- cm_write_mod_reg(cm_context.cam_cm_clksel, OMAP3430_CAM_MOD,
- CM_CLKSEL);
- cm_write_mod_reg(cm_context.per_cm_clksel, OMAP3430_PER_MOD,
- CM_CLKSEL);
- cm_write_mod_reg(cm_context.emu_cm_clksel, OMAP3430_EMU_MOD,
- CM_CLKSEL1);
- cm_write_mod_reg(cm_context.emu_cm_clkstctrl, OMAP3430_EMU_MOD,
- OMAP2_CM_CLKSTCTRL);
- cm_write_mod_reg(cm_context.pll_cm_autoidle2, PLL_MOD,
- CM_AUTOIDLE2);
- cm_write_mod_reg(cm_context.pll_cm_clksel4, PLL_MOD,
- OMAP3430ES2_CM_CLKSEL4);
- cm_write_mod_reg(cm_context.pll_cm_clksel5, PLL_MOD,
- OMAP3430ES2_CM_CLKSEL5);
- cm_write_mod_reg(cm_context.pll_cm_clken2, PLL_MOD,
- OMAP3430ES2_CM_CLKEN2);
+ omap2_cm_write_mod_reg(cm_context.sgx_cm_clksel, OMAP3430ES2_SGX_MOD,
+ CM_CLKSEL);
+ omap2_cm_write_mod_reg(cm_context.dss_cm_clksel, OMAP3430_DSS_MOD,
+ CM_CLKSEL);
+ omap2_cm_write_mod_reg(cm_context.cam_cm_clksel, OMAP3430_CAM_MOD,
+ CM_CLKSEL);
+ omap2_cm_write_mod_reg(cm_context.per_cm_clksel, OMAP3430_PER_MOD,
+ CM_CLKSEL);
+ omap2_cm_write_mod_reg(cm_context.emu_cm_clksel, OMAP3430_EMU_MOD,
+ CM_CLKSEL1);
+ omap2_cm_write_mod_reg(cm_context.emu_cm_clkstctrl, OMAP3430_EMU_MOD,
+ OMAP2_CM_CLKSTCTRL);
+ omap2_cm_write_mod_reg(cm_context.pll_cm_autoidle2, PLL_MOD,
+ CM_AUTOIDLE2);
+ omap2_cm_write_mod_reg(cm_context.pll_cm_clksel4, PLL_MOD,
+ OMAP3430ES2_CM_CLKSEL4);
+ omap2_cm_write_mod_reg(cm_context.pll_cm_clksel5, PLL_MOD,
+ OMAP3430ES2_CM_CLKSEL5);
+ omap2_cm_write_mod_reg(cm_context.pll_cm_clken2, PLL_MOD,
+ OMAP3430ES2_CM_CLKEN2);
__raw_writel(cm_context.cm_polctrl, OMAP3430_CM_POLCTRL);
- cm_write_mod_reg(cm_context.iva2_cm_fclken, OMAP3430_IVA2_MOD,
- CM_FCLKEN);
- cm_write_mod_reg(cm_context.iva2_cm_clken_pll, OMAP3430_IVA2_MOD,
- OMAP3430_CM_CLKEN_PLL);
- cm_write_mod_reg(cm_context.core_cm_fclken1, CORE_MOD, CM_FCLKEN1);
- cm_write_mod_reg(cm_context.core_cm_fclken3, CORE_MOD,
- OMAP3430ES2_CM_FCLKEN3);
- cm_write_mod_reg(cm_context.sgx_cm_fclken, OMAP3430ES2_SGX_MOD,
- CM_FCLKEN);
- cm_write_mod_reg(cm_context.wkup_cm_fclken, WKUP_MOD, CM_FCLKEN);
- cm_write_mod_reg(cm_context.dss_cm_fclken, OMAP3430_DSS_MOD,
- CM_FCLKEN);
- cm_write_mod_reg(cm_context.cam_cm_fclken, OMAP3430_CAM_MOD,
- CM_FCLKEN);
- cm_write_mod_reg(cm_context.per_cm_fclken, OMAP3430_PER_MOD,
- CM_FCLKEN);
- cm_write_mod_reg(cm_context.usbhost_cm_fclken,
- OMAP3430ES2_USBHOST_MOD, CM_FCLKEN);
- cm_write_mod_reg(cm_context.core_cm_iclken1, CORE_MOD, CM_ICLKEN1);
- cm_write_mod_reg(cm_context.core_cm_iclken2, CORE_MOD, CM_ICLKEN2);
- cm_write_mod_reg(cm_context.core_cm_iclken3, CORE_MOD, CM_ICLKEN3);
- cm_write_mod_reg(cm_context.sgx_cm_iclken, OMAP3430ES2_SGX_MOD,
- CM_ICLKEN);
- cm_write_mod_reg(cm_context.wkup_cm_iclken, WKUP_MOD, CM_ICLKEN);
- cm_write_mod_reg(cm_context.dss_cm_iclken, OMAP3430_DSS_MOD,
- CM_ICLKEN);
- cm_write_mod_reg(cm_context.cam_cm_iclken, OMAP3430_CAM_MOD,
- CM_ICLKEN);
- cm_write_mod_reg(cm_context.per_cm_iclken, OMAP3430_PER_MOD,
- CM_ICLKEN);
- cm_write_mod_reg(cm_context.usbhost_cm_iclken,
- OMAP3430ES2_USBHOST_MOD, CM_ICLKEN);
- cm_write_mod_reg(cm_context.iva2_cm_autoidle2, OMAP3430_IVA2_MOD,
- CM_AUTOIDLE2);
- cm_write_mod_reg(cm_context.mpu_cm_autoidle2, MPU_MOD, CM_AUTOIDLE2);
- cm_write_mod_reg(cm_context.iva2_cm_clkstctrl, OMAP3430_IVA2_MOD,
- OMAP2_CM_CLKSTCTRL);
- cm_write_mod_reg(cm_context.mpu_cm_clkstctrl, MPU_MOD,
- OMAP2_CM_CLKSTCTRL);
- cm_write_mod_reg(cm_context.core_cm_clkstctrl, CORE_MOD,
- OMAP2_CM_CLKSTCTRL);
- cm_write_mod_reg(cm_context.sgx_cm_clkstctrl, OMAP3430ES2_SGX_MOD,
- OMAP2_CM_CLKSTCTRL);
- cm_write_mod_reg(cm_context.dss_cm_clkstctrl, OMAP3430_DSS_MOD,
- OMAP2_CM_CLKSTCTRL);
- cm_write_mod_reg(cm_context.cam_cm_clkstctrl, OMAP3430_CAM_MOD,
- OMAP2_CM_CLKSTCTRL);
- cm_write_mod_reg(cm_context.per_cm_clkstctrl, OMAP3430_PER_MOD,
- OMAP2_CM_CLKSTCTRL);
- cm_write_mod_reg(cm_context.neon_cm_clkstctrl, OMAP3430_NEON_MOD,
- OMAP2_CM_CLKSTCTRL);
- cm_write_mod_reg(cm_context.usbhost_cm_clkstctrl,
- OMAP3430ES2_USBHOST_MOD, OMAP2_CM_CLKSTCTRL);
- cm_write_mod_reg(cm_context.core_cm_autoidle1, CORE_MOD,
- CM_AUTOIDLE1);
- cm_write_mod_reg(cm_context.core_cm_autoidle2, CORE_MOD,
- CM_AUTOIDLE2);
- cm_write_mod_reg(cm_context.core_cm_autoidle3, CORE_MOD,
- CM_AUTOIDLE3);
- cm_write_mod_reg(cm_context.wkup_cm_autoidle, WKUP_MOD, CM_AUTOIDLE);
- cm_write_mod_reg(cm_context.dss_cm_autoidle, OMAP3430_DSS_MOD,
- CM_AUTOIDLE);
- cm_write_mod_reg(cm_context.cam_cm_autoidle, OMAP3430_CAM_MOD,
- CM_AUTOIDLE);
- cm_write_mod_reg(cm_context.per_cm_autoidle, OMAP3430_PER_MOD,
- CM_AUTOIDLE);
- cm_write_mod_reg(cm_context.usbhost_cm_autoidle,
- OMAP3430ES2_USBHOST_MOD, CM_AUTOIDLE);
- cm_write_mod_reg(cm_context.sgx_cm_sleepdep, OMAP3430ES2_SGX_MOD,
- OMAP3430_CM_SLEEPDEP);
- cm_write_mod_reg(cm_context.dss_cm_sleepdep, OMAP3430_DSS_MOD,
- OMAP3430_CM_SLEEPDEP);
- cm_write_mod_reg(cm_context.cam_cm_sleepdep, OMAP3430_CAM_MOD,
- OMAP3430_CM_SLEEPDEP);
- cm_write_mod_reg(cm_context.per_cm_sleepdep, OMAP3430_PER_MOD,
- OMAP3430_CM_SLEEPDEP);
- cm_write_mod_reg(cm_context.usbhost_cm_sleepdep,
- OMAP3430ES2_USBHOST_MOD, OMAP3430_CM_SLEEPDEP);
- cm_write_mod_reg(cm_context.cm_clkout_ctrl, OMAP3430_CCR_MOD,
- OMAP3_CM_CLKOUT_CTRL_OFFSET);
+ omap2_cm_write_mod_reg(cm_context.iva2_cm_fclken, OMAP3430_IVA2_MOD,
+ CM_FCLKEN);
+ omap2_cm_write_mod_reg(cm_context.iva2_cm_clken_pll, OMAP3430_IVA2_MOD,
+ OMAP3430_CM_CLKEN_PLL);
+ omap2_cm_write_mod_reg(cm_context.core_cm_fclken1, CORE_MOD,
+ CM_FCLKEN1);
+ omap2_cm_write_mod_reg(cm_context.core_cm_fclken3, CORE_MOD,
+ OMAP3430ES2_CM_FCLKEN3);
+ omap2_cm_write_mod_reg(cm_context.sgx_cm_fclken, OMAP3430ES2_SGX_MOD,
+ CM_FCLKEN);
+ omap2_cm_write_mod_reg(cm_context.wkup_cm_fclken, WKUP_MOD, CM_FCLKEN);
+ omap2_cm_write_mod_reg(cm_context.dss_cm_fclken, OMAP3430_DSS_MOD,
+ CM_FCLKEN);
+ omap2_cm_write_mod_reg(cm_context.cam_cm_fclken, OMAP3430_CAM_MOD,
+ CM_FCLKEN);
+ omap2_cm_write_mod_reg(cm_context.per_cm_fclken, OMAP3430_PER_MOD,
+ CM_FCLKEN);
+ omap2_cm_write_mod_reg(cm_context.usbhost_cm_fclken,
+ OMAP3430ES2_USBHOST_MOD, CM_FCLKEN);
+ omap2_cm_write_mod_reg(cm_context.core_cm_iclken1, CORE_MOD,
+ CM_ICLKEN1);
+ omap2_cm_write_mod_reg(cm_context.core_cm_iclken2, CORE_MOD,
+ CM_ICLKEN2);
+ omap2_cm_write_mod_reg(cm_context.core_cm_iclken3, CORE_MOD,
+ CM_ICLKEN3);
+ omap2_cm_write_mod_reg(cm_context.sgx_cm_iclken, OMAP3430ES2_SGX_MOD,
+ CM_ICLKEN);
+ omap2_cm_write_mod_reg(cm_context.wkup_cm_iclken, WKUP_MOD, CM_ICLKEN);
+ omap2_cm_write_mod_reg(cm_context.dss_cm_iclken, OMAP3430_DSS_MOD,
+ CM_ICLKEN);
+ omap2_cm_write_mod_reg(cm_context.cam_cm_iclken, OMAP3430_CAM_MOD,
+ CM_ICLKEN);
+ omap2_cm_write_mod_reg(cm_context.per_cm_iclken, OMAP3430_PER_MOD,
+ CM_ICLKEN);
+ omap2_cm_write_mod_reg(cm_context.usbhost_cm_iclken,
+ OMAP3430ES2_USBHOST_MOD, CM_ICLKEN);
+ omap2_cm_write_mod_reg(cm_context.iva2_cm_autoidle2, OMAP3430_IVA2_MOD,
+ CM_AUTOIDLE2);
+ omap2_cm_write_mod_reg(cm_context.mpu_cm_autoidle2, MPU_MOD,
+ CM_AUTOIDLE2);
+ omap2_cm_write_mod_reg(cm_context.iva2_cm_clkstctrl, OMAP3430_IVA2_MOD,
+ OMAP2_CM_CLKSTCTRL);
+ omap2_cm_write_mod_reg(cm_context.mpu_cm_clkstctrl, MPU_MOD,
+ OMAP2_CM_CLKSTCTRL);
+ omap2_cm_write_mod_reg(cm_context.core_cm_clkstctrl, CORE_MOD,
+ OMAP2_CM_CLKSTCTRL);
+ omap2_cm_write_mod_reg(cm_context.sgx_cm_clkstctrl, OMAP3430ES2_SGX_MOD,
+ OMAP2_CM_CLKSTCTRL);
+ omap2_cm_write_mod_reg(cm_context.dss_cm_clkstctrl, OMAP3430_DSS_MOD,
+ OMAP2_CM_CLKSTCTRL);
+ omap2_cm_write_mod_reg(cm_context.cam_cm_clkstctrl, OMAP3430_CAM_MOD,
+ OMAP2_CM_CLKSTCTRL);
+ omap2_cm_write_mod_reg(cm_context.per_cm_clkstctrl, OMAP3430_PER_MOD,
+ OMAP2_CM_CLKSTCTRL);
+ omap2_cm_write_mod_reg(cm_context.neon_cm_clkstctrl, OMAP3430_NEON_MOD,
+ OMAP2_CM_CLKSTCTRL);
+ omap2_cm_write_mod_reg(cm_context.usbhost_cm_clkstctrl,
+ OMAP3430ES2_USBHOST_MOD, OMAP2_CM_CLKSTCTRL);
+ omap2_cm_write_mod_reg(cm_context.core_cm_autoidle1, CORE_MOD,
+ CM_AUTOIDLE1);
+ omap2_cm_write_mod_reg(cm_context.core_cm_autoidle2, CORE_MOD,
+ CM_AUTOIDLE2);
+ omap2_cm_write_mod_reg(cm_context.core_cm_autoidle3, CORE_MOD,
+ CM_AUTOIDLE3);
+ omap2_cm_write_mod_reg(cm_context.wkup_cm_autoidle, WKUP_MOD,
+ CM_AUTOIDLE);
+ omap2_cm_write_mod_reg(cm_context.dss_cm_autoidle, OMAP3430_DSS_MOD,
+ CM_AUTOIDLE);
+ omap2_cm_write_mod_reg(cm_context.cam_cm_autoidle, OMAP3430_CAM_MOD,
+ CM_AUTOIDLE);
+ omap2_cm_write_mod_reg(cm_context.per_cm_autoidle, OMAP3430_PER_MOD,
+ CM_AUTOIDLE);
+ omap2_cm_write_mod_reg(cm_context.usbhost_cm_autoidle,
+ OMAP3430ES2_USBHOST_MOD, CM_AUTOIDLE);
+ omap2_cm_write_mod_reg(cm_context.sgx_cm_sleepdep, OMAP3430ES2_SGX_MOD,
+ OMAP3430_CM_SLEEPDEP);
+ omap2_cm_write_mod_reg(cm_context.dss_cm_sleepdep, OMAP3430_DSS_MOD,
+ OMAP3430_CM_SLEEPDEP);
+ omap2_cm_write_mod_reg(cm_context.cam_cm_sleepdep, OMAP3430_CAM_MOD,
+ OMAP3430_CM_SLEEPDEP);
+ omap2_cm_write_mod_reg(cm_context.per_cm_sleepdep, OMAP3430_PER_MOD,
+ OMAP3430_CM_SLEEPDEP);
+ omap2_cm_write_mod_reg(cm_context.usbhost_cm_sleepdep,
+ OMAP3430ES2_USBHOST_MOD, OMAP3430_CM_SLEEPDEP);
+ omap2_cm_write_mod_reg(cm_context.cm_clkout_ctrl, OMAP3430_CCR_MOD,
+ OMAP3_CM_CLKOUT_CTRL_OFFSET);
}
#endif
diff --git a/arch/arm/mach-omap2/cm2xxx_3xxx.h b/arch/arm/mach-omap2/cm2xxx_3xxx.h
index ce2582c1..ff24edf 100644
--- a/arch/arm/mach-omap2/cm2xxx_3xxx.h
+++ b/arch/arm/mach-omap2/cm2xxx_3xxx.h
@@ -104,14 +104,14 @@
#ifndef __ASSEMBLER__
-extern u32 cm_read_mod_reg(s16 module, u16 idx);
-extern void cm_write_mod_reg(u32 val, s16 module, u16 idx);
-extern u32 cm_rmw_mod_reg_bits(u32 mask, u32 bits, s16 module, s16 idx);
+extern u32 omap2_cm_read_mod_reg(s16 module, u16 idx);
+extern void omap2_cm_write_mod_reg(u32 val, s16 module, u16 idx);
+extern u32 omap2_cm_rmw_mod_reg_bits(u32 mask, u32 bits, s16 module, s16 idx);
extern int omap2_cm_wait_module_ready(s16 prcm_mod, u8 idlest_id,
u8 idlest_shift);
-extern u32 cm_set_mod_reg_bits(u32 bits, s16 module, s16 idx);
-extern u32 cm_clear_mod_reg_bits(u32 bits, s16 module, s16 idx);
+extern u32 omap2_cm_set_mod_reg_bits(u32 bits, s16 module, s16 idx);
+extern u32 omap2_cm_clear_mod_reg_bits(u32 bits, s16 module, s16 idx);
#endif
diff --git a/arch/arm/mach-omap2/control.c b/arch/arm/mach-omap2/control.c
index fee6620..16bde76 100644
--- a/arch/arm/mach-omap2/control.c
+++ b/arch/arm/mach-omap2/control.c
@@ -252,13 +252,13 @@ void omap3_clear_scratchpad_contents(void)
void __iomem *v_addr;
u32 offset = 0;
v_addr = OMAP2_L4_IO_ADDRESS(OMAP343X_SCRATCHPAD_ROM);
- if (prm_read_mod_reg(OMAP3430_GR_MOD, OMAP3_PRM_RSTST_OFFSET) &
+ if (omap2_prm_read_mod_reg(OMAP3430_GR_MOD, OMAP3_PRM_RSTST_OFFSET) &
OMAP3430_GLOBAL_COLD_RST_MASK) {
for ( ; offset <= max_offset; offset += 0x4)
__raw_writel(0x0, (v_addr + offset));
- prm_set_mod_reg_bits(OMAP3430_GLOBAL_COLD_RST_MASK,
- OMAP3430_GR_MOD,
- OMAP3_PRM_RSTST_OFFSET);
+ omap2_prm_set_mod_reg_bits(OMAP3430_GLOBAL_COLD_RST_MASK,
+ OMAP3430_GR_MOD,
+ OMAP3_PRM_RSTST_OFFSET);
}
}
@@ -290,32 +290,34 @@ void omap3_save_scratchpad_contents(void)
scratchpad_contents.sdrc_block_offset = 0x64;
/* Populate the PRCM block contents */
- prcm_block_contents.prm_clksrc_ctrl = prm_read_mod_reg(OMAP3430_GR_MOD,
- OMAP3_PRM_CLKSRC_CTRL_OFFSET);
- prcm_block_contents.prm_clksel = prm_read_mod_reg(OMAP3430_CCR_MOD,
- OMAP3_PRM_CLKSEL_OFFSET);
+ prcm_block_contents.prm_clksrc_ctrl =
+ omap2_prm_read_mod_reg(OMAP3430_GR_MOD,
+ OMAP3_PRM_CLKSRC_CTRL_OFFSET);
+ prcm_block_contents.prm_clksel =
+ omap2_prm_read_mod_reg(OMAP3430_CCR_MOD,
+ OMAP3_PRM_CLKSEL_OFFSET);
prcm_block_contents.cm_clksel_core =
- cm_read_mod_reg(CORE_MOD, CM_CLKSEL);
+ omap2_cm_read_mod_reg(CORE_MOD, CM_CLKSEL);
prcm_block_contents.cm_clksel_wkup =
- cm_read_mod_reg(WKUP_MOD, CM_CLKSEL);
+ omap2_cm_read_mod_reg(WKUP_MOD, CM_CLKSEL);
prcm_block_contents.cm_clken_pll =
- cm_read_mod_reg(PLL_MOD, CM_CLKEN);
+ omap2_cm_read_mod_reg(PLL_MOD, CM_CLKEN);
prcm_block_contents.cm_autoidle_pll =
- cm_read_mod_reg(PLL_MOD, OMAP3430_CM_AUTOIDLE_PLL);
+ omap2_cm_read_mod_reg(PLL_MOD, OMAP3430_CM_AUTOIDLE_PLL);
prcm_block_contents.cm_clksel1_pll =
- cm_read_mod_reg(PLL_MOD, OMAP3430_CM_CLKSEL1_PLL);
+ omap2_cm_read_mod_reg(PLL_MOD, OMAP3430_CM_CLKSEL1_PLL);
prcm_block_contents.cm_clksel2_pll =
- cm_read_mod_reg(PLL_MOD, OMAP3430_CM_CLKSEL2_PLL);
+ omap2_cm_read_mod_reg(PLL_MOD, OMAP3430_CM_CLKSEL2_PLL);
prcm_block_contents.cm_clksel3_pll =
- cm_read_mod_reg(PLL_MOD, OMAP3430_CM_CLKSEL3);
+ omap2_cm_read_mod_reg(PLL_MOD, OMAP3430_CM_CLKSEL3);
prcm_block_contents.cm_clken_pll_mpu =
- cm_read_mod_reg(MPU_MOD, OMAP3430_CM_CLKEN_PLL);
+ omap2_cm_read_mod_reg(MPU_MOD, OMAP3430_CM_CLKEN_PLL);
prcm_block_contents.cm_autoidle_pll_mpu =
- cm_read_mod_reg(MPU_MOD, OMAP3430_CM_AUTOIDLE_PLL);
+ omap2_cm_read_mod_reg(MPU_MOD, OMAP3430_CM_AUTOIDLE_PLL);
prcm_block_contents.cm_clksel1_pll_mpu =
- cm_read_mod_reg(MPU_MOD, OMAP3430_CM_CLKSEL1_PLL);
+ omap2_cm_read_mod_reg(MPU_MOD, OMAP3430_CM_CLKSEL1_PLL);
prcm_block_contents.cm_clksel2_pll_mpu =
- cm_read_mod_reg(MPU_MOD, OMAP3430_CM_CLKSEL2_PLL);
+ omap2_cm_read_mod_reg(MPU_MOD, OMAP3430_CM_CLKSEL2_PLL);
prcm_block_contents.prcm_block_size = 0x0;
/* Populate the SDRC block contents */
diff --git a/arch/arm/mach-omap2/pm-debug.c b/arch/arm/mach-omap2/pm-debug.c
index 26eda02..73f8ec0 100644
--- a/arch/arm/mach-omap2/pm-debug.c
+++ b/arch/arm/mach-omap2/pm-debug.c
@@ -45,10 +45,10 @@ u32 wakeup_timer_milliseconds;
#define DUMP_PRM_MOD_REG(mod, reg) \
regs[reg_count].name = #mod "." #reg; \
- regs[reg_count++].val = prm_read_mod_reg(mod, reg)
+ regs[reg_count++].val = omap2_prm_read_mod_reg(mod, reg)
#define DUMP_CM_MOD_REG(mod, reg) \
regs[reg_count].name = #mod "." #reg; \
- regs[reg_count++].val = cm_read_mod_reg(mod, reg)
+ regs[reg_count++].val = omap2_cm_read_mod_reg(mod, reg)
#define DUMP_PRM_REG(reg) \
regs[reg_count].name = #reg; \
regs[reg_count++].val = __raw_readl(reg)
@@ -311,10 +311,10 @@ static void pm_dbg_regset_store(u32 *ptr)
for (j = pm_dbg_reg_modules[i].low;
j <= pm_dbg_reg_modules[i].high; j += 4) {
if (pm_dbg_reg_modules[i].type == MOD_CM)
- val = cm_read_mod_reg(
+ val = omap2_cm_read_mod_reg(
pm_dbg_reg_modules[i].offset, j);
else
- val = prm_read_mod_reg(
+ val = omap2_prm_read_mod_reg(
pm_dbg_reg_modules[i].offset, j);
*(ptr++) = val;
}
diff --git a/arch/arm/mach-omap2/pm24xx.c b/arch/arm/mach-omap2/pm24xx.c
index de89d89..f13e2ca 100644
--- a/arch/arm/mach-omap2/pm24xx.c
+++ b/arch/arm/mach-omap2/pm24xx.c
@@ -66,8 +66,8 @@ static int omap2_fclks_active(void)
{
u32 f1, f2;
- f1 = cm_read_mod_reg(CORE_MOD, CM_FCLKEN1);
- f2 = cm_read_mod_reg(CORE_MOD, OMAP24XX_CM_FCLKEN2);
+ f1 = omap2_cm_read_mod_reg(CORE_MOD, CM_FCLKEN1);
+ f2 = omap2_cm_read_mod_reg(CORE_MOD, OMAP24XX_CM_FCLKEN2);
/* Ignore UART clocks. These are handled by UART core (serial.c) */
f1 &= ~(OMAP24XX_EN_UART1_MASK | OMAP24XX_EN_UART2_MASK);
@@ -92,9 +92,9 @@ static void omap2_enter_full_retention(void)
/* Clear old wake-up events */
/* REVISIT: These write to reserved bits? */
- prm_write_mod_reg(0xffffffff, CORE_MOD, PM_WKST1);
- prm_write_mod_reg(0xffffffff, CORE_MOD, OMAP24XX_PM_WKST2);
- prm_write_mod_reg(0xffffffff, WKUP_MOD, PM_WKST);
+ omap2_prm_write_mod_reg(0xffffffff, CORE_MOD, PM_WKST1);
+ omap2_prm_write_mod_reg(0xffffffff, CORE_MOD, OMAP24XX_PM_WKST2);
+ omap2_prm_write_mod_reg(0xffffffff, WKUP_MOD, PM_WKST);
/*
* Set MPU powerdomain's next power state to RETENTION;
@@ -152,30 +152,30 @@ no_sleep:
clk_enable(osc_ck);
/* clear CORE wake-up events */
- prm_write_mod_reg(0xffffffff, CORE_MOD, PM_WKST1);
- prm_write_mod_reg(0xffffffff, CORE_MOD, OMAP24XX_PM_WKST2);
+ omap2_prm_write_mod_reg(0xffffffff, CORE_MOD, PM_WKST1);
+ omap2_prm_write_mod_reg(0xffffffff, CORE_MOD, OMAP24XX_PM_WKST2);
/* wakeup domain events - bit 1: GPT1, bit5 GPIO */
- prm_clear_mod_reg_bits(0x4 | 0x1, WKUP_MOD, PM_WKST);
+ omap2_prm_clear_mod_reg_bits(0x4 | 0x1, WKUP_MOD, PM_WKST);
/* MPU domain wake events */
- l = prm_read_mod_reg(OCP_MOD, OMAP2_PRCM_IRQSTATUS_MPU_OFFSET);
+ l = omap2_prm_read_mod_reg(OCP_MOD, OMAP2_PRCM_IRQSTATUS_MPU_OFFSET);
if (l & 0x01)
- prm_write_mod_reg(0x01, OCP_MOD,
+ omap2_prm_write_mod_reg(0x01, OCP_MOD,
OMAP2_PRCM_IRQSTATUS_MPU_OFFSET);
if (l & 0x20)
- prm_write_mod_reg(0x20, OCP_MOD,
+ omap2_prm_write_mod_reg(0x20, OCP_MOD,
OMAP2_PRCM_IRQSTATUS_MPU_OFFSET);
/* Mask future PRCM-to-MPU interrupts */
- prm_write_mod_reg(0x0, OCP_MOD, OMAP2_PRCM_IRQSTATUS_MPU_OFFSET);
+ omap2_prm_write_mod_reg(0x0, OCP_MOD, OMAP2_PRCM_IRQSTATUS_MPU_OFFSET);
}
static int omap2_i2c_active(void)
{
u32 l;
- l = cm_read_mod_reg(CORE_MOD, CM_FCLKEN1);
+ l = omap2_cm_read_mod_reg(CORE_MOD, CM_FCLKEN1);
return l & (OMAP2420_EN_I2C2_MASK | OMAP2420_EN_I2C1_MASK);
}
@@ -186,13 +186,13 @@ static int omap2_allow_mpu_retention(void)
u32 l;
/* Check for MMC, UART2, UART1, McSPI2, McSPI1 and DSS1. */
- l = cm_read_mod_reg(CORE_MOD, CM_FCLKEN1);
+ l = omap2_cm_read_mod_reg(CORE_MOD, CM_FCLKEN1);
if (l & (OMAP2420_EN_MMC_MASK | OMAP24XX_EN_UART2_MASK |
OMAP24XX_EN_UART1_MASK | OMAP24XX_EN_MCSPI2_MASK |
OMAP24XX_EN_MCSPI1_MASK | OMAP24XX_EN_DSS1_MASK))
return 0;
/* Check for UART3. */
- l = cm_read_mod_reg(CORE_MOD, OMAP24XX_CM_FCLKEN2);
+ l = omap2_cm_read_mod_reg(CORE_MOD, OMAP24XX_CM_FCLKEN2);
if (l & OMAP24XX_EN_UART3_MASK)
return 0;
if (sti_console_enabled)
@@ -215,18 +215,18 @@ static void omap2_enter_mpu_retention(void)
* it is in retention mode. */
if (omap2_allow_mpu_retention()) {
/* REVISIT: These write to reserved bits? */
- prm_write_mod_reg(0xffffffff, CORE_MOD, PM_WKST1);
- prm_write_mod_reg(0xffffffff, CORE_MOD, OMAP24XX_PM_WKST2);
- prm_write_mod_reg(0xffffffff, WKUP_MOD, PM_WKST);
+ omap2_prm_write_mod_reg(0xffffffff, CORE_MOD, PM_WKST1);
+ omap2_prm_write_mod_reg(0xffffffff, CORE_MOD, OMAP24XX_PM_WKST2);
+ omap2_prm_write_mod_reg(0xffffffff, WKUP_MOD, PM_WKST);
/* Try to enter MPU retention */
- prm_write_mod_reg((0x01 << OMAP_POWERSTATE_SHIFT) |
+ omap2_prm_write_mod_reg((0x01 << OMAP_POWERSTATE_SHIFT) |
OMAP_LOGICRETSTATE_MASK,
MPU_MOD, OMAP2_PM_PWSTCTRL);
} else {
/* Block MPU retention */
- prm_write_mod_reg(OMAP_LOGICRETSTATE_MASK, MPU_MOD,
+ omap2_prm_write_mod_reg(OMAP_LOGICRETSTATE_MASK, MPU_MOD,
OMAP2_PM_PWSTCTRL);
only_idle = 1;
}
@@ -295,9 +295,9 @@ static int omap2_pm_suspend(void)
{
u32 wken_wkup, mir1;
- wken_wkup = prm_read_mod_reg(WKUP_MOD, PM_WKEN);
+ wken_wkup = omap2_prm_read_mod_reg(WKUP_MOD, PM_WKEN);
wken_wkup &= ~OMAP24XX_EN_GPT1_MASK;
- prm_write_mod_reg(wken_wkup, WKUP_MOD, PM_WKEN);
+ omap2_prm_write_mod_reg(wken_wkup, WKUP_MOD, PM_WKEN);
/* Mask GPT1 */
mir1 = omap_readl(0x480fe0a4);
@@ -307,7 +307,7 @@ static int omap2_pm_suspend(void)
omap2_enter_full_retention();
omap_writel(mir1, 0x480fe0a4);
- prm_write_mod_reg(wken_wkup, WKUP_MOD, PM_WKEN);
+ omap2_prm_write_mod_reg(wken_wkup, WKUP_MOD, PM_WKEN);
return 0;
}
@@ -360,7 +360,7 @@ static void __init prcm_setup_regs(void)
struct powerdomain *pwrdm;
/* Enable autoidle */
- prm_write_mod_reg(OMAP24XX_AUTOIDLE_MASK, OCP_MOD,
+ omap2_prm_write_mod_reg(OMAP24XX_AUTOIDLE_MASK, OCP_MOD,
OMAP2_PRCM_SYSCONFIG_OFFSET);
/*
@@ -399,87 +399,87 @@ static void __init prcm_setup_regs(void)
clkdm_add_wkdep(mpu_clkdm, wkup_clkdm);
/* Enable clock autoidle for all domains */
- cm_write_mod_reg(OMAP24XX_AUTO_CAM_MASK |
- OMAP24XX_AUTO_MAILBOXES_MASK |
- OMAP24XX_AUTO_WDT4_MASK |
- OMAP2420_AUTO_WDT3_MASK |
- OMAP24XX_AUTO_MSPRO_MASK |
- OMAP2420_AUTO_MMC_MASK |
- OMAP24XX_AUTO_FAC_MASK |
- OMAP2420_AUTO_EAC_MASK |
- OMAP24XX_AUTO_HDQ_MASK |
- OMAP24XX_AUTO_UART2_MASK |
- OMAP24XX_AUTO_UART1_MASK |
- OMAP24XX_AUTO_I2C2_MASK |
- OMAP24XX_AUTO_I2C1_MASK |
- OMAP24XX_AUTO_MCSPI2_MASK |
- OMAP24XX_AUTO_MCSPI1_MASK |
- OMAP24XX_AUTO_MCBSP2_MASK |
- OMAP24XX_AUTO_MCBSP1_MASK |
- OMAP24XX_AUTO_GPT12_MASK |
- OMAP24XX_AUTO_GPT11_MASK |
- OMAP24XX_AUTO_GPT10_MASK |
- OMAP24XX_AUTO_GPT9_MASK |
- OMAP24XX_AUTO_GPT8_MASK |
- OMAP24XX_AUTO_GPT7_MASK |
- OMAP24XX_AUTO_GPT6_MASK |
- OMAP24XX_AUTO_GPT5_MASK |
- OMAP24XX_AUTO_GPT4_MASK |
- OMAP24XX_AUTO_GPT3_MASK |
- OMAP24XX_AUTO_GPT2_MASK |
- OMAP2420_AUTO_VLYNQ_MASK |
- OMAP24XX_AUTO_DSS_MASK,
- CORE_MOD, CM_AUTOIDLE1);
- cm_write_mod_reg(OMAP24XX_AUTO_UART3_MASK |
- OMAP24XX_AUTO_SSI_MASK |
- OMAP24XX_AUTO_USB_MASK,
- CORE_MOD, CM_AUTOIDLE2);
- cm_write_mod_reg(OMAP24XX_AUTO_SDRC_MASK |
- OMAP24XX_AUTO_GPMC_MASK |
- OMAP24XX_AUTO_SDMA_MASK,
- CORE_MOD, CM_AUTOIDLE3);
- cm_write_mod_reg(OMAP24XX_AUTO_PKA_MASK |
- OMAP24XX_AUTO_AES_MASK |
- OMAP24XX_AUTO_RNG_MASK |
- OMAP24XX_AUTO_SHA_MASK |
- OMAP24XX_AUTO_DES_MASK,
- CORE_MOD, OMAP24XX_CM_AUTOIDLE4);
-
- cm_write_mod_reg(OMAP2420_AUTO_DSP_IPI_MASK, OMAP24XX_DSP_MOD,
- CM_AUTOIDLE);
+ omap2_cm_write_mod_reg(OMAP24XX_AUTO_CAM_MASK |
+ OMAP24XX_AUTO_MAILBOXES_MASK |
+ OMAP24XX_AUTO_WDT4_MASK |
+ OMAP2420_AUTO_WDT3_MASK |
+ OMAP24XX_AUTO_MSPRO_MASK |
+ OMAP2420_AUTO_MMC_MASK |
+ OMAP24XX_AUTO_FAC_MASK |
+ OMAP2420_AUTO_EAC_MASK |
+ OMAP24XX_AUTO_HDQ_MASK |
+ OMAP24XX_AUTO_UART2_MASK |
+ OMAP24XX_AUTO_UART1_MASK |
+ OMAP24XX_AUTO_I2C2_MASK |
+ OMAP24XX_AUTO_I2C1_MASK |
+ OMAP24XX_AUTO_MCSPI2_MASK |
+ OMAP24XX_AUTO_MCSPI1_MASK |
+ OMAP24XX_AUTO_MCBSP2_MASK |
+ OMAP24XX_AUTO_MCBSP1_MASK |
+ OMAP24XX_AUTO_GPT12_MASK |
+ OMAP24XX_AUTO_GPT11_MASK |
+ OMAP24XX_AUTO_GPT10_MASK |
+ OMAP24XX_AUTO_GPT9_MASK |
+ OMAP24XX_AUTO_GPT8_MASK |
+ OMAP24XX_AUTO_GPT7_MASK |
+ OMAP24XX_AUTO_GPT6_MASK |
+ OMAP24XX_AUTO_GPT5_MASK |
+ OMAP24XX_AUTO_GPT4_MASK |
+ OMAP24XX_AUTO_GPT3_MASK |
+ OMAP24XX_AUTO_GPT2_MASK |
+ OMAP2420_AUTO_VLYNQ_MASK |
+ OMAP24XX_AUTO_DSS_MASK,
+ CORE_MOD, CM_AUTOIDLE1);
+ omap2_cm_write_mod_reg(OMAP24XX_AUTO_UART3_MASK |
+ OMAP24XX_AUTO_SSI_MASK |
+ OMAP24XX_AUTO_USB_MASK,
+ CORE_MOD, CM_AUTOIDLE2);
+ omap2_cm_write_mod_reg(OMAP24XX_AUTO_SDRC_MASK |
+ OMAP24XX_AUTO_GPMC_MASK |
+ OMAP24XX_AUTO_SDMA_MASK,
+ CORE_MOD, CM_AUTOIDLE3);
+ omap2_cm_write_mod_reg(OMAP24XX_AUTO_PKA_MASK |
+ OMAP24XX_AUTO_AES_MASK |
+ OMAP24XX_AUTO_RNG_MASK |
+ OMAP24XX_AUTO_SHA_MASK |
+ OMAP24XX_AUTO_DES_MASK,
+ CORE_MOD, OMAP24XX_CM_AUTOIDLE4);
+
+ omap2_cm_write_mod_reg(OMAP2420_AUTO_DSP_IPI_MASK, OMAP24XX_DSP_MOD,
+ CM_AUTOIDLE);
/* Put DPLL and both APLLs into autoidle mode */
- cm_write_mod_reg((0x03 << OMAP24XX_AUTO_DPLL_SHIFT) |
- (0x03 << OMAP24XX_AUTO_96M_SHIFT) |
- (0x03 << OMAP24XX_AUTO_54M_SHIFT),
- PLL_MOD, CM_AUTOIDLE);
-
- cm_write_mod_reg(OMAP24XX_AUTO_OMAPCTRL_MASK |
- OMAP24XX_AUTO_WDT1_MASK |
- OMAP24XX_AUTO_MPU_WDT_MASK |
- OMAP24XX_AUTO_GPIOS_MASK |
- OMAP24XX_AUTO_32KSYNC_MASK |
- OMAP24XX_AUTO_GPT1_MASK,
- WKUP_MOD, CM_AUTOIDLE);
+ omap2_cm_write_mod_reg((0x03 << OMAP24XX_AUTO_DPLL_SHIFT) |
+ (0x03 << OMAP24XX_AUTO_96M_SHIFT) |
+ (0x03 << OMAP24XX_AUTO_54M_SHIFT),
+ PLL_MOD, CM_AUTOIDLE);
+
+ omap2_cm_write_mod_reg(OMAP24XX_AUTO_OMAPCTRL_MASK |
+ OMAP24XX_AUTO_WDT1_MASK |
+ OMAP24XX_AUTO_MPU_WDT_MASK |
+ OMAP24XX_AUTO_GPIOS_MASK |
+ OMAP24XX_AUTO_32KSYNC_MASK |
+ OMAP24XX_AUTO_GPT1_MASK,
+ WKUP_MOD, CM_AUTOIDLE);
/* REVISIT: Configure number of 32 kHz clock cycles for sys_clk
* stabilisation */
- prm_write_mod_reg(15 << OMAP_SETUP_TIME_SHIFT, OMAP24XX_GR_MOD,
- OMAP2_PRCM_CLKSSETUP_OFFSET);
+ omap2_prm_write_mod_reg(15 << OMAP_SETUP_TIME_SHIFT, OMAP24XX_GR_MOD,
+ OMAP2_PRCM_CLKSSETUP_OFFSET);
/* Configure automatic voltage transition */
- prm_write_mod_reg(2 << OMAP_SETUP_TIME_SHIFT, OMAP24XX_GR_MOD,
- OMAP2_PRCM_VOLTSETUP_OFFSET);
- prm_write_mod_reg(OMAP24XX_AUTO_EXTVOLT_MASK |
- (0x1 << OMAP24XX_SETOFF_LEVEL_SHIFT) |
- OMAP24XX_MEMRETCTRL_MASK |
- (0x1 << OMAP24XX_SETRET_LEVEL_SHIFT) |
- (0x0 << OMAP24XX_VOLT_LEVEL_SHIFT),
- OMAP24XX_GR_MOD, OMAP2_PRCM_VOLTCTRL_OFFSET);
+ omap2_prm_write_mod_reg(2 << OMAP_SETUP_TIME_SHIFT, OMAP24XX_GR_MOD,
+ OMAP2_PRCM_VOLTSETUP_OFFSET);
+ omap2_prm_write_mod_reg(OMAP24XX_AUTO_EXTVOLT_MASK |
+ (0x1 << OMAP24XX_SETOFF_LEVEL_SHIFT) |
+ OMAP24XX_MEMRETCTRL_MASK |
+ (0x1 << OMAP24XX_SETRET_LEVEL_SHIFT) |
+ (0x0 << OMAP24XX_VOLT_LEVEL_SHIFT),
+ OMAP24XX_GR_MOD, OMAP2_PRCM_VOLTCTRL_OFFSET);
/* Enable wake-up events */
- prm_write_mod_reg(OMAP24XX_EN_GPIOS_MASK | OMAP24XX_EN_GPT1_MASK,
- WKUP_MOD, PM_WKEN);
+ omap2_prm_write_mod_reg(OMAP24XX_EN_GPIOS_MASK | OMAP24XX_EN_GPT1_MASK,
+ WKUP_MOD, PM_WKEN);
}
static int __init omap2_pm_init(void)
@@ -490,7 +490,7 @@ static int __init omap2_pm_init(void)
return -ENODEV;
printk(KERN_INFO "Power Management for OMAP2 initializing\n");
- l = prm_read_mod_reg(OCP_MOD, OMAP2_PRCM_REVISION_OFFSET);
+ l = omap2_prm_read_mod_reg(OCP_MOD, OMAP2_PRCM_REVISION_OFFSET);
printk(KERN_INFO "PRCM revision %d.%d\n", (l >> 4) & 0x0f, l & 0x0f);
/* Look up important powerdomains */
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index a776241..8ea8051 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -89,12 +89,12 @@ static void omap3_enable_io_chain(void)
int timeout = 0;
if (omap_rev() >= OMAP3430_REV_ES3_1) {
- prm_set_mod_reg_bits(OMAP3430_EN_IO_CHAIN_MASK, WKUP_MOD,
+ omap2_prm_set_mod_reg_bits(OMAP3430_EN_IO_CHAIN_MASK, WKUP_MOD,
PM_WKEN);
/* Do a readback to assure write has been done */
- prm_read_mod_reg(WKUP_MOD, PM_WKEN);
+ omap2_prm_read_mod_reg(WKUP_MOD, PM_WKEN);
- while (!(prm_read_mod_reg(WKUP_MOD, PM_WKEN) &
+ while (!(omap2_prm_read_mod_reg(WKUP_MOD, PM_WKEN) &
OMAP3430_ST_IO_CHAIN_MASK)) {
timeout++;
if (timeout > 1000) {
@@ -102,7 +102,7 @@ static void omap3_enable_io_chain(void)
"activation failed.\n");
return;
}
- prm_set_mod_reg_bits(OMAP3430_ST_IO_CHAIN_MASK,
+ omap2_prm_set_mod_reg_bits(OMAP3430_ST_IO_CHAIN_MASK,
WKUP_MOD, PM_WKEN);
}
}
@@ -111,7 +111,7 @@ static void omap3_enable_io_chain(void)
static void omap3_disable_io_chain(void)
{
if (omap_rev() >= OMAP3430_REV_ES3_1)
- prm_clear_mod_reg_bits(OMAP3430_EN_IO_CHAIN_MASK, WKUP_MOD,
+ omap2_prm_clear_mod_reg_bits(OMAP3430_EN_IO_CHAIN_MASK, WKUP_MOD,
PM_WKEN);
}
@@ -205,27 +205,27 @@ static int prcm_clear_mod_irqs(s16 module, u8 regs)
OMAP3430ES2_PM_MPUGRPSEL3 : OMAP3430_PM_MPUGRPSEL;
int c = 0;
- wkst = prm_read_mod_reg(module, wkst_off);
- wkst &= prm_read_mod_reg(module, grpsel_off);
+ wkst = omap2_prm_read_mod_reg(module, wkst_off);
+ wkst &= omap2_prm_read_mod_reg(module, grpsel_off);
if (wkst) {
- iclk = cm_read_mod_reg(module, iclk_off);
- fclk = cm_read_mod_reg(module, fclk_off);
+ iclk = omap2_cm_read_mod_reg(module, iclk_off);
+ fclk = omap2_cm_read_mod_reg(module, fclk_off);
while (wkst) {
clken = wkst;
- cm_set_mod_reg_bits(clken, module, iclk_off);
+ omap2_cm_set_mod_reg_bits(clken, module, iclk_off);
/*
* For USBHOST, we don't know whether HOST1 or
* HOST2 woke us up, so enable both f-clocks
*/
if (module == OMAP3430ES2_USBHOST_MOD)
clken |= 1 << OMAP3430ES2_EN_USBHOST2_SHIFT;
- cm_set_mod_reg_bits(clken, module, fclk_off);
- prm_write_mod_reg(wkst, module, wkst_off);
- wkst = prm_read_mod_reg(module, wkst_off);
+ omap2_cm_set_mod_reg_bits(clken, module, fclk_off);
+ omap2_prm_write_mod_reg(wkst, module, wkst_off);
+ wkst = omap2_prm_read_mod_reg(module, wkst_off);
c++;
}
- cm_write_mod_reg(iclk, module, iclk_off);
- cm_write_mod_reg(fclk, module, fclk_off);
+ omap2_cm_write_mod_reg(iclk, module, iclk_off);
+ omap2_cm_write_mod_reg(fclk, module, fclk_off);
}
return c;
@@ -268,9 +268,9 @@ static irqreturn_t prcm_interrupt_handler (int irq, void *dev_id)
u32 irqenable_mpu, irqstatus_mpu;
int c = 0;
- irqenable_mpu = prm_read_mod_reg(OCP_MOD,
+ irqenable_mpu = omap2_prm_read_mod_reg(OCP_MOD,
OMAP3_PRM_IRQENABLE_MPU_OFFSET);
- irqstatus_mpu = prm_read_mod_reg(OCP_MOD,
+ irqstatus_mpu = omap2_prm_read_mod_reg(OCP_MOD,
OMAP3_PRM_IRQSTATUS_MPU_OFFSET);
irqstatus_mpu &= irqenable_mpu;
@@ -291,10 +291,10 @@ static irqreturn_t prcm_interrupt_handler (int irq, void *dev_id)
"no code to handle it (%08x)\n", irqstatus_mpu);
}
- prm_write_mod_reg(irqstatus_mpu, OCP_MOD,
+ omap2_prm_write_mod_reg(irqstatus_mpu, OCP_MOD,
OMAP3_PRM_IRQSTATUS_MPU_OFFSET);
- irqstatus_mpu = prm_read_mod_reg(OCP_MOD,
+ irqstatus_mpu = omap2_prm_read_mod_reg(OCP_MOD,
OMAP3_PRM_IRQSTATUS_MPU_OFFSET);
irqstatus_mpu &= irqenable_mpu;
@@ -382,7 +382,7 @@ void omap_sram_idle(void)
if (omap3_has_io_wakeup() &&
(per_next_state < PWRDM_POWER_ON ||
core_next_state < PWRDM_POWER_ON)) {
- prm_set_mod_reg_bits(OMAP3430_EN_IO_MASK, WKUP_MOD, PM_WKEN);
+ omap2_prm_set_mod_reg_bits(OMAP3430_EN_IO_MASK, WKUP_MOD, PM_WKEN);
omap3_enable_io_chain();
}
@@ -454,7 +454,7 @@ void omap_sram_idle(void)
omap_uart_resume_idle(0);
omap_uart_resume_idle(1);
if (core_next_state == PWRDM_POWER_OFF)
- prm_clear_mod_reg_bits(OMAP3430_AUTO_OFF_MASK,
+ omap2_prm_clear_mod_reg_bits(OMAP3430_AUTO_OFF_MASK,
OMAP3430_GR_MOD,
OMAP3_PRM_VOLTCTRL_OFFSET);
}
@@ -477,7 +477,8 @@ console_still_active:
if (omap3_has_io_wakeup() &&
(per_next_state < PWRDM_POWER_ON ||
core_next_state < PWRDM_POWER_ON)) {
- prm_clear_mod_reg_bits(OMAP3430_EN_IO_MASK, WKUP_MOD, PM_WKEN);
+ omap2_prm_clear_mod_reg_bits(OMAP3430_EN_IO_MASK, WKUP_MOD,
+ PM_WKEN);
omap3_disable_io_chain();
}
@@ -628,21 +629,21 @@ static struct platform_suspend_ops omap_pm_ops = {
static void __init omap3_iva_idle(void)
{
/* ensure IVA2 clock is disabled */
- cm_write_mod_reg(0, OMAP3430_IVA2_MOD, CM_FCLKEN);
+ omap2_cm_write_mod_reg(0, OMAP3430_IVA2_MOD, CM_FCLKEN);
/* if no clock activity, nothing else to do */
- if (!(cm_read_mod_reg(OMAP3430_IVA2_MOD, OMAP3430_CM_CLKSTST) &
+ if (!(omap2_cm_read_mod_reg(OMAP3430_IVA2_MOD, OMAP3430_CM_CLKSTST) &
OMAP3430_CLKACTIVITY_IVA2_MASK))
return;
/* Reset IVA2 */
- prm_write_mod_reg(OMAP3430_RST1_IVA2_MASK |
+ omap2_prm_write_mod_reg(OMAP3430_RST1_IVA2_MASK |
OMAP3430_RST2_IVA2_MASK |
OMAP3430_RST3_IVA2_MASK,
OMAP3430_IVA2_MOD, OMAP2_RM_RSTCTRL);
/* Enable IVA2 clock */
- cm_write_mod_reg(OMAP3430_CM_FCLKEN_IVA2_EN_IVA2_MASK,
+ omap2_cm_write_mod_reg(OMAP3430_CM_FCLKEN_IVA2_EN_IVA2_MASK,
OMAP3430_IVA2_MOD, CM_FCLKEN);
/* Set IVA2 boot mode to 'idle' */
@@ -650,13 +651,13 @@ static void __init omap3_iva_idle(void)
OMAP343X_CONTROL_IVA2_BOOTMOD);
/* Un-reset IVA2 */
- prm_write_mod_reg(0, OMAP3430_IVA2_MOD, OMAP2_RM_RSTCTRL);
+ omap2_prm_write_mod_reg(0, OMAP3430_IVA2_MOD, OMAP2_RM_RSTCTRL);
/* Disable IVA2 clock */
- cm_write_mod_reg(0, OMAP3430_IVA2_MOD, CM_FCLKEN);
+ omap2_cm_write_mod_reg(0, OMAP3430_IVA2_MOD, CM_FCLKEN);
/* Reset IVA2 */
- prm_write_mod_reg(OMAP3430_RST1_IVA2_MASK |
+ omap2_prm_write_mod_reg(OMAP3430_RST1_IVA2_MASK |
OMAP3430_RST2_IVA2_MASK |
OMAP3430_RST3_IVA2_MASK,
OMAP3430_IVA2_MOD, OMAP2_RM_RSTCTRL);
@@ -680,10 +681,10 @@ static void __init omap3_d2d_idle(void)
omap_ctrl_writew(padconf, OMAP3_PADCONF_SAD2D_IDLEACK);
/* reset modem */
- prm_write_mod_reg(OMAP3430_RM_RSTCTRL_CORE_MODEM_SW_RSTPWRON_MASK |
+ omap2_prm_write_mod_reg(OMAP3430_RM_RSTCTRL_CORE_MODEM_SW_RSTPWRON_MASK |
OMAP3430_RM_RSTCTRL_CORE_MODEM_SW_RST_MASK,
CORE_MOD, OMAP2_RM_RSTCTRL);
- prm_write_mod_reg(0, CORE_MOD, OMAP2_RM_RSTCTRL);
+ omap2_prm_write_mod_reg(0, CORE_MOD, OMAP2_RM_RSTCTRL);
}
static void __init prcm_setup_regs(void)
@@ -698,23 +699,23 @@ static void __init prcm_setup_regs(void)
/* XXX Reset all wkdeps. This should be done when initializing
* powerdomains */
- prm_write_mod_reg(0, OMAP3430_IVA2_MOD, PM_WKDEP);
- prm_write_mod_reg(0, MPU_MOD, PM_WKDEP);
- prm_write_mod_reg(0, OMAP3430_DSS_MOD, PM_WKDEP);
- prm_write_mod_reg(0, OMAP3430_NEON_MOD, PM_WKDEP);
- prm_write_mod_reg(0, OMAP3430_CAM_MOD, PM_WKDEP);
- prm_write_mod_reg(0, OMAP3430_PER_MOD, PM_WKDEP);
+ omap2_prm_write_mod_reg(0, OMAP3430_IVA2_MOD, PM_WKDEP);
+ omap2_prm_write_mod_reg(0, MPU_MOD, PM_WKDEP);
+ omap2_prm_write_mod_reg(0, OMAP3430_DSS_MOD, PM_WKDEP);
+ omap2_prm_write_mod_reg(0, OMAP3430_NEON_MOD, PM_WKDEP);
+ omap2_prm_write_mod_reg(0, OMAP3430_CAM_MOD, PM_WKDEP);
+ omap2_prm_write_mod_reg(0, OMAP3430_PER_MOD, PM_WKDEP);
if (omap_rev() > OMAP3430_REV_ES1_0) {
- prm_write_mod_reg(0, OMAP3430ES2_SGX_MOD, PM_WKDEP);
- prm_write_mod_reg(0, OMAP3430ES2_USBHOST_MOD, PM_WKDEP);
+ omap2_prm_write_mod_reg(0, OMAP3430ES2_SGX_MOD, PM_WKDEP);
+ omap2_prm_write_mod_reg(0, OMAP3430ES2_USBHOST_MOD, PM_WKDEP);
} else
- prm_write_mod_reg(0, GFX_MOD, PM_WKDEP);
+ omap2_prm_write_mod_reg(0, GFX_MOD, PM_WKDEP);
/*
* Enable interface clock autoidle for all modules.
* Note that in the long run this should be done by clockfw
*/
- cm_write_mod_reg(
+ omap2_cm_write_mod_reg(
OMAP3430_AUTO_MODEM_MASK |
OMAP3430ES2_AUTO_MMC3_MASK |
OMAP3430ES2_AUTO_ICR_MASK |
@@ -747,7 +748,7 @@ static void __init prcm_setup_regs(void)
OMAP3430_AUTO_SSI_MASK,
CORE_MOD, CM_AUTOIDLE1);
- cm_write_mod_reg(
+ omap2_cm_write_mod_reg(
OMAP3430_AUTO_PKA_MASK |
OMAP3430_AUTO_AES1_MASK |
OMAP3430_AUTO_RNG_MASK |
@@ -756,13 +757,13 @@ static void __init prcm_setup_regs(void)
CORE_MOD, CM_AUTOIDLE2);
if (omap_rev() > OMAP3430_REV_ES1_0) {
- cm_write_mod_reg(
+ omap2_cm_write_mod_reg(
OMAP3430_AUTO_MAD2D_MASK |
OMAP3430ES2_AUTO_USBTLL_MASK,
CORE_MOD, CM_AUTOIDLE3);
}
- cm_write_mod_reg(
+ omap2_cm_write_mod_reg(
OMAP3430_AUTO_WDT2_MASK |
OMAP3430_AUTO_WDT1_MASK |
OMAP3430_AUTO_GPIO1_MASK |
@@ -771,17 +772,17 @@ static void __init prcm_setup_regs(void)
OMAP3430_AUTO_GPT1_MASK,
WKUP_MOD, CM_AUTOIDLE);
- cm_write_mod_reg(
+ omap2_cm_write_mod_reg(
OMAP3430_AUTO_DSS_MASK,
OMAP3430_DSS_MOD,
CM_AUTOIDLE);
- cm_write_mod_reg(
+ omap2_cm_write_mod_reg(
OMAP3430_AUTO_CAM_MASK,
OMAP3430_CAM_MOD,
CM_AUTOIDLE);
- cm_write_mod_reg(
+ omap2_cm_write_mod_reg(
omap3630_auto_uart4_mask |
OMAP3430_AUTO_GPIO6_MASK |
OMAP3430_AUTO_GPIO5_MASK |
@@ -805,7 +806,7 @@ static void __init prcm_setup_regs(void)
CM_AUTOIDLE);
if (omap_rev() > OMAP3430_REV_ES1_0) {
- cm_write_mod_reg(
+ omap2_cm_write_mod_reg(
OMAP3430ES2_AUTO_USBHOST_MASK,
OMAP3430ES2_USBHOST_MOD,
CM_AUTOIDLE);
@@ -817,16 +818,16 @@ static void __init prcm_setup_regs(void)
* Set all plls to autoidle. This is needed until autoidle is
* enabled by clockfw
*/
- cm_write_mod_reg(1 << OMAP3430_AUTO_IVA2_DPLL_SHIFT,
+ omap2_cm_write_mod_reg(1 << OMAP3430_AUTO_IVA2_DPLL_SHIFT,
OMAP3430_IVA2_MOD, CM_AUTOIDLE2);
- cm_write_mod_reg(1 << OMAP3430_AUTO_MPU_DPLL_SHIFT,
+ omap2_cm_write_mod_reg(1 << OMAP3430_AUTO_MPU_DPLL_SHIFT,
MPU_MOD,
CM_AUTOIDLE2);
- cm_write_mod_reg((1 << OMAP3430_AUTO_PERIPH_DPLL_SHIFT) |
+ omap2_cm_write_mod_reg((1 << OMAP3430_AUTO_PERIPH_DPLL_SHIFT) |
(1 << OMAP3430_AUTO_CORE_DPLL_SHIFT),
PLL_MOD,
CM_AUTOIDLE);
- cm_write_mod_reg(1 << OMAP3430ES2_AUTO_PERIPH2_DPLL_SHIFT,
+ omap2_cm_write_mod_reg(1 << OMAP3430ES2_AUTO_PERIPH2_DPLL_SHIFT,
PLL_MOD,
CM_AUTOIDLE2);
@@ -835,31 +836,31 @@ static void __init prcm_setup_regs(void)
* sys_clkreq. In the long run clock framework should
* take care of this.
*/
- prm_rmw_mod_reg_bits(OMAP_AUTOEXTCLKMODE_MASK,
+ omap2_prm_rmw_mod_reg_bits(OMAP_AUTOEXTCLKMODE_MASK,
1 << OMAP_AUTOEXTCLKMODE_SHIFT,
OMAP3430_GR_MOD,
OMAP3_PRM_CLKSRC_CTRL_OFFSET);
/* setup wakup source */
- prm_write_mod_reg(OMAP3430_EN_IO_MASK | OMAP3430_EN_GPIO1_MASK |
+ omap2_prm_write_mod_reg(OMAP3430_EN_IO_MASK | OMAP3430_EN_GPIO1_MASK |
OMAP3430_EN_GPT1_MASK | OMAP3430_EN_GPT12_MASK,
WKUP_MOD, PM_WKEN);
/* No need to write EN_IO, that is always enabled */
- prm_write_mod_reg(OMAP3430_GRPSEL_GPIO1_MASK |
+ omap2_prm_write_mod_reg(OMAP3430_GRPSEL_GPIO1_MASK |
OMAP3430_GRPSEL_GPT1_MASK |
OMAP3430_GRPSEL_GPT12_MASK,
WKUP_MOD, OMAP3430_PM_MPUGRPSEL);
/* For some reason IO doesn't generate wakeup event even if
* it is selected to mpu wakeup goup */
- prm_write_mod_reg(OMAP3430_IO_EN_MASK | OMAP3430_WKUP_EN_MASK,
+ omap2_prm_write_mod_reg(OMAP3430_IO_EN_MASK | OMAP3430_WKUP_EN_MASK,
OCP_MOD, OMAP3_PRM_IRQENABLE_MPU_OFFSET);
/* Enable PM_WKEN to support DSS LPR */
- prm_write_mod_reg(OMAP3430_PM_WKEN_DSS_EN_DSS_MASK,
+ omap2_prm_write_mod_reg(OMAP3430_PM_WKEN_DSS_EN_DSS_MASK,
OMAP3430_DSS_MOD, PM_WKEN);
/* Enable wakeups in PER */
- prm_write_mod_reg(omap3630_en_uart4_mask |
+ omap2_prm_write_mod_reg(omap3630_en_uart4_mask |
OMAP3430_EN_GPIO2_MASK | OMAP3430_EN_GPIO3_MASK |
OMAP3430_EN_GPIO4_MASK | OMAP3430_EN_GPIO5_MASK |
OMAP3430_EN_GPIO6_MASK | OMAP3430_EN_UART3_MASK |
@@ -867,7 +868,7 @@ static void __init prcm_setup_regs(void)
OMAP3430_EN_MCBSP4_MASK,
OMAP3430_PER_MOD, PM_WKEN);
/* and allow them to wake up MPU */
- prm_write_mod_reg(omap3630_grpsel_uart4_mask |
+ omap2_prm_write_mod_reg(omap3630_grpsel_uart4_mask |
OMAP3430_GRPSEL_GPIO2_MASK |
OMAP3430_GRPSEL_GPIO3_MASK |
OMAP3430_GRPSEL_GPIO4_MASK |
@@ -880,22 +881,22 @@ static void __init prcm_setup_regs(void)
OMAP3430_PER_MOD, OMAP3430_PM_MPUGRPSEL);
/* Don't attach IVA interrupts */
- prm_write_mod_reg(0, WKUP_MOD, OMAP3430_PM_IVAGRPSEL);
- prm_write_mod_reg(0, CORE_MOD, OMAP3430_PM_IVAGRPSEL1);
- prm_write_mod_reg(0, CORE_MOD, OMAP3430ES2_PM_IVAGRPSEL3);
- prm_write_mod_reg(0, OMAP3430_PER_MOD, OMAP3430_PM_IVAGRPSEL);
+ omap2_prm_write_mod_reg(0, WKUP_MOD, OMAP3430_PM_IVAGRPSEL);
+ omap2_prm_write_mod_reg(0, CORE_MOD, OMAP3430_PM_IVAGRPSEL1);
+ omap2_prm_write_mod_reg(0, CORE_MOD, OMAP3430ES2_PM_IVAGRPSEL3);
+ omap2_prm_write_mod_reg(0, OMAP3430_PER_MOD, OMAP3430_PM_IVAGRPSEL);
/* Clear any pending 'reset' flags */
- prm_write_mod_reg(0xffffffff, MPU_MOD, OMAP2_RM_RSTST);
- prm_write_mod_reg(0xffffffff, CORE_MOD, OMAP2_RM_RSTST);
- prm_write_mod_reg(0xffffffff, OMAP3430_PER_MOD, OMAP2_RM_RSTST);
- prm_write_mod_reg(0xffffffff, OMAP3430_EMU_MOD, OMAP2_RM_RSTST);
- prm_write_mod_reg(0xffffffff, OMAP3430_NEON_MOD, OMAP2_RM_RSTST);
- prm_write_mod_reg(0xffffffff, OMAP3430_DSS_MOD, OMAP2_RM_RSTST);
- prm_write_mod_reg(0xffffffff, OMAP3430ES2_USBHOST_MOD, OMAP2_RM_RSTST);
+ omap2_prm_write_mod_reg(0xffffffff, MPU_MOD, OMAP2_RM_RSTST);
+ omap2_prm_write_mod_reg(0xffffffff, CORE_MOD, OMAP2_RM_RSTST);
+ omap2_prm_write_mod_reg(0xffffffff, OMAP3430_PER_MOD, OMAP2_RM_RSTST);
+ omap2_prm_write_mod_reg(0xffffffff, OMAP3430_EMU_MOD, OMAP2_RM_RSTST);
+ omap2_prm_write_mod_reg(0xffffffff, OMAP3430_NEON_MOD, OMAP2_RM_RSTST);
+ omap2_prm_write_mod_reg(0xffffffff, OMAP3430_DSS_MOD, OMAP2_RM_RSTST);
+ omap2_prm_write_mod_reg(0xffffffff, OMAP3430ES2_USBHOST_MOD, OMAP2_RM_RSTST);
/* Clear any pending PRCM interrupts */
- prm_write_mod_reg(0, OCP_MOD, OMAP3_PRM_IRQSTATUS_MPU_OFFSET);
+ omap2_prm_write_mod_reg(0, OCP_MOD, OMAP3_PRM_IRQSTATUS_MPU_OFFSET);
omap3_iva_idle();
omap3_d2d_idle();
diff --git a/arch/arm/mach-omap2/powerdomain2xxx_3xxx.c b/arch/arm/mach-omap2/powerdomain2xxx_3xxx.c
index 838ac75..b5e9e4d 100644
--- a/arch/arm/mach-omap2/powerdomain2xxx_3xxx.c
+++ b/arch/arm/mach-omap2/powerdomain2xxx_3xxx.c
@@ -28,7 +28,7 @@
/* Common functions across OMAP2 and OMAP3 */
static int omap2_pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst)
{
- prm_rmw_mod_reg_bits(OMAP_POWERSTATE_MASK,
+ omap2_prm_rmw_mod_reg_bits(OMAP_POWERSTATE_MASK,
(pwrst << OMAP_POWERSTATE_SHIFT),
pwrdm->prcm_offs, OMAP2_PM_PWSTCTRL);
return 0;
@@ -36,14 +36,16 @@ static int omap2_pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst)
static int omap2_pwrdm_read_next_pwrst(struct powerdomain *pwrdm)
{
- return prm_read_mod_bits_shift(pwrdm->prcm_offs,
- OMAP2_PM_PWSTCTRL, OMAP_POWERSTATE_MASK);
+ return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs,
+ OMAP2_PM_PWSTCTRL,
+ OMAP_POWERSTATE_MASK);
}
static int omap2_pwrdm_read_pwrst(struct powerdomain *pwrdm)
{
- return prm_read_mod_bits_shift(pwrdm->prcm_offs,
- OMAP2_PM_PWSTST, OMAP_POWERSTATEST_MASK);
+ return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs,
+ OMAP2_PM_PWSTST,
+ OMAP_POWERSTATEST_MASK);
}
static int omap2_pwrdm_set_mem_onst(struct powerdomain *pwrdm, u8 bank,
@@ -53,8 +55,8 @@ static int omap2_pwrdm_set_mem_onst(struct powerdomain *pwrdm, u8 bank,
m = omap2_pwrdm_get_mem_bank_onstate_mask(bank);
- prm_rmw_mod_reg_bits(m, (pwrst << __ffs(m)), pwrdm->prcm_offs,
- OMAP2_PM_PWSTCTRL);
+ omap2_prm_rmw_mod_reg_bits(m, (pwrst << __ffs(m)), pwrdm->prcm_offs,
+ OMAP2_PM_PWSTCTRL);
return 0;
}
@@ -66,8 +68,8 @@ static int omap2_pwrdm_set_mem_retst(struct powerdomain *pwrdm, u8 bank,
m = omap2_pwrdm_get_mem_bank_retst_mask(bank);
- prm_rmw_mod_reg_bits(m, (pwrst << __ffs(m)), pwrdm->prcm_offs,
- OMAP2_PM_PWSTCTRL);
+ omap2_prm_rmw_mod_reg_bits(m, (pwrst << __ffs(m)), pwrdm->prcm_offs,
+ OMAP2_PM_PWSTCTRL);
return 0;
}
@@ -78,7 +80,8 @@ static int omap2_pwrdm_read_mem_pwrst(struct powerdomain *pwrdm, u8 bank)
m = omap2_pwrdm_get_mem_bank_stst_mask(bank);
- return prm_read_mod_bits_shift(pwrdm->prcm_offs, OMAP2_PM_PWSTST, m);
+ return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs, OMAP2_PM_PWSTST,
+ m);
}
static int omap2_pwrdm_read_mem_retst(struct powerdomain *pwrdm, u8 bank)
@@ -87,7 +90,8 @@ static int omap2_pwrdm_read_mem_retst(struct powerdomain *pwrdm, u8 bank)
m = omap2_pwrdm_get_mem_bank_retst_mask(bank);
- return prm_read_mod_bits_shift(pwrdm->prcm_offs, OMAP2_PM_PWSTCTRL, m);
+ return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs,
+ OMAP2_PM_PWSTCTRL, m);
}
static int omap2_pwrdm_set_logic_retst(struct powerdomain *pwrdm, u8 pwrst)
@@ -95,8 +99,8 @@ static int omap2_pwrdm_set_logic_retst(struct powerdomain *pwrdm, u8 pwrst)
u32 v;
v = pwrst << __ffs(OMAP3430_LOGICL1CACHERETSTATE_MASK);
- prm_rmw_mod_reg_bits(OMAP3430_LOGICL1CACHERETSTATE_MASK, v,
- pwrdm->prcm_offs, OMAP2_PM_PWSTCTRL);
+ omap2_prm_rmw_mod_reg_bits(OMAP3430_LOGICL1CACHERETSTATE_MASK, v,
+ pwrdm->prcm_offs, OMAP2_PM_PWSTCTRL);
return 0;
}
@@ -112,7 +116,7 @@ static int omap2_pwrdm_wait_transition(struct powerdomain *pwrdm)
*/
/* XXX Is this udelay() value meaningful? */
- while ((prm_read_mod_reg(pwrdm->prcm_offs, OMAP2_PM_PWSTST) &
+ while ((omap2_prm_read_mod_reg(pwrdm->prcm_offs, OMAP2_PM_PWSTST) &
OMAP_INTRANSITION_MASK) &&
(c++ < PWRDM_TRANSITION_BAILOUT))
udelay(1);
@@ -131,26 +135,30 @@ static int omap2_pwrdm_wait_transition(struct powerdomain *pwrdm)
/* Applicable only for OMAP3. Not supported on OMAP2 */
static int omap3_pwrdm_read_prev_pwrst(struct powerdomain *pwrdm)
{
- return prm_read_mod_bits_shift(pwrdm->prcm_offs, OMAP3430_PM_PREPWSTST,
- OMAP3430_LASTPOWERSTATEENTERED_MASK);
+ return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs,
+ OMAP3430_PM_PREPWSTST,
+ OMAP3430_LASTPOWERSTATEENTERED_MASK);
}
static int omap3_pwrdm_read_logic_pwrst(struct powerdomain *pwrdm)
{
- return prm_read_mod_bits_shift(pwrdm->prcm_offs, OMAP2_PM_PWSTST,
- OMAP3430_LOGICSTATEST_MASK);
+ return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs,
+ OMAP2_PM_PWSTST,
+ OMAP3430_LOGICSTATEST_MASK);
}
static int omap3_pwrdm_read_logic_retst(struct powerdomain *pwrdm)
{
- return prm_read_mod_bits_shift(pwrdm->prcm_offs, OMAP2_PM_PWSTCTRL,
- OMAP3430_LOGICSTATEST_MASK);
+ return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs,
+ OMAP2_PM_PWSTCTRL,
+ OMAP3430_LOGICSTATEST_MASK);
}
static int omap3_pwrdm_read_prev_logic_pwrst(struct powerdomain *pwrdm)
{
- return prm_read_mod_bits_shift(pwrdm->prcm_offs, OMAP3430_PM_PREPWSTST,
- OMAP3430_LASTLOGICSTATEENTERED_MASK);
+ return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs,
+ OMAP3430_PM_PREPWSTST,
+ OMAP3430_LASTLOGICSTATEENTERED_MASK);
}
static int omap3_get_mem_bank_lastmemst_mask(u8 bank)
@@ -177,26 +185,28 @@ static int omap3_pwrdm_read_prev_mem_pwrst(struct powerdomain *pwrdm, u8 bank)
m = omap3_get_mem_bank_lastmemst_mask(bank);
- return prm_read_mod_bits_shift(pwrdm->prcm_offs,
+ return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs,
OMAP3430_PM_PREPWSTST, m);
}
static int omap3_pwrdm_clear_all_prev_pwrst(struct powerdomain *pwrdm)
{
- prm_write_mod_reg(0, pwrdm->prcm_offs, OMAP3430_PM_PREPWSTST);
+ omap2_prm_write_mod_reg(0, pwrdm->prcm_offs, OMAP3430_PM_PREPWSTST);
return 0;
}
static int omap3_pwrdm_enable_hdwr_sar(struct powerdomain *pwrdm)
{
- return prm_rmw_mod_reg_bits(0, 1 << OMAP3430ES2_SAVEANDRESTORE_SHIFT,
- pwrdm->prcm_offs, OMAP2_PM_PWSTCTRL);
+ return omap2_prm_rmw_mod_reg_bits(0,
+ 1 << OMAP3430ES2_SAVEANDRESTORE_SHIFT,
+ pwrdm->prcm_offs, OMAP2_PM_PWSTCTRL);
}
static int omap3_pwrdm_disable_hdwr_sar(struct powerdomain *pwrdm)
{
- return prm_rmw_mod_reg_bits(1 << OMAP3430ES2_SAVEANDRESTORE_SHIFT, 0,
- pwrdm->prcm_offs, OMAP2_PM_PWSTCTRL);
+ return omap2_prm_rmw_mod_reg_bits(1 << OMAP3430ES2_SAVEANDRESTORE_SHIFT,
+ 0, pwrdm->prcm_offs,
+ OMAP2_PM_PWSTCTRL);
}
struct pwrdm_ops omap2_pwrdm_operations = {
diff --git a/arch/arm/mach-omap2/powerdomain44xx.c b/arch/arm/mach-omap2/powerdomain44xx.c
index dae767b..4c5ab1a 100644
--- a/arch/arm/mach-omap2/powerdomain44xx.c
+++ b/arch/arm/mach-omap2/powerdomain44xx.c
@@ -25,7 +25,7 @@
static int omap4_pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst)
{
- prm_rmw_mod_reg_bits(OMAP_POWERSTATE_MASK,
+ omap2_prm_rmw_mod_reg_bits(OMAP_POWERSTATE_MASK,
(pwrst << OMAP_POWERSTATE_SHIFT),
pwrdm->prcm_offs, OMAP4_PM_PWSTCTRL);
return 0;
@@ -33,25 +33,25 @@ static int omap4_pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst)
static int omap4_pwrdm_read_next_pwrst(struct powerdomain *pwrdm)
{
- return prm_read_mod_bits_shift(pwrdm->prcm_offs,
+ return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs,
OMAP4_PM_PWSTCTRL, OMAP_POWERSTATE_MASK);
}
static int omap4_pwrdm_read_pwrst(struct powerdomain *pwrdm)
{
- return prm_read_mod_bits_shift(pwrdm->prcm_offs,
+ return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs,
OMAP4_PM_PWSTST, OMAP_POWERSTATEST_MASK);
}
static int omap4_pwrdm_read_prev_pwrst(struct powerdomain *pwrdm)
{
- return prm_read_mod_bits_shift(pwrdm->prcm_offs, OMAP4_PM_PWSTST,
+ return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs, OMAP4_PM_PWSTST,
OMAP4430_LASTPOWERSTATEENTERED_MASK);
}
static int omap4_pwrdm_set_lowpwrstchange(struct powerdomain *pwrdm)
{
- prm_rmw_mod_reg_bits(OMAP4430_LOWPOWERSTATECHANGE_MASK,
+ omap2_prm_rmw_mod_reg_bits(OMAP4430_LOWPOWERSTATECHANGE_MASK,
(1 << OMAP4430_LOWPOWERSTATECHANGE_SHIFT),
pwrdm->prcm_offs, OMAP4_PM_PWSTCTRL);
return 0;
@@ -59,7 +59,7 @@ static int omap4_pwrdm_set_lowpwrstchange(struct powerdomain *pwrdm)
static int omap4_pwrdm_clear_all_prev_pwrst(struct powerdomain *pwrdm)
{
- prm_rmw_mod_reg_bits(OMAP4430_LASTPOWERSTATEENTERED_MASK,
+ omap2_prm_rmw_mod_reg_bits(OMAP4430_LASTPOWERSTATEENTERED_MASK,
OMAP4430_LASTPOWERSTATEENTERED_MASK,
pwrdm->prcm_offs, OMAP4_PM_PWSTST);
return 0;
@@ -70,7 +70,7 @@ static int omap4_pwrdm_set_logic_retst(struct powerdomain *pwrdm, u8 pwrst)
u32 v;
v = pwrst << __ffs(OMAP4430_LOGICRETSTATE_MASK);
- prm_rmw_mod_reg_bits(OMAP4430_LOGICRETSTATE_MASK, v,
+ omap2_prm_rmw_mod_reg_bits(OMAP4430_LOGICRETSTATE_MASK, v,
pwrdm->prcm_offs, OMAP4_PM_PWSTCTRL);
return 0;
@@ -83,7 +83,7 @@ static int omap4_pwrdm_set_mem_onst(struct powerdomain *pwrdm, u8 bank,
m = omap2_pwrdm_get_mem_bank_onstate_mask(bank);
- prm_rmw_mod_reg_bits(m, (pwrst << __ffs(m)), pwrdm->prcm_offs,
+ omap2_prm_rmw_mod_reg_bits(m, (pwrst << __ffs(m)), pwrdm->prcm_offs,
OMAP4_PM_PWSTCTRL);
return 0;
@@ -96,7 +96,7 @@ static int omap4_pwrdm_set_mem_retst(struct powerdomain *pwrdm, u8 bank,
m = omap2_pwrdm_get_mem_bank_retst_mask(bank);
- prm_rmw_mod_reg_bits(m, (pwrst << __ffs(m)), pwrdm->prcm_offs,
+ omap2_prm_rmw_mod_reg_bits(m, (pwrst << __ffs(m)), pwrdm->prcm_offs,
OMAP4_PM_PWSTCTRL);
return 0;
@@ -104,14 +104,15 @@ static int omap4_pwrdm_set_mem_retst(struct powerdomain *pwrdm, u8 bank,
static int omap4_pwrdm_read_logic_pwrst(struct powerdomain *pwrdm)
{
- return prm_read_mod_bits_shift(pwrdm->prcm_offs, OMAP4_PM_PWSTST,
+ return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs, OMAP4_PM_PWSTST,
OMAP4430_LOGICSTATEST_MASK);
}
static int omap4_pwrdm_read_logic_retst(struct powerdomain *pwrdm)
{
- return prm_read_mod_bits_shift(pwrdm->prcm_offs, OMAP4_PM_PWSTCTRL,
- OMAP4430_LOGICRETSTATE_MASK);
+ return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs,
+ OMAP4_PM_PWSTCTRL,
+ OMAP4430_LOGICRETSTATE_MASK);
}
static int omap4_pwrdm_read_mem_pwrst(struct powerdomain *pwrdm, u8 bank)
@@ -120,7 +121,8 @@ static int omap4_pwrdm_read_mem_pwrst(struct powerdomain *pwrdm, u8 bank)
m = omap2_pwrdm_get_mem_bank_stst_mask(bank);
- return prm_read_mod_bits_shift(pwrdm->prcm_offs, OMAP4_PM_PWSTST, m);
+ return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs, OMAP4_PM_PWSTST,
+ m);
}
static int omap4_pwrdm_read_mem_retst(struct powerdomain *pwrdm, u8 bank)
@@ -129,7 +131,8 @@ static int omap4_pwrdm_read_mem_retst(struct powerdomain *pwrdm, u8 bank)
m = omap2_pwrdm_get_mem_bank_retst_mask(bank);
- return prm_read_mod_bits_shift(pwrdm->prcm_offs, OMAP4_PM_PWSTCTRL, m);
+ return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs,
+ OMAP4_PM_PWSTCTRL, m);
}
static int omap4_pwrdm_wait_transition(struct powerdomain *pwrdm)
@@ -143,7 +146,7 @@ static int omap4_pwrdm_wait_transition(struct powerdomain *pwrdm)
*/
/* XXX Is this udelay() value meaningful? */
- while ((prm_read_mod_reg(pwrdm->prcm_offs, OMAP4_PM_PWSTST) &
+ while ((omap2_prm_read_mod_reg(pwrdm->prcm_offs, OMAP4_PM_PWSTST) &
OMAP_INTRANSITION_MASK) &&
(c++ < PWRDM_TRANSITION_BAILOUT))
udelay(1);
diff --git a/arch/arm/mach-omap2/prcm.c b/arch/arm/mach-omap2/prcm.c
index 68c541f..c22e726 100644
--- a/arch/arm/mach-omap2/prcm.c
+++ b/arch/arm/mach-omap2/prcm.c
@@ -17,7 +17,8 @@
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
-#include <linux/module.h>
+
+#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/clk.h>
#include <linux/io.h>
@@ -30,10 +31,9 @@
#include "clock.h"
#include "clock2xxx.h"
#include "cm2xxx_3xxx.h"
-#include "cm44xx.h"
#include "prm2xxx_3xxx.h"
#include "prm44xx.h"
-#include "prcm44xx.h"
+#include "prminst44xx.h"
#include "prm-regbits-24xx.h"
#include "prm-regbits-44xx.h"
#include "control.h"
@@ -48,9 +48,9 @@ u32 omap_prcm_get_reset_sources(void)
{
/* XXX This presumably needs modification for 34XX */
if (cpu_is_omap24xx() || cpu_is_omap34xx())
- return prm_read_mod_reg(WKUP_MOD, OMAP2_RM_RSTST) & 0x7f;
+ return omap2_prm_read_mod_reg(WKUP_MOD, OMAP2_RM_RSTST) & 0x7f;
if (cpu_is_omap44xx())
- return prm_read_mod_reg(WKUP_MOD, OMAP4_RM_RSTST) & 0x7f;
+ return omap2_prm_read_mod_reg(WKUP_MOD, OMAP4_RM_RSTST) & 0x7f;
return 0;
}
@@ -75,9 +75,9 @@ void omap_prcm_arch_reset(char mode, const char *cmd)
}
/* XXX should be moved to some OMAP2/3 specific code */
- prm_set_mod_reg_bits(OMAP_RST_DPLL3_MASK, prcm_offs,
- OMAP2_RM_RSTCTRL);
- prm_read_mod_reg(prcm_offs, OMAP2_RM_RSTCTRL); /* OCP barrier */
+ omap2_prm_set_mod_reg_bits(OMAP_RST_DPLL3_MASK, prcm_offs,
+ OMAP2_RM_RSTCTRL);
+ omap2_prm_read_mod_reg(prcm_offs, OMAP2_RM_RSTCTRL); /* OCP barrier */
}
/**
diff --git a/arch/arm/mach-omap2/prm2xxx_3xxx.c b/arch/arm/mach-omap2/prm2xxx_3xxx.c
index 3e1d36c..ec03625 100644
--- a/arch/arm/mach-omap2/prm2xxx_3xxx.c
+++ b/arch/arm/mach-omap2/prm2xxx_3xxx.c
@@ -25,49 +25,49 @@
#include "prm-regbits-24xx.h"
#include "prm-regbits-34xx.h"
-u32 prm_read_mod_reg(s16 module, u16 idx)
+u32 omap2_prm_read_mod_reg(s16 module, u16 idx)
{
return __raw_readl(prm_base + module + idx);
}
-void prm_write_mod_reg(u32 val, s16 module, u16 idx)
+void omap2_prm_write_mod_reg(u32 val, s16 module, u16 idx)
{
__raw_writel(val, prm_base + module + idx);
}
/* Read-modify-write a register in a PRM module. Caller must lock */
-u32 prm_rmw_mod_reg_bits(u32 mask, u32 bits, s16 module, s16 idx)
+u32 omap2_prm_rmw_mod_reg_bits(u32 mask, u32 bits, s16 module, s16 idx)
{
u32 v;
- v = prm_read_mod_reg(module, idx);
+ v = omap2_prm_read_mod_reg(module, idx);
v &= ~mask;
v |= bits;
- prm_write_mod_reg(v, module, idx);
+ omap2_prm_write_mod_reg(v, module, idx);
return v;
}
/* Read a PRM register, AND it, and shift the result down to bit 0 */
-u32 prm_read_mod_bits_shift(s16 domain, s16 idx, u32 mask)
+u32 omap2_prm_read_mod_bits_shift(s16 domain, s16 idx, u32 mask)
{
u32 v;
- v = prm_read_mod_reg(domain, idx);
+ v = omap2_prm_read_mod_reg(domain, idx);
v &= mask;
v >>= __ffs(mask);
return v;
}
-u32 prm_set_mod_reg_bits(u32 bits, s16 module, s16 idx)
+u32 omap2_prm_set_mod_reg_bits(u32 bits, s16 module, s16 idx)
{
- return prm_rmw_mod_reg_bits(bits, bits, module, idx);
+ return omap2_prm_rmw_mod_reg_bits(bits, bits, module, idx);
}
-u32 prm_clear_mod_reg_bits(u32 bits, s16 module, s16 idx)
+u32 omap2_prm_clear_mod_reg_bits(u32 bits, s16 module, s16 idx)
{
- return prm_rmw_mod_reg_bits(bits, 0x0, module, idx);
+ return omap2_prm_rmw_mod_reg_bits(bits, 0x0, module, idx);
}
@@ -86,7 +86,7 @@ int omap2_prm_is_hardreset_asserted(s16 prm_mod, u8 shift)
if (!(cpu_is_omap24xx() || cpu_is_omap34xx()))
return -EINVAL;
- return prm_read_mod_bits_shift(prm_mod, OMAP2_RM_RSTCTRL,
+ return omap2_prm_read_mod_bits_shift(prm_mod, OMAP2_RM_RSTCTRL,
(1 << shift));
}
@@ -110,7 +110,7 @@ int omap2_prm_assert_hardreset(s16 prm_mod, u8 shift)
return -EINVAL;
mask = 1 << shift;
- prm_rmw_mod_reg_bits(mask, mask, prm_mod, OMAP2_RM_RSTCTRL);
+ omap2_prm_rmw_mod_reg_bits(mask, mask, prm_mod, OMAP2_RM_RSTCTRL);
return 0;
}
@@ -140,15 +140,15 @@ int omap2_prm_deassert_hardreset(s16 prm_mod, u8 shift)
mask = 1 << shift;
/* Check the current status to avoid de-asserting the line twice */
- if (prm_read_mod_bits_shift(prm_mod, OMAP2_RM_RSTCTRL, mask) == 0)
+ if (omap2_prm_read_mod_bits_shift(prm_mod, OMAP2_RM_RSTCTRL, mask) == 0)
return -EEXIST;
/* Clear the reset status by writing 1 to the status bit */
- prm_rmw_mod_reg_bits(0xffffffff, mask, prm_mod, OMAP2_RM_RSTST);
+ omap2_prm_rmw_mod_reg_bits(0xffffffff, mask, prm_mod, OMAP2_RM_RSTST);
/* de-assert the reset control line */
- prm_rmw_mod_reg_bits(mask, 0, prm_mod, OMAP2_RM_RSTCTRL);
+ omap2_prm_rmw_mod_reg_bits(mask, 0, prm_mod, OMAP2_RM_RSTCTRL);
/* wait the status to be set */
- omap_test_timeout(prm_read_mod_bits_shift(prm_mod, OMAP2_RM_RSTST,
+ omap_test_timeout(omap2_prm_read_mod_bits_shift(prm_mod, OMAP2_RM_RSTST,
mask),
MAX_MODULE_HARDRESET_WAIT, c);
diff --git a/arch/arm/mach-omap2/prm2xxx_3xxx.h b/arch/arm/mach-omap2/prm2xxx_3xxx.h
index ab28517..53d44f6 100644
--- a/arch/arm/mach-omap2/prm2xxx_3xxx.h
+++ b/arch/arm/mach-omap2/prm2xxx_3xxx.h
@@ -230,12 +230,12 @@
#ifndef __ASSEMBLER__
/* Power/reset management domain register get/set */
-extern u32 prm_read_mod_reg(s16 module, u16 idx);
-extern void prm_write_mod_reg(u32 val, s16 module, u16 idx);
-extern u32 prm_rmw_mod_reg_bits(u32 mask, u32 bits, s16 module, s16 idx);
-extern u32 prm_set_mod_reg_bits(u32 bits, s16 module, s16 idx);
-extern u32 prm_clear_mod_reg_bits(u32 bits, s16 module, s16 idx);
-extern u32 prm_read_mod_bits_shift(s16 domain, s16 idx, u32 mask);
+extern u32 omap2_prm_read_mod_reg(s16 module, u16 idx);
+extern void omap2_prm_write_mod_reg(u32 val, s16 module, u16 idx);
+extern u32 omap2_prm_rmw_mod_reg_bits(u32 mask, u32 bits, s16 module, s16 idx);
+extern u32 omap2_prm_set_mod_reg_bits(u32 bits, s16 module, s16 idx);
+extern u32 omap2_prm_clear_mod_reg_bits(u32 bits, s16 module, s16 idx);
+extern u32 omap2_prm_read_mod_bits_shift(s16 domain, s16 idx, u32 mask);
/* These omap2_ PRM functions apply to both OMAP2 and 3 */
extern int omap2_prm_is_hardreset_asserted(s16 prm_mod, u8 shift);
diff --git a/arch/arm/mach-omap2/sdrc2xxx.c b/arch/arm/mach-omap2/sdrc2xxx.c
index 64778b6..ccdb010 100644
--- a/arch/arm/mach-omap2/sdrc2xxx.c
+++ b/arch/arm/mach-omap2/sdrc2xxx.c
@@ -99,6 +99,10 @@ u32 omap2xxx_sdrc_reprogram(u32 level, u32 force)
m_type = omap2xxx_sdrc_get_type();
local_irq_save(flags);
+ /*
+ * XXX These calls should be abstracted out through a
+ * prm2xxx.c function
+ */
if (cpu_is_omap2420())
__raw_writel(0xffff, OMAP2420_PRCM_VOLTSETUP);
else
diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c
index a60ac51..149b896 100644
--- a/arch/arm/mach-omap2/serial.c
+++ b/arch/arm/mach-omap2/serial.c
@@ -492,6 +492,7 @@ static void omap_uart_idle_init(struct omap_uart_state *uart)
u32 wk_mask = 0;
u32 padconf = 0;
+ /* XXX These PRM accesses do not belong here */
uart->wk_en = OMAP34XX_PRM_REGADDR(mod, PM_WKEN1);
uart->wk_st = OMAP34XX_PRM_REGADDR(mod, PM_WKST1);
switch (uart->num) {
diff --git a/arch/arm/plat-omap/mcbsp.c b/arch/arm/plat-omap/mcbsp.c
index e66ad3e..9634d39 100644
--- a/arch/arm/plat-omap/mcbsp.c
+++ b/arch/arm/plat-omap/mcbsp.c
@@ -236,9 +236,9 @@ static void omap_st_on(struct omap_mcbsp *mcbsp)
* Sidetone uses McBSP ICLK - which must not idle when sidetones
* are enabled or sidetones start sounding ugly.
*/
- w = cm_read_mod_reg(OMAP3430_PER_MOD, CM_AUTOIDLE);
+ w = omap2_cm_read_mod_reg(OMAP3430_PER_MOD, CM_AUTOIDLE);
w &= ~(1 << (mcbsp->id - 2));
- cm_write_mod_reg(w, OMAP3430_PER_MOD, CM_AUTOIDLE);
+ omap2_cm_write_mod_reg(w, OMAP3430_PER_MOD, CM_AUTOIDLE);
/* Enable McBSP Sidetone */
w = MCBSP_READ(mcbsp, SSELCR);
@@ -265,9 +265,9 @@ static void omap_st_off(struct omap_mcbsp *mcbsp)
w = MCBSP_READ(mcbsp, SSELCR);
MCBSP_WRITE(mcbsp, SSELCR, w & ~(SIDETONEEN));
- w = cm_read_mod_reg(OMAP3430_PER_MOD, CM_AUTOIDLE);
+ w = omap2_cm_read_mod_reg(OMAP3430_PER_MOD, CM_AUTOIDLE);
w |= 1 << (mcbsp->id - 2);
- cm_write_mod_reg(w, OMAP3430_PER_MOD, CM_AUTOIDLE);
+ omap2_cm_write_mod_reg(w, OMAP3430_PER_MOD, CM_AUTOIDLE);
}
static void omap_st_fir_write(struct omap_mcbsp *mcbsp, s16 *fir)
^ permalink raw reply related [flat|nested] 38+ messages in thread* [PATCH 04/11] OMAP4: powerdomains: add PRCM partition data; use OMAP4 PRM functions
2010-12-08 6:18 [PATCH 00/11] OMAP: PRCM/powerdomain/clockdomain patches for 2.6.38, part two Paul Walmsley
` (2 preceding siblings ...)
2010-12-08 6:18 ` [PATCH 03/11] OMAP2/3: PRM/CM: prefix OMAP2 PRM/CM functions with "omap2_" Paul Walmsley
@ 2010-12-08 6:18 ` Paul Walmsley
2010-12-08 6:18 ` [PATCH 05/11] OMAP2+: clockdomains: split the clkdm hwsup enable/disable function Paul Walmsley
` (9 subsequent siblings)
13 siblings, 0 replies; 38+ messages in thread
From: Paul Walmsley @ 2010-12-08 6:18 UTC (permalink / raw)
To: linux-arm-kernel
OMAP4 powerdomain control registers are split between the PRM hardware
module and the PRCM_MPU local PRCM. Add this PRCM partition
information to each OMAP4 powerdomain record, and convert the OMAP4
powerdomain function implementations to use the OMAP4 PRM instance
functions.
Also fixes a potential null pointer dereference of pwrdm->name.
The autogeneration scripts have been updated.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Rajendra Nayak <rnayak@ti.com>
Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
Cc: Beno?t Cousson <b-cousson@ti.com>
---
arch/arm/mach-omap2/powerdomain.c | 10 ++
arch/arm/mach-omap2/powerdomain44xx.c | 122 +++++++++++++++++--------
arch/arm/mach-omap2/powerdomains44xx_data.c | 17 +++
arch/arm/plat-omap/include/plat/powerdomain.h | 7 +
4 files changed, 115 insertions(+), 41 deletions(-)
diff --git a/arch/arm/mach-omap2/powerdomain.c b/arch/arm/mach-omap2/powerdomain.c
index 8a0dcd0..a76ad3f 100644
--- a/arch/arm/mach-omap2/powerdomain.c
+++ b/arch/arm/mach-omap2/powerdomain.c
@@ -20,6 +20,7 @@
#include <linux/errno.h>
#include <linux/string.h>
#include "cm2xxx_3xxx.h"
+#include "prcm44xx.h"
#include "cm44xx.h"
#include "prm2xxx_3xxx.h"
#include "prm44xx.h"
@@ -72,12 +73,19 @@ static int _pwrdm_register(struct powerdomain *pwrdm)
{
int i;
- if (!pwrdm)
+ if (!pwrdm || !pwrdm->name)
return -EINVAL;
if (!omap_chip_is(pwrdm->omap_chip))
return -EINVAL;
+ if (cpu_is_omap44xx() &&
+ pwrdm->prcm_partition == OMAP4430_INVALID_PRCM_PARTITION) {
+ pr_err("powerdomain: %s: missing OMAP4 PRCM partition ID\n",
+ pwrdm->name);
+ return -EINVAL;
+ }
+
if (_pwrdm_lookup(pwrdm->name))
return -EEXIST;
diff --git a/arch/arm/mach-omap2/powerdomain44xx.c b/arch/arm/mach-omap2/powerdomain44xx.c
index 4c5ab1a..28bf5e3 100644
--- a/arch/arm/mach-omap2/powerdomain44xx.c
+++ b/arch/arm/mach-omap2/powerdomain44xx.c
@@ -20,48 +20,70 @@
#include <plat/prcm.h>
#include "prm2xxx_3xxx.h"
#include "prm44xx.h"
+#include "prminst44xx.h"
#include "prm-regbits-44xx.h"
#include "powerdomains.h"
static int omap4_pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst)
{
- omap2_prm_rmw_mod_reg_bits(OMAP_POWERSTATE_MASK,
- (pwrst << OMAP_POWERSTATE_SHIFT),
- pwrdm->prcm_offs, OMAP4_PM_PWSTCTRL);
+ omap4_prminst_rmw_inst_reg_bits(OMAP_POWERSTATE_MASK,
+ (pwrst << OMAP_POWERSTATE_SHIFT),
+ pwrdm->prcm_partition,
+ pwrdm->prcm_offs, OMAP4_PM_PWSTCTRL);
return 0;
}
static int omap4_pwrdm_read_next_pwrst(struct powerdomain *pwrdm)
{
- return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs,
- OMAP4_PM_PWSTCTRL, OMAP_POWERSTATE_MASK);
+ u32 v;
+
+ v = omap4_prminst_read_inst_reg(pwrdm->prcm_partition, pwrdm->prcm_offs,
+ OMAP4_PM_PWSTCTRL);
+ v &= OMAP_POWERSTATE_MASK;
+ v >>= OMAP_POWERSTATE_SHIFT;
+
+ return v;
}
static int omap4_pwrdm_read_pwrst(struct powerdomain *pwrdm)
{
- return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs,
- OMAP4_PM_PWSTST, OMAP_POWERSTATEST_MASK);
+ u32 v;
+
+ v = omap4_prminst_read_inst_reg(pwrdm->prcm_partition, pwrdm->prcm_offs,
+ OMAP4_PM_PWSTST);
+ v &= OMAP_POWERSTATEST_MASK;
+ v >>= OMAP_POWERSTATEST_SHIFT;
+
+ return v;
}
static int omap4_pwrdm_read_prev_pwrst(struct powerdomain *pwrdm)
{
- return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs, OMAP4_PM_PWSTST,
- OMAP4430_LASTPOWERSTATEENTERED_MASK);
+ u32 v;
+
+ v = omap4_prminst_read_inst_reg(pwrdm->prcm_partition, pwrdm->prcm_offs,
+ OMAP4_PM_PWSTST);
+ v &= OMAP4430_LASTPOWERSTATEENTERED_MASK;
+ v >>= OMAP4430_LASTPOWERSTATEENTERED_SHIFT;
+
+ return v;
}
static int omap4_pwrdm_set_lowpwrstchange(struct powerdomain *pwrdm)
{
- omap2_prm_rmw_mod_reg_bits(OMAP4430_LOWPOWERSTATECHANGE_MASK,
- (1 << OMAP4430_LOWPOWERSTATECHANGE_SHIFT),
- pwrdm->prcm_offs, OMAP4_PM_PWSTCTRL);
+ omap4_prminst_rmw_inst_reg_bits(OMAP4430_LOWPOWERSTATECHANGE_MASK,
+ (1 << OMAP4430_LOWPOWERSTATECHANGE_SHIFT),
+ pwrdm->prcm_partition,
+ pwrdm->prcm_offs, OMAP4_PM_PWSTCTRL);
return 0;
}
static int omap4_pwrdm_clear_all_prev_pwrst(struct powerdomain *pwrdm)
{
- omap2_prm_rmw_mod_reg_bits(OMAP4430_LASTPOWERSTATEENTERED_MASK,
- OMAP4430_LASTPOWERSTATEENTERED_MASK,
- pwrdm->prcm_offs, OMAP4_PM_PWSTST);
+ omap4_prminst_rmw_inst_reg_bits(OMAP4430_LASTPOWERSTATEENTERED_MASK,
+ OMAP4430_LASTPOWERSTATEENTERED_MASK,
+ pwrdm->prcm_partition,
+ pwrdm->prcm_offs, OMAP4_PM_PWSTST);
return 0;
}
@@ -70,69 +92,91 @@ static int omap4_pwrdm_set_logic_retst(struct powerdomain *pwrdm, u8 pwrst)
u32 v;
v = pwrst << __ffs(OMAP4430_LOGICRETSTATE_MASK);
- omap2_prm_rmw_mod_reg_bits(OMAP4430_LOGICRETSTATE_MASK, v,
- pwrdm->prcm_offs, OMAP4_PM_PWSTCTRL);
+ omap4_prminst_rmw_inst_reg_bits(OMAP4430_LOGICRETSTATE_MASK, v,
+ pwrdm->prcm_partition, pwrdm->prcm_offs,
+ OMAP4_PM_PWSTCTRL);
return 0;
}
static int omap4_pwrdm_set_mem_onst(struct powerdomain *pwrdm, u8 bank,
- u8 pwrst)
+ u8 pwrst)
{
u32 m;
m = omap2_pwrdm_get_mem_bank_onstate_mask(bank);
- omap2_prm_rmw_mod_reg_bits(m, (pwrst << __ffs(m)), pwrdm->prcm_offs,
- OMAP4_PM_PWSTCTRL);
+ omap4_prminst_rmw_inst_reg_bits(m, (pwrst << __ffs(m)),
+ pwrdm->prcm_partition, pwrdm->prcm_offs,
+ OMAP4_PM_PWSTCTRL);
return 0;
}
static int omap4_pwrdm_set_mem_retst(struct powerdomain *pwrdm, u8 bank,
- u8 pwrst)
+ u8 pwrst)
{
u32 m;
m = omap2_pwrdm_get_mem_bank_retst_mask(bank);
- omap2_prm_rmw_mod_reg_bits(m, (pwrst << __ffs(m)), pwrdm->prcm_offs,
- OMAP4_PM_PWSTCTRL);
+ omap4_prminst_rmw_inst_reg_bits(m, (pwrst << __ffs(m)),
+ pwrdm->prcm_partition, pwrdm->prcm_offs,
+ OMAP4_PM_PWSTCTRL);
return 0;
}
static int omap4_pwrdm_read_logic_pwrst(struct powerdomain *pwrdm)
{
- return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs, OMAP4_PM_PWSTST,
- OMAP4430_LOGICSTATEST_MASK);
+ u32 v;
+
+ v = omap4_prminst_read_inst_reg(pwrdm->prcm_partition, pwrdm->prcm_offs,
+ OMAP4_PM_PWSTST);
+ v &= OMAP4430_LOGICSTATEST_MASK;
+ v >>= OMAP4430_LOGICSTATEST_SHIFT;
+
+ return v;
}
static int omap4_pwrdm_read_logic_retst(struct powerdomain *pwrdm)
{
- return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs,
- OMAP4_PM_PWSTCTRL,
- OMAP4430_LOGICRETSTATE_MASK);
+ u32 v;
+
+ v = omap4_prminst_read_inst_reg(pwrdm->prcm_partition, pwrdm->prcm_offs,
+ OMAP4_PM_PWSTCTRL);
+ v &= OMAP4430_LOGICRETSTATE_MASK;
+ v >>= OMAP4430_LOGICRETSTATE_SHIFT;
+
+ return v;
}
static int omap4_pwrdm_read_mem_pwrst(struct powerdomain *pwrdm, u8 bank)
{
- u32 m;
+ u32 m, v;
m = omap2_pwrdm_get_mem_bank_stst_mask(bank);
- return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs, OMAP4_PM_PWSTST,
- m);
+ v = omap4_prminst_read_inst_reg(pwrdm->prcm_partition, pwrdm->prcm_offs,
+ OMAP4_PM_PWSTST);
+ v &= m;
+ v >>= __ffs(m);
+
+ return v;
}
static int omap4_pwrdm_read_mem_retst(struct powerdomain *pwrdm, u8 bank)
{
- u32 m;
+ u32 m, v;
m = omap2_pwrdm_get_mem_bank_retst_mask(bank);
- return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs,
- OMAP4_PM_PWSTCTRL, m);
+ v = omap4_prminst_read_inst_reg(pwrdm->prcm_partition, pwrdm->prcm_offs,
+ OMAP4_PM_PWSTCTRL);
+ v &= m;
+ v >>= __ffs(m);
+
+ return v;
}
static int omap4_pwrdm_wait_transition(struct powerdomain *pwrdm)
@@ -146,14 +190,16 @@ static int omap4_pwrdm_wait_transition(struct powerdomain *pwrdm)
*/
/* XXX Is this udelay() value meaningful? */
- while ((omap2_prm_read_mod_reg(pwrdm->prcm_offs, OMAP4_PM_PWSTST) &
+ while ((omap4_prminst_read_inst_reg(pwrdm->prcm_partition,
+ pwrdm->prcm_offs,
+ OMAP4_PM_PWSTST) &
OMAP_INTRANSITION_MASK) &&
- (c++ < PWRDM_TRANSITION_BAILOUT))
- udelay(1);
+ (c++ < PWRDM_TRANSITION_BAILOUT))
+ udelay(1);
if (c > PWRDM_TRANSITION_BAILOUT) {
printk(KERN_ERR "powerdomain: waited too long for "
- "powerdomain %s to complete transition\n", pwrdm->name);
+ "powerdomain %s to complete transition\n", pwrdm->name);
return -EAGAIN;
}
diff --git a/arch/arm/mach-omap2/powerdomains44xx_data.c b/arch/arm/mach-omap2/powerdomains44xx_data.c
index 069a21d..823f477 100644
--- a/arch/arm/mach-omap2/powerdomains44xx_data.c
+++ b/arch/arm/mach-omap2/powerdomains44xx_data.c
@@ -26,6 +26,7 @@
#include "powerdomains.h"
#include "prcm-common.h"
+#include "prcm44xx.h"
#include "prm-regbits-44xx.h"
#include "prm44xx.h"
#include "prcm_mpu44xx.h"
@@ -34,6 +35,7 @@
static struct powerdomain core_44xx_pwrdm = {
.name = "core_pwrdm",
.prcm_offs = OMAP4430_PRM_CORE_INST,
+ .prcm_partition = OMAP4430_PRM_PARTITION,
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
.pwrsts = PWRSTS_RET_ON,
.pwrsts_logic_ret = PWRSTS_OFF_RET,
@@ -59,6 +61,7 @@ static struct powerdomain core_44xx_pwrdm = {
static struct powerdomain gfx_44xx_pwrdm = {
.name = "gfx_pwrdm",
.prcm_offs = OMAP4430_PRM_GFX_INST,
+ .prcm_partition = OMAP4430_PRM_PARTITION,
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
.pwrsts = PWRSTS_OFF_ON,
.banks = 1,
@@ -75,6 +78,7 @@ static struct powerdomain gfx_44xx_pwrdm = {
static struct powerdomain abe_44xx_pwrdm = {
.name = "abe_pwrdm",
.prcm_offs = OMAP4430_PRM_ABE_INST,
+ .prcm_partition = OMAP4430_PRM_PARTITION,
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
.pwrsts = PWRSTS_OFF_RET_ON,
.pwrsts_logic_ret = PWRDM_POWER_OFF,
@@ -94,6 +98,7 @@ static struct powerdomain abe_44xx_pwrdm = {
static struct powerdomain dss_44xx_pwrdm = {
.name = "dss_pwrdm",
.prcm_offs = OMAP4430_PRM_DSS_INST,
+ .prcm_partition = OMAP4430_PRM_PARTITION,
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
.pwrsts = PWRSTS_OFF_RET_ON,
.pwrsts_logic_ret = PWRSTS_OFF,
@@ -111,6 +116,7 @@ static struct powerdomain dss_44xx_pwrdm = {
static struct powerdomain tesla_44xx_pwrdm = {
.name = "tesla_pwrdm",
.prcm_offs = OMAP4430_PRM_TESLA_INST,
+ .prcm_partition = OMAP4430_PRM_PARTITION,
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
.pwrsts = PWRSTS_OFF_RET_ON,
.pwrsts_logic_ret = PWRSTS_OFF_RET,
@@ -132,6 +138,7 @@ static struct powerdomain tesla_44xx_pwrdm = {
static struct powerdomain wkup_44xx_pwrdm = {
.name = "wkup_pwrdm",
.prcm_offs = OMAP4430_PRM_WKUP_INST,
+ .prcm_partition = OMAP4430_PRM_PARTITION,
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
.pwrsts = PWRSTS_ON,
.banks = 1,
@@ -147,6 +154,7 @@ static struct powerdomain wkup_44xx_pwrdm = {
static struct powerdomain cpu0_44xx_pwrdm = {
.name = "cpu0_pwrdm",
.prcm_offs = OMAP4430_PRCM_MPU_CPU0_INST,
+ .prcm_partition = OMAP4430_PRCM_MPU_PARTITION,
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
.pwrsts = PWRSTS_OFF_RET_ON,
.pwrsts_logic_ret = PWRSTS_OFF_RET,
@@ -163,6 +171,7 @@ static struct powerdomain cpu0_44xx_pwrdm = {
static struct powerdomain cpu1_44xx_pwrdm = {
.name = "cpu1_pwrdm",
.prcm_offs = OMAP4430_PRCM_MPU_CPU1_INST,
+ .prcm_partition = OMAP4430_PRCM_MPU_PARTITION,
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
.pwrsts = PWRSTS_OFF_RET_ON,
.pwrsts_logic_ret = PWRSTS_OFF_RET,
@@ -179,6 +188,7 @@ static struct powerdomain cpu1_44xx_pwrdm = {
static struct powerdomain emu_44xx_pwrdm = {
.name = "emu_pwrdm",
.prcm_offs = OMAP4430_PRM_EMU_INST,
+ .prcm_partition = OMAP4430_PRM_PARTITION,
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
.pwrsts = PWRSTS_OFF_ON,
.banks = 1,
@@ -194,6 +204,7 @@ static struct powerdomain emu_44xx_pwrdm = {
static struct powerdomain mpu_44xx_pwrdm = {
.name = "mpu_pwrdm",
.prcm_offs = OMAP4430_PRM_MPU_INST,
+ .prcm_partition = OMAP4430_PRM_PARTITION,
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
.pwrsts = PWRSTS_OFF_RET_ON,
.pwrsts_logic_ret = PWRSTS_OFF_RET,
@@ -214,6 +225,7 @@ static struct powerdomain mpu_44xx_pwrdm = {
static struct powerdomain ivahd_44xx_pwrdm = {
.name = "ivahd_pwrdm",
.prcm_offs = OMAP4430_PRM_IVAHD_INST,
+ .prcm_partition = OMAP4430_PRM_PARTITION,
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
.pwrsts = PWRSTS_OFF_RET_ON,
.pwrsts_logic_ret = PWRDM_POWER_OFF,
@@ -237,6 +249,7 @@ static struct powerdomain ivahd_44xx_pwrdm = {
static struct powerdomain cam_44xx_pwrdm = {
.name = "cam_pwrdm",
.prcm_offs = OMAP4430_PRM_CAM_INST,
+ .prcm_partition = OMAP4430_PRM_PARTITION,
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
.pwrsts = PWRSTS_OFF_ON,
.banks = 1,
@@ -253,6 +266,7 @@ static struct powerdomain cam_44xx_pwrdm = {
static struct powerdomain l3init_44xx_pwrdm = {
.name = "l3init_pwrdm",
.prcm_offs = OMAP4430_PRM_L3INIT_INST,
+ .prcm_partition = OMAP4430_PRM_PARTITION,
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
.pwrsts = PWRSTS_OFF_RET_ON,
.pwrsts_logic_ret = PWRSTS_OFF_RET,
@@ -270,6 +284,7 @@ static struct powerdomain l3init_44xx_pwrdm = {
static struct powerdomain l4per_44xx_pwrdm = {
.name = "l4per_pwrdm",
.prcm_offs = OMAP4430_PRM_L4PER_INST,
+ .prcm_partition = OMAP4430_PRM_PARTITION,
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
.pwrsts = PWRSTS_OFF_RET_ON,
.pwrsts_logic_ret = PWRSTS_OFF_RET,
@@ -292,6 +307,7 @@ static struct powerdomain l4per_44xx_pwrdm = {
static struct powerdomain always_on_core_44xx_pwrdm = {
.name = "always_on_core_pwrdm",
.prcm_offs = OMAP4430_PRM_ALWAYS_ON_INST,
+ .prcm_partition = OMAP4430_PRM_PARTITION,
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
.pwrsts = PWRSTS_ON,
};
@@ -300,6 +316,7 @@ static struct powerdomain always_on_core_44xx_pwrdm = {
static struct powerdomain cefuse_44xx_pwrdm = {
.name = "cefuse_pwrdm",
.prcm_offs = OMAP4430_PRM_CEFUSE_INST,
+ .prcm_partition = OMAP4430_PRM_PARTITION,
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
.pwrsts = PWRSTS_OFF_ON,
};
diff --git a/arch/arm/plat-omap/include/plat/powerdomain.h b/arch/arm/plat-omap/include/plat/powerdomain.h
index b79eebb..a0d3a30 100644
--- a/arch/arm/plat-omap/include/plat/powerdomain.h
+++ b/arch/arm/plat-omap/include/plat/powerdomain.h
@@ -1,5 +1,5 @@
/*
- * OMAP2/3 powerdomain control
+ * OMAP2/3/4 powerdomain control
*
* Copyright (C) 2007-2008 Texas Instruments, Inc.
* Copyright (C) 2007-2010 Nokia Corporation
@@ -24,7 +24,6 @@
#include <plat/cpu.h>
-
/* Powerdomain basic power states */
#define PWRDM_POWER_OFF 0x0
#define PWRDM_POWER_RET 0x1
@@ -84,6 +83,7 @@ struct powerdomain;
* @name: Powerdomain name
* @omap_chip: represents the OMAP chip types containing this pwrdm
* @prcm_offs: the address offset from CM_BASE/PRM_BASE
+ * @prcm_partition: (OMAP4 only) the PRCM partition ID containing @prcm_offs
* @pwrsts: Possible powerdomain power states
* @pwrsts_logic_ret: Possible logic power states when pwrdm in RETENTION
* @flags: Powerdomain flags
@@ -96,6 +96,8 @@ struct powerdomain;
* @state_counter:
* @timer:
* @state_timer:
+ *
+ * @prcm_partition possible values are defined in mach-omap2/prcm44xx.h.
*/
struct powerdomain {
const char *name;
@@ -107,6 +109,7 @@ struct powerdomain {
const u8 banks;
const u8 pwrsts_mem_ret[PWRDM_MAX_MEM_BANKS];
const u8 pwrsts_mem_on[PWRDM_MAX_MEM_BANKS];
+ const u8 prcm_partition;
struct clockdomain *pwrdm_clkdms[PWRDM_MAX_CLKDMS];
struct list_head node;
int state;
^ permalink raw reply related [flat|nested] 38+ messages in thread* [PATCH 05/11] OMAP2+: clockdomains: split the clkdm hwsup enable/disable function
2010-12-08 6:18 [PATCH 00/11] OMAP: PRCM/powerdomain/clockdomain patches for 2.6.38, part two Paul Walmsley
` (3 preceding siblings ...)
2010-12-08 6:18 ` [PATCH 04/11] OMAP4: powerdomains: add PRCM partition data; use OMAP4 PRM functions Paul Walmsley
@ 2010-12-08 6:18 ` Paul Walmsley
2010-12-08 23:12 ` Kevin Hilman
2010-12-08 6:18 ` [PATCH 06/11] OMAP4: CM instances: add clockdomain register offsets Paul Walmsley
` (8 subsequent siblings)
13 siblings, 1 reply; 38+ messages in thread
From: Paul Walmsley @ 2010-12-08 6:18 UTC (permalink / raw)
To: linux-arm-kernel
Split _omap2_clkdm_set_hwsup() into _disable_hwsup() and _enable_hwsup().
While here, also document that the autodeps are deprecated and that they
should be removed at the earliest opportunity.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
---
arch/arm/mach-omap2/clockdomain.c | 67 +++++++++++++++++++++++++++----------
1 files changed, 49 insertions(+), 18 deletions(-)
diff --git a/arch/arm/mach-omap2/clockdomain.c b/arch/arm/mach-omap2/clockdomain.c
index da74f71..b1a6908 100644
--- a/arch/arm/mach-omap2/clockdomain.c
+++ b/arch/arm/mach-omap2/clockdomain.c
@@ -140,6 +140,9 @@ static struct clkdm_dep *_clkdm_deps_lookup(struct clockdomain *clkdm,
* clockdomain is in hardware-supervised mode. Meant to be called
* once at clockdomain layer initialization, since these should remain
* fixed for a particular architecture. No return value.
+ *
+ * XXX autodeps are deprecated and should be removed at the earliest
+ * opportunity
*/
static void _autodep_lookup(struct clkdm_autodep *autodep)
{
@@ -167,6 +170,9 @@ static void _autodep_lookup(struct clkdm_autodep *autodep)
* Add the "autodep" sleep & wakeup dependencies to clockdomain 'clkdm'
* in hardware-supervised mode. Meant to be called from clock framework
* when a clock inside clockdomain 'clkdm' is enabled. No return value.
+ *
+ * XXX autodeps are deprecated and should be removed at the earliest
+ * opportunity
*/
static void _clkdm_add_autodeps(struct clockdomain *clkdm)
{
@@ -198,6 +204,9 @@ static void _clkdm_add_autodeps(struct clockdomain *clkdm)
* Remove the "autodep" sleep & wakeup dependencies from clockdomain 'clkdm'
* in hardware-supervised mode. Meant to be called from clock framework
* when a clock inside clockdomain 'clkdm' is disabled. No return value.
+ *
+ * XXX autodeps are deprecated and should be removed at the earliest
+ * opportunity
*/
static void _clkdm_del_autodeps(struct clockdomain *clkdm)
{
@@ -222,28 +231,50 @@ static void _clkdm_del_autodeps(struct clockdomain *clkdm)
}
}
-/*
- * _omap2_clkdm_set_hwsup - set the hwsup idle transition bit
+/**
+ * _enable_hwsup - set the hwsup idle transition bit
+ * @clkdm: struct clockdomain *
+ *
+ * XXX fix doco
+ * Internal helper for actually switching the bit that controls hwsup
+ * idle transitions for clkdm.
+ */
+static void _enable_hwsup(struct clockdomain *clkdm)
+{
+ u32 bits, v;
+
+ if (cpu_is_omap24xx())
+ bits = OMAP24XX_CLKSTCTRL_ENABLE_AUTO;
+ else if (cpu_is_omap34xx() || cpu_is_omap44xx())
+ bits = OMAP34XX_CLKSTCTRL_ENABLE_AUTO;
+ else
+ BUG();
+
+ bits = bits << __ffs(clkdm->clktrctrl_mask);
+
+ v = __raw_readl(clkdm->clkstctrl_reg);
+ v &= ~(clkdm->clktrctrl_mask);
+ v |= bits;
+ __raw_writel(v, clkdm->clkstctrl_reg);
+
+}
+
+/**
+ * _disable_hwsup - set the hwsup idle transition bit
* @clkdm: struct clockdomain *
- * @enable: int 0 to disable, 1 to enable
*
+ * XXX fix doco
* Internal helper for actually switching the bit that controls hwsup
* idle transitions for clkdm.
*/
-static void _omap2_clkdm_set_hwsup(struct clockdomain *clkdm, int enable)
+static void _disable_hwsup(struct clockdomain *clkdm)
{
u32 bits, v;
if (cpu_is_omap24xx()) {
- if (enable)
- bits = OMAP24XX_CLKSTCTRL_ENABLE_AUTO;
- else
- bits = OMAP24XX_CLKSTCTRL_DISABLE_AUTO;
+ bits = OMAP24XX_CLKSTCTRL_DISABLE_AUTO;
} else if (cpu_is_omap34xx() || cpu_is_omap44xx()) {
- if (enable)
- bits = OMAP34XX_CLKSTCTRL_ENABLE_AUTO;
- else
- bits = OMAP34XX_CLKSTCTRL_DISABLE_AUTO;
+ bits = OMAP34XX_CLKSTCTRL_DISABLE_AUTO;
} else {
BUG();
}
@@ -828,7 +859,7 @@ void omap2_clkdm_allow_idle(struct clockdomain *clkdm)
_clkdm_add_autodeps(clkdm);
}
- _omap2_clkdm_set_hwsup(clkdm, 1);
+ _enable_hwsup(clkdm);
pwrdm_clkdm_state_switch(clkdm);
}
@@ -856,7 +887,7 @@ void omap2_clkdm_deny_idle(struct clockdomain *clkdm)
pr_debug("clockdomain: disabling automatic idle transitions for %s\n",
clkdm->name);
- _omap2_clkdm_set_hwsup(clkdm, 0);
+ _disable_hwsup(clkdm);
/*
* XXX This should be removed once TI adds wakeup/sleep
@@ -916,9 +947,9 @@ int omap2_clkdm_clk_enable(struct clockdomain *clkdm, struct clk *clk)
if ((cpu_is_omap34xx() && v == OMAP34XX_CLKSTCTRL_ENABLE_AUTO) ||
(cpu_is_omap24xx() && v == OMAP24XX_CLKSTCTRL_ENABLE_AUTO)) {
/* Disable HW transitions when we are changing deps */
- _omap2_clkdm_set_hwsup(clkdm, 0);
+ _disable_hwsup(clkdm);
_clkdm_add_autodeps(clkdm);
- _omap2_clkdm_set_hwsup(clkdm, 1);
+ _enable_hwsup(clkdm);
} else {
omap2_clkdm_wakeup(clkdm);
}
@@ -978,9 +1009,9 @@ int omap2_clkdm_clk_disable(struct clockdomain *clkdm, struct clk *clk)
if ((cpu_is_omap34xx() && v == OMAP34XX_CLKSTCTRL_ENABLE_AUTO) ||
(cpu_is_omap24xx() && v == OMAP24XX_CLKSTCTRL_ENABLE_AUTO)) {
/* Disable HW transitions when we are changing deps */
- _omap2_clkdm_set_hwsup(clkdm, 0);
+ _disable_hwsup(clkdm);
_clkdm_del_autodeps(clkdm);
- _omap2_clkdm_set_hwsup(clkdm, 1);
+ _enable_hwsup(clkdm);
} else {
omap2_clkdm_sleep(clkdm);
}
^ permalink raw reply related [flat|nested] 38+ messages in thread* [PATCH 05/11] OMAP2+: clockdomains: split the clkdm hwsup enable/disable function
2010-12-08 6:18 ` [PATCH 05/11] OMAP2+: clockdomains: split the clkdm hwsup enable/disable function Paul Walmsley
@ 2010-12-08 23:12 ` Kevin Hilman
2010-12-09 0:00 ` Paul Walmsley
0 siblings, 1 reply; 38+ messages in thread
From: Kevin Hilman @ 2010-12-08 23:12 UTC (permalink / raw)
To: linux-arm-kernel
Paul Walmsley <paul@pwsan.com> writes:
> Split _omap2_clkdm_set_hwsup() into _disable_hwsup() and _enable_hwsup().
>
> While here, also document that the autodeps are deprecated and that they
> should be removed at the earliest opportunity.
>
> Signed-off-by: Paul Walmsley <paul@pwsan.com>
[...]
> @@ -222,28 +231,50 @@ static void _clkdm_del_autodeps(struct clockdomain *clkdm)
> }
> }
>
> -/*
> - * _omap2_clkdm_set_hwsup - set the hwsup idle transition bit
> +/**
> + * _enable_hwsup - set the hwsup idle transition bit
> + * @clkdm: struct clockdomain *
> + *
> + * XXX fix doco
hmm, 'doco' must be a new lingo I haven't learned yet.
> + * Internal helper for actually switching the bit that controls hwsup
> + * idle transitions for clkdm.
> + */
> +static void _enable_hwsup(struct clockdomain *clkdm)
> +{
> + u32 bits, v;
> +
> + if (cpu_is_omap24xx())
> + bits = OMAP24XX_CLKSTCTRL_ENABLE_AUTO;
> + else if (cpu_is_omap34xx() || cpu_is_omap44xx())
> + bits = OMAP34XX_CLKSTCTRL_ENABLE_AUTO;
> + else
> + BUG();
> +
> + bits = bits << __ffs(clkdm->clktrctrl_mask);
> +
> + v = __raw_readl(clkdm->clkstctrl_reg);
> + v &= ~(clkdm->clktrctrl_mask);
> + v |= bits;
> + __raw_writel(v, clkdm->clkstctrl_reg);
> +
> +}
> +
> +/**
> + * _disable_hwsup - set the hwsup idle transition bit
> * @clkdm: struct clockdomain *
> - * @enable: int 0 to disable, 1 to enable
> *
> + * XXX fix doco
here too
Kevin
^ permalink raw reply [flat|nested] 38+ messages in thread* [PATCH 05/11] OMAP2+: clockdomains: split the clkdm hwsup enable/disable function
2010-12-08 23:12 ` Kevin Hilman
@ 2010-12-09 0:00 ` Paul Walmsley
2010-12-11 1:36 ` Paul Walmsley
0 siblings, 1 reply; 38+ messages in thread
From: Paul Walmsley @ 2010-12-09 0:00 UTC (permalink / raw)
To: linux-arm-kernel
On Wed, 8 Dec 2010, Kevin Hilman wrote:
> Paul Walmsley <paul@pwsan.com> writes:
>
> > - * _omap2_clkdm_set_hwsup - set the hwsup idle transition bit
> > +/**
> > + * _enable_hwsup - set the hwsup idle transition bit
> > + * @clkdm: struct clockdomain *
> > + *
> > + * XXX fix doco
>
> hmm, 'doco' must be a new lingo I haven't learned yet.
Thanks, will fix these.
- Paul
^ permalink raw reply [flat|nested] 38+ messages in thread
* [PATCH 05/11] OMAP2+: clockdomains: split the clkdm hwsup enable/disable function
2010-12-09 0:00 ` Paul Walmsley
@ 2010-12-11 1:36 ` Paul Walmsley
0 siblings, 0 replies; 38+ messages in thread
From: Paul Walmsley @ 2010-12-11 1:36 UTC (permalink / raw)
To: linux-arm-kernel
On Wed, 8 Dec 2010, Paul Walmsley wrote:
> On Wed, 8 Dec 2010, Kevin Hilman wrote:
>
> > Paul Walmsley <paul@pwsan.com> writes:
> >
> > > - * _omap2_clkdm_set_hwsup - set the hwsup idle transition bit
> > > +/**
> > > + * _enable_hwsup - set the hwsup idle transition bit
> > > + * @clkdm: struct clockdomain *
> > > + *
> > > + * XXX fix doco
> >
> > hmm, 'doco' must be a new lingo I haven't learned yet.
>
> Thanks, will fix these.
Here's the revised patch.
- Paul
^ permalink raw reply [flat|nested] 38+ messages in thread
* [PATCH 06/11] OMAP4: CM instances: add clockdomain register offsets
2010-12-08 6:18 [PATCH 00/11] OMAP: PRCM/powerdomain/clockdomain patches for 2.6.38, part two Paul Walmsley
` (4 preceding siblings ...)
2010-12-08 6:18 ` [PATCH 05/11] OMAP2+: clockdomains: split the clkdm hwsup enable/disable function Paul Walmsley
@ 2010-12-08 6:18 ` Paul Walmsley
2010-12-08 6:18 ` [PATCH 07/11] OMAP4: clockdomains: add OMAP4 PRCM data and OMAP4 support Paul Walmsley
` (7 subsequent siblings)
13 siblings, 0 replies; 38+ messages in thread
From: Paul Walmsley @ 2010-12-08 6:18 UTC (permalink / raw)
To: linux-arm-kernel
In OMAP4 CM instances, some registers (CM_CLKSTCTRL, CM_STATICDEP,
CM_DYNAMICDEP, and the module-specific registers underneath) are
organized by clockdomain. Add the clockdomain offset macros to the
appropriate PRCM module header files.
This data was almost completely autogenerated from the TI hardware
database; the autogeneration scripts have been updated.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Beno?t Cousson <b-cousson@ti.com>
---
arch/arm/mach-omap2/cm1_44xx.h | 5 +++++
arch/arm/mach-omap2/cm2_44xx.h | 19 +++++++++++++++++++
arch/arm/mach-omap2/prcm_mpu44xx.h | 5 +++++
arch/arm/mach-omap2/prm44xx.h | 15 +++++++++++++++
4 files changed, 44 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/cm1_44xx.h b/arch/arm/mach-omap2/cm1_44xx.h
index 63ef9e3..e2d7a56 100644
--- a/arch/arm/mach-omap2/cm1_44xx.h
+++ b/arch/arm/mach-omap2/cm1_44xx.h
@@ -40,6 +40,11 @@
#define OMAP4430_CM1_RESTORE_INST 0x0e00
#define OMAP4430_CM1_INSTR_INST 0x0f00
+/* CM1 clockdomain register offsets (from instance start) */
+#define OMAP4430_CM1_ABE_ABE_CDOFFS 0x0000
+#define OMAP4430_CM1_MPU_MPU_CDOFFS 0x0000
+#define OMAP4430_CM1_TESLA_TESLA_CDOFFS 0x0000
+
/* CM1 */
/* CM1.OCP_SOCKET_CM1 register offsets */
diff --git a/arch/arm/mach-omap2/cm2_44xx.h b/arch/arm/mach-omap2/cm2_44xx.h
index 0fd0210..aa47450 100644
--- a/arch/arm/mach-omap2/cm2_44xx.h
+++ b/arch/arm/mach-omap2/cm2_44xx.h
@@ -46,6 +46,25 @@
#define OMAP4430_CM2_RESTORE_INST 0x1e00
#define OMAP4430_CM2_INSTR_INST 0x1f00
+/* CM2 clockdomain register offsets (from instance start) */
+#define OMAP4430_CM2_ALWAYS_ON_ALWON_CDOFFS 0x0000
+#define OMAP4430_CM2_CORE_L3_1_CDOFFS 0x0000
+#define OMAP4430_CM2_CORE_L3_2_CDOFFS 0x0100
+#define OMAP4430_CM2_CORE_DUCATI_CDOFFS 0x0200
+#define OMAP4430_CM2_CORE_SDMA_CDOFFS 0x0300
+#define OMAP4430_CM2_CORE_MEMIF_CDOFFS 0x0400
+#define OMAP4430_CM2_CORE_D2D_CDOFFS 0x0500
+#define OMAP4430_CM2_CORE_L4CFG_CDOFFS 0x0600
+#define OMAP4430_CM2_CORE_L3INSTR_CDOFFS 0x0700
+#define OMAP4430_CM2_IVAHD_IVAHD_CDOFFS 0x0000
+#define OMAP4430_CM2_CAM_CAM_CDOFFS 0x0000
+#define OMAP4430_CM2_DSS_DSS_CDOFFS 0x0000
+#define OMAP4430_CM2_GFX_GFX_CDOFFS 0x0000
+#define OMAP4430_CM2_L3INIT_L3INIT_CDOFFS 0x0000
+#define OMAP4430_CM2_L4PER_L4PER_CDOFFS 0x0000
+#define OMAP4430_CM2_L4PER_L4SEC_CDOFFS 0x0180
+#define OMAP4430_CM2_CEFUSE_CEFUSE_CDOFFS 0x0000
+
/* CM2 */
diff --git a/arch/arm/mach-omap2/prcm_mpu44xx.h b/arch/arm/mach-omap2/prcm_mpu44xx.h
index e5190e9..729a644 100644
--- a/arch/arm/mach-omap2/prcm_mpu44xx.h
+++ b/arch/arm/mach-omap2/prcm_mpu44xx.h
@@ -37,6 +37,11 @@
#define OMAP4430_PRCM_MPU_CPU0_INST 0x0400
#define OMAP4430_PRCM_MPU_CPU1_INST 0x0800
+/* PRCM_MPU clockdomain register offsets (from instance start) */
+#define OMAP4430_PRCM_MPU_CPU0_MPU_CDOFFS 0x0000
+#define OMAP4430_PRCM_MPU_CPU1_MPU_CDOFFS 0x0000
+
+
/*
* PRCM_MPU
*
diff --git a/arch/arm/mach-omap2/prm44xx.h b/arch/arm/mach-omap2/prm44xx.h
index 95542ae..67a0d3f 100644
--- a/arch/arm/mach-omap2/prm44xx.h
+++ b/arch/arm/mach-omap2/prm44xx.h
@@ -56,6 +56,21 @@
#define OMAP4430_PRM_DEVICE_INST 0x1b00
#define OMAP4430_PRM_INSTR_INST 0x1f00
+/* PRM clockdomain register offsets (from instance start) */
+#define OMAP4430_PRM_MPU_MPU_CDOFFS 0x0000
+#define OMAP4430_PRM_TESLA_TESLA_CDOFFS 0x0000
+#define OMAP4430_PRM_ABE_ABE_CDOFFS 0x0000
+#define OMAP4430_PRM_CORE_CORE_CDOFFS 0x0000
+#define OMAP4430_PRM_IVAHD_IVAHD_CDOFFS 0x0000
+#define OMAP4430_PRM_CAM_CAM_CDOFFS 0x0000
+#define OMAP4430_PRM_DSS_DSS_CDOFFS 0x0000
+#define OMAP4430_PRM_GFX_GFX_CDOFFS 0x0000
+#define OMAP4430_PRM_L3INIT_L3INIT_CDOFFS 0x0000
+#define OMAP4430_PRM_L4PER_L4PER_CDOFFS 0x0000
+#define OMAP4430_PRM_CEFUSE_CEFUSE_CDOFFS 0x0000
+#define OMAP4430_PRM_WKUP_CM_WKUP_CDOFFS 0x0000
+#define OMAP4430_PRM_EMU_EMU_CDOFFS 0x0000
+#define OMAP4430_PRM_EMU_CM_EMU_CDOFFS 0x0000
/* OMAP4 specific register offsets */
#define OMAP4_RM_RSTCTRL 0x0000
^ permalink raw reply related [flat|nested] 38+ messages in thread* [PATCH 07/11] OMAP4: clockdomains: add OMAP4 PRCM data and OMAP4 support
2010-12-08 6:18 [PATCH 00/11] OMAP: PRCM/powerdomain/clockdomain patches for 2.6.38, part two Paul Walmsley
` (5 preceding siblings ...)
2010-12-08 6:18 ` [PATCH 06/11] OMAP4: CM instances: add clockdomain register offsets Paul Walmsley
@ 2010-12-08 6:18 ` Paul Walmsley
2010-12-08 6:18 ` [PATCH 08/11] OMAP2/3: clockdomain: remove unneeded .clkstctrl_reg, remove some direct CM register accesses Paul Walmsley
` (6 subsequent siblings)
13 siblings, 0 replies; 38+ messages in thread
From: Paul Walmsley @ 2010-12-08 6:18 UTC (permalink / raw)
To: linux-arm-kernel
Add PRCM partition, CM instance register address offset, and clockdomain
register address offset to each OMAP4 struct clockdomain record. Add OMAP4
clockdomain code to use this new data to access registers properly.
While here, clean up some nearby clockdomain code to allocate auto variables
in my recollection of Linus's preferred style.
The autogeneration scripts have been updated.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Rajendra Nayak <rnayak@ti.com>
Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
Cc: Beno?t Cousson <b-cousson@ti.com>
---
arch/arm/mach-omap2/clockdomain.c | 75 ++++++++++++---
arch/arm/mach-omap2/clockdomains44xx_data.c | 121 +++++++++++++++----------
arch/arm/mach-omap2/cm-regbits-34xx.h | 11 ++
arch/arm/mach-omap2/cminst44xx.c | 105 ++++++++++++++++++++++
arch/arm/plat-omap/include/plat/clockdomain.h | 20 +++-
5 files changed, 260 insertions(+), 72 deletions(-)
diff --git a/arch/arm/mach-omap2/clockdomain.c b/arch/arm/mach-omap2/clockdomain.c
index b1a6908..f83a1d4 100644
--- a/arch/arm/mach-omap2/clockdomain.c
+++ b/arch/arm/mach-omap2/clockdomain.c
@@ -29,6 +29,9 @@
#include "prm2xxx_3xxx.h"
#include "prm-regbits-24xx.h"
#include "cm2xxx_3xxx.h"
+#include "cm-regbits-34xx.h"
+#include "cminst44xx.h"
+#include "prcm44xx.h"
#include <plat/clock.h>
#include <plat/powerdomain.h>
@@ -245,13 +248,21 @@ static void _enable_hwsup(struct clockdomain *clkdm)
if (cpu_is_omap24xx())
bits = OMAP24XX_CLKSTCTRL_ENABLE_AUTO;
- else if (cpu_is_omap34xx() || cpu_is_omap44xx())
+ else if (cpu_is_omap34xx())
bits = OMAP34XX_CLKSTCTRL_ENABLE_AUTO;
+ else if (cpu_is_omap44xx())
+ return omap4_cminst_clkdm_enable_hwsup(clkdm->prcm_partition,
+ clkdm->cm_inst,
+ clkdm->clkdm_offs);
else
BUG();
bits = bits << __ffs(clkdm->clktrctrl_mask);
+ /*
+ * XXX clkstctrl_reg is known on OMAP2 - this clkdm
+ * field is not needed
+ */
v = __raw_readl(clkdm->clkstctrl_reg);
v &= ~(clkdm->clktrctrl_mask);
v |= bits;
@@ -271,21 +282,27 @@ static void _disable_hwsup(struct clockdomain *clkdm)
{
u32 bits, v;
- if (cpu_is_omap24xx()) {
+ if (cpu_is_omap24xx())
bits = OMAP24XX_CLKSTCTRL_DISABLE_AUTO;
- } else if (cpu_is_omap34xx() || cpu_is_omap44xx()) {
+ else if (cpu_is_omap34xx())
bits = OMAP34XX_CLKSTCTRL_DISABLE_AUTO;
- } else {
+ else if (cpu_is_omap44xx())
+ return omap4_cminst_clkdm_disable_hwsup(clkdm->prcm_partition,
+ clkdm->cm_inst,
+ clkdm->clkdm_offs);
+ else
BUG();
- }
bits = bits << __ffs(clkdm->clktrctrl_mask);
+ /*
+ * XXX clkstctrl_reg is known on OMAP2 - this clkdm
+ * field is not needed
+ */
v = __raw_readl(clkdm->clkstctrl_reg);
v &= ~(clkdm->clktrctrl_mask);
v |= bits;
__raw_writel(v, clkdm->clkstctrl_reg);
-
}
/* Public functions */
@@ -723,14 +740,20 @@ int clkdm_clear_all_sleepdeps(struct clockdomain *clkdm)
*/
static int omap2_clkdm_clktrctrl_read(struct clockdomain *clkdm)
{
- u32 v;
+ u32 v = 0;
if (!clkdm)
return -EINVAL;
- v = __raw_readl(clkdm->clkstctrl_reg);
- v &= clkdm->clktrctrl_mask;
- v >>= __ffs(clkdm->clktrctrl_mask);
+ if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
+ v = __raw_readl(clkdm->clkstctrl_reg);
+ v &= clkdm->clktrctrl_mask;
+ v >>= __ffs(clkdm->clktrctrl_mask);
+ } else if (cpu_is_omap44xx()) {
+ pr_warn("OMAP4 clockdomain: missing wakeup/sleep deps\n");
+ } else {
+ BUG();
+ }
return v;
}
@@ -746,6 +769,8 @@ static int omap2_clkdm_clktrctrl_read(struct clockdomain *clkdm)
*/
int omap2_clkdm_sleep(struct clockdomain *clkdm)
{
+ u32 bits, v;
+
if (!clkdm)
return -EINVAL;
@@ -762,16 +787,22 @@ int omap2_clkdm_sleep(struct clockdomain *clkdm)
omap2_cm_set_mod_reg_bits(OMAP24XX_FORCESTATE_MASK,
clkdm->pwrdm.ptr->prcm_offs, OMAP2_PM_PWSTCTRL);
- } else if (cpu_is_omap34xx() || cpu_is_omap44xx()) {
+ } else if (cpu_is_omap34xx()) {
- u32 bits = (OMAP34XX_CLKSTCTRL_FORCE_SLEEP <<
- __ffs(clkdm->clktrctrl_mask));
+ bits = (OMAP34XX_CLKSTCTRL_FORCE_SLEEP <<
+ __ffs(clkdm->clktrctrl_mask));
- u32 v = __raw_readl(clkdm->clkstctrl_reg);
+ v = __raw_readl(clkdm->clkstctrl_reg);
v &= ~(clkdm->clktrctrl_mask);
v |= bits;
__raw_writel(v, clkdm->clkstctrl_reg);
+ } else if (cpu_is_omap44xx()) {
+
+ omap4_cminst_clkdm_force_sleep(clkdm->prcm_partition,
+ clkdm->cm_inst,
+ clkdm->clkdm_offs);
+
} else {
BUG();
};
@@ -790,6 +821,8 @@ int omap2_clkdm_sleep(struct clockdomain *clkdm)
*/
int omap2_clkdm_wakeup(struct clockdomain *clkdm)
{
+ u32 bits, v;
+
if (!clkdm)
return -EINVAL;
@@ -806,16 +839,22 @@ int omap2_clkdm_wakeup(struct clockdomain *clkdm)
omap2_cm_clear_mod_reg_bits(OMAP24XX_FORCESTATE_MASK,
clkdm->pwrdm.ptr->prcm_offs, OMAP2_PM_PWSTCTRL);
- } else if (cpu_is_omap34xx() || cpu_is_omap44xx()) {
+ } else if (cpu_is_omap34xx()) {
- u32 bits = (OMAP34XX_CLKSTCTRL_FORCE_WAKEUP <<
- __ffs(clkdm->clktrctrl_mask));
+ bits = (OMAP34XX_CLKSTCTRL_FORCE_WAKEUP <<
+ __ffs(clkdm->clktrctrl_mask));
- u32 v = __raw_readl(clkdm->clkstctrl_reg);
+ v = __raw_readl(clkdm->clkstctrl_reg);
v &= ~(clkdm->clktrctrl_mask);
v |= bits;
__raw_writel(v, clkdm->clkstctrl_reg);
+ } else if (cpu_is_omap44xx()) {
+
+ omap4_cminst_clkdm_force_wakeup(clkdm->prcm_partition,
+ clkdm->cm_inst,
+ clkdm->clkdm_offs);
+
} else {
BUG();
};
diff --git a/arch/arm/mach-omap2/clockdomains44xx_data.c b/arch/arm/mach-omap2/clockdomains44xx_data.c
index 7fc81f6..2d3d1ef 100644
--- a/arch/arm/mach-omap2/clockdomains44xx_data.c
+++ b/arch/arm/mach-omap2/clockdomains44xx_data.c
@@ -34,14 +34,16 @@
#include "cm2_44xx.h"
#include "cm-regbits-44xx.h"
#include "prm44xx.h"
+#include "prcm44xx.h"
#include "prcm_mpu44xx.h"
static struct clockdomain l4_cefuse_44xx_clkdm = {
.name = "l4_cefuse_clkdm",
.pwrdm = { .name = "cefuse_pwrdm" },
- .clkstctrl_reg = OMAP4430_CM_CEFUSE_CLKSTCTRL,
- .clktrctrl_mask = OMAP4430_CLKTRCTRL_MASK,
+ .prcm_partition = OMAP4430_CM2_PARTITION,
+ .cm_inst = OMAP4430_CM2_CEFUSE_INST,
+ .clkdm_offs = OMAP4430_CM2_CEFUSE_CEFUSE_CDOFFS,
.flags = CLKDM_CAN_FORCE_WAKEUP | CLKDM_CAN_HWSUP,
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
};
@@ -49,8 +51,9 @@ static struct clockdomain l4_cefuse_44xx_clkdm = {
static struct clockdomain l4_cfg_44xx_clkdm = {
.name = "l4_cfg_clkdm",
.pwrdm = { .name = "core_pwrdm" },
- .clkstctrl_reg = OMAP4430_CM_L4CFG_CLKSTCTRL,
- .clktrctrl_mask = OMAP4430_CLKTRCTRL_MASK,
+ .prcm_partition = OMAP4430_CM2_PARTITION,
+ .cm_inst = OMAP4430_CM2_CORE_INST,
+ .clkdm_offs = OMAP4430_CM2_CORE_L4CFG_CDOFFS,
.flags = CLKDM_CAN_HWSUP,
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
};
@@ -58,8 +61,9 @@ static struct clockdomain l4_cfg_44xx_clkdm = {
static struct clockdomain tesla_44xx_clkdm = {
.name = "tesla_clkdm",
.pwrdm = { .name = "tesla_pwrdm" },
- .clkstctrl_reg = OMAP4430_CM_TESLA_CLKSTCTRL,
- .clktrctrl_mask = OMAP4430_CLKTRCTRL_MASK,
+ .prcm_partition = OMAP4430_CM1_PARTITION,
+ .cm_inst = OMAP4430_CM1_TESLA_INST,
+ .clkdm_offs = OMAP4430_CM1_TESLA_TESLA_CDOFFS,
.flags = CLKDM_CAN_HWSUP_SWSUP,
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
};
@@ -67,8 +71,9 @@ static struct clockdomain tesla_44xx_clkdm = {
static struct clockdomain l3_gfx_44xx_clkdm = {
.name = "l3_gfx_clkdm",
.pwrdm = { .name = "gfx_pwrdm" },
- .clkstctrl_reg = OMAP4430_CM_GFX_CLKSTCTRL,
- .clktrctrl_mask = OMAP4430_CLKTRCTRL_MASK,
+ .prcm_partition = OMAP4430_CM2_PARTITION,
+ .cm_inst = OMAP4430_CM2_GFX_INST,
+ .clkdm_offs = OMAP4430_CM2_GFX_GFX_CDOFFS,
.flags = CLKDM_CAN_HWSUP_SWSUP,
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
};
@@ -76,8 +81,9 @@ static struct clockdomain l3_gfx_44xx_clkdm = {
static struct clockdomain ivahd_44xx_clkdm = {
.name = "ivahd_clkdm",
.pwrdm = { .name = "ivahd_pwrdm" },
- .clkstctrl_reg = OMAP4430_CM_IVAHD_CLKSTCTRL,
- .clktrctrl_mask = OMAP4430_CLKTRCTRL_MASK,
+ .prcm_partition = OMAP4430_CM2_PARTITION,
+ .cm_inst = OMAP4430_CM2_IVAHD_INST,
+ .clkdm_offs = OMAP4430_CM2_IVAHD_IVAHD_CDOFFS,
.flags = CLKDM_CAN_HWSUP_SWSUP,
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
};
@@ -85,8 +91,9 @@ static struct clockdomain ivahd_44xx_clkdm = {
static struct clockdomain l4_secure_44xx_clkdm = {
.name = "l4_secure_clkdm",
.pwrdm = { .name = "l4per_pwrdm" },
- .clkstctrl_reg = OMAP4430_CM_L4SEC_CLKSTCTRL,
- .clktrctrl_mask = OMAP4430_CLKTRCTRL_MASK,
+ .prcm_partition = OMAP4430_CM2_PARTITION,
+ .cm_inst = OMAP4430_CM2_L4PER_INST,
+ .clkdm_offs = OMAP4430_CM2_L4PER_L4SEC_CDOFFS,
.flags = CLKDM_CAN_HWSUP_SWSUP,
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
};
@@ -94,8 +101,9 @@ static struct clockdomain l4_secure_44xx_clkdm = {
static struct clockdomain l4_per_44xx_clkdm = {
.name = "l4_per_clkdm",
.pwrdm = { .name = "l4per_pwrdm" },
- .clkstctrl_reg = OMAP4430_CM_L4PER_CLKSTCTRL,
- .clktrctrl_mask = OMAP4430_CLKTRCTRL_MASK,
+ .prcm_partition = OMAP4430_CM2_PARTITION,
+ .cm_inst = OMAP4430_CM2_L4PER_INST,
+ .clkdm_offs = OMAP4430_CM2_L4PER_L4PER_CDOFFS,
.flags = CLKDM_CAN_HWSUP_SWSUP,
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
};
@@ -103,8 +111,9 @@ static struct clockdomain l4_per_44xx_clkdm = {
static struct clockdomain abe_44xx_clkdm = {
.name = "abe_clkdm",
.pwrdm = { .name = "abe_pwrdm" },
- .clkstctrl_reg = OMAP4430_CM1_ABE_CLKSTCTRL,
- .clktrctrl_mask = OMAP4430_CLKTRCTRL_MASK,
+ .prcm_partition = OMAP4430_CM1_PARTITION,
+ .cm_inst = OMAP4430_CM1_ABE_INST,
+ .clkdm_offs = OMAP4430_CM1_ABE_ABE_CDOFFS,
.flags = CLKDM_CAN_HWSUP_SWSUP,
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
};
@@ -112,16 +121,18 @@ static struct clockdomain abe_44xx_clkdm = {
static struct clockdomain l3_instr_44xx_clkdm = {
.name = "l3_instr_clkdm",
.pwrdm = { .name = "core_pwrdm" },
- .clkstctrl_reg = OMAP4430_CM_L3INSTR_CLKSTCTRL,
- .clktrctrl_mask = OMAP4430_CLKTRCTRL_MASK,
+ .prcm_partition = OMAP4430_CM2_PARTITION,
+ .cm_inst = OMAP4430_CM2_CORE_INST,
+ .clkdm_offs = OMAP4430_CM2_CORE_L3INSTR_CDOFFS,
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
};
static struct clockdomain l3_init_44xx_clkdm = {
.name = "l3_init_clkdm",
.pwrdm = { .name = "l3init_pwrdm" },
- .clkstctrl_reg = OMAP4430_CM_L3INIT_CLKSTCTRL,
- .clktrctrl_mask = OMAP4430_CLKTRCTRL_MASK,
+ .prcm_partition = OMAP4430_CM2_PARTITION,
+ .cm_inst = OMAP4430_CM2_L3INIT_INST,
+ .clkdm_offs = OMAP4430_CM2_L3INIT_L3INIT_CDOFFS,
.flags = CLKDM_CAN_HWSUP_SWSUP,
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
};
@@ -129,8 +140,9 @@ static struct clockdomain l3_init_44xx_clkdm = {
static struct clockdomain mpuss_44xx_clkdm = {
.name = "mpuss_clkdm",
.pwrdm = { .name = "mpu_pwrdm" },
- .clkstctrl_reg = OMAP4430_CM_MPU_CLKSTCTRL,
- .clktrctrl_mask = OMAP4430_CLKTRCTRL_MASK,
+ .prcm_partition = OMAP4430_CM1_PARTITION,
+ .cm_inst = OMAP4430_CM1_MPU_INST,
+ .clkdm_offs = OMAP4430_CM1_MPU_MPU_CDOFFS,
.flags = CLKDM_CAN_FORCE_WAKEUP | CLKDM_CAN_HWSUP,
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
};
@@ -138,8 +150,9 @@ static struct clockdomain mpuss_44xx_clkdm = {
static struct clockdomain mpu0_44xx_clkdm = {
.name = "mpu0_clkdm",
.pwrdm = { .name = "cpu0_pwrdm" },
- .clkstctrl_reg = OMAP4430_CM_CPU0_CLKSTCTRL,
- .clktrctrl_mask = OMAP4430_CLKTRCTRL_MASK,
+ .prcm_partition = OMAP4430_PRCM_MPU_PARTITION,
+ .cm_inst = OMAP4430_PRCM_MPU_CPU0_INST,
+ .clkdm_offs = OMAP4430_PRCM_MPU_CPU0_MPU_CDOFFS,
.flags = CLKDM_CAN_FORCE_WAKEUP | CLKDM_CAN_HWSUP,
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
};
@@ -147,8 +160,9 @@ static struct clockdomain mpu0_44xx_clkdm = {
static struct clockdomain mpu1_44xx_clkdm = {
.name = "mpu1_clkdm",
.pwrdm = { .name = "cpu1_pwrdm" },
- .clkstctrl_reg = OMAP4430_CM_CPU1_CLKSTCTRL,
- .clktrctrl_mask = OMAP4430_CLKTRCTRL_MASK,
+ .prcm_partition = OMAP4430_PRCM_MPU_PARTITION,
+ .cm_inst = OMAP4430_PRCM_MPU_CPU1_INST,
+ .clkdm_offs = OMAP4430_PRCM_MPU_CPU1_MPU_CDOFFS,
.flags = CLKDM_CAN_FORCE_WAKEUP | CLKDM_CAN_HWSUP,
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
};
@@ -156,8 +170,9 @@ static struct clockdomain mpu1_44xx_clkdm = {
static struct clockdomain l3_emif_44xx_clkdm = {
.name = "l3_emif_clkdm",
.pwrdm = { .name = "core_pwrdm" },
- .clkstctrl_reg = OMAP4430_CM_MEMIF_CLKSTCTRL,
- .clktrctrl_mask = OMAP4430_CLKTRCTRL_MASK,
+ .prcm_partition = OMAP4430_CM2_PARTITION,
+ .cm_inst = OMAP4430_CM2_CORE_INST,
+ .clkdm_offs = OMAP4430_CM2_CORE_MEMIF_CDOFFS,
.flags = CLKDM_CAN_FORCE_WAKEUP | CLKDM_CAN_HWSUP,
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
};
@@ -165,8 +180,9 @@ static struct clockdomain l3_emif_44xx_clkdm = {
static struct clockdomain l4_ao_44xx_clkdm = {
.name = "l4_ao_clkdm",
.pwrdm = { .name = "always_on_core_pwrdm" },
- .clkstctrl_reg = OMAP4430_CM_ALWON_CLKSTCTRL,
- .clktrctrl_mask = OMAP4430_CLKTRCTRL_MASK,
+ .prcm_partition = OMAP4430_CM2_PARTITION,
+ .cm_inst = OMAP4430_CM2_ALWAYS_ON_INST,
+ .clkdm_offs = OMAP4430_CM2_ALWAYS_ON_ALWON_CDOFFS,
.flags = CLKDM_CAN_FORCE_WAKEUP | CLKDM_CAN_HWSUP,
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
};
@@ -174,8 +190,9 @@ static struct clockdomain l4_ao_44xx_clkdm = {
static struct clockdomain ducati_44xx_clkdm = {
.name = "ducati_clkdm",
.pwrdm = { .name = "core_pwrdm" },
- .clkstctrl_reg = OMAP4430_CM_DUCATI_CLKSTCTRL,
- .clktrctrl_mask = OMAP4430_CLKTRCTRL_MASK,
+ .prcm_partition = OMAP4430_CM2_PARTITION,
+ .cm_inst = OMAP4430_CM2_CORE_INST,
+ .clkdm_offs = OMAP4430_CM2_CORE_DUCATI_CDOFFS,
.flags = CLKDM_CAN_HWSUP_SWSUP,
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
};
@@ -183,8 +200,9 @@ static struct clockdomain ducati_44xx_clkdm = {
static struct clockdomain l3_2_44xx_clkdm = {
.name = "l3_2_clkdm",
.pwrdm = { .name = "core_pwrdm" },
- .clkstctrl_reg = OMAP4430_CM_L3_2_CLKSTCTRL,
- .clktrctrl_mask = OMAP4430_CLKTRCTRL_MASK,
+ .prcm_partition = OMAP4430_CM2_PARTITION,
+ .cm_inst = OMAP4430_CM2_CORE_INST,
+ .clkdm_offs = OMAP4430_CM2_CORE_L3_2_CDOFFS,
.flags = CLKDM_CAN_HWSUP,
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
};
@@ -192,8 +210,9 @@ static struct clockdomain l3_2_44xx_clkdm = {
static struct clockdomain l3_1_44xx_clkdm = {
.name = "l3_1_clkdm",
.pwrdm = { .name = "core_pwrdm" },
- .clkstctrl_reg = OMAP4430_CM_L3_1_CLKSTCTRL,
- .clktrctrl_mask = OMAP4430_CLKTRCTRL_MASK,
+ .prcm_partition = OMAP4430_CM2_PARTITION,
+ .cm_inst = OMAP4430_CM2_CORE_INST,
+ .clkdm_offs = OMAP4430_CM2_CORE_L3_1_CDOFFS,
.flags = CLKDM_CAN_HWSUP,
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
};
@@ -201,8 +220,9 @@ static struct clockdomain l3_1_44xx_clkdm = {
static struct clockdomain l3_d2d_44xx_clkdm = {
.name = "l3_d2d_clkdm",
.pwrdm = { .name = "core_pwrdm" },
- .clkstctrl_reg = OMAP4430_CM_D2D_CLKSTCTRL,
- .clktrctrl_mask = OMAP4430_CLKTRCTRL_MASK,
+ .prcm_partition = OMAP4430_CM2_PARTITION,
+ .cm_inst = OMAP4430_CM2_CORE_INST,
+ .clkdm_offs = OMAP4430_CM2_CORE_D2D_CDOFFS,
.flags = CLKDM_CAN_FORCE_WAKEUP | CLKDM_CAN_HWSUP,
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
};
@@ -210,8 +230,9 @@ static struct clockdomain l3_d2d_44xx_clkdm = {
static struct clockdomain iss_44xx_clkdm = {
.name = "iss_clkdm",
.pwrdm = { .name = "cam_pwrdm" },
- .clkstctrl_reg = OMAP4430_CM_CAM_CLKSTCTRL,
- .clktrctrl_mask = OMAP4430_CLKTRCTRL_MASK,
+ .prcm_partition = OMAP4430_CM2_PARTITION,
+ .cm_inst = OMAP4430_CM2_CAM_INST,
+ .clkdm_offs = OMAP4430_CM2_CAM_CAM_CDOFFS,
.flags = CLKDM_CAN_HWSUP_SWSUP,
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
};
@@ -219,8 +240,9 @@ static struct clockdomain iss_44xx_clkdm = {
static struct clockdomain l3_dss_44xx_clkdm = {
.name = "l3_dss_clkdm",
.pwrdm = { .name = "dss_pwrdm" },
- .clkstctrl_reg = OMAP4430_CM_DSS_CLKSTCTRL,
- .clktrctrl_mask = OMAP4430_CLKTRCTRL_MASK,
+ .prcm_partition = OMAP4430_CM2_PARTITION,
+ .cm_inst = OMAP4430_CM2_DSS_INST,
+ .clkdm_offs = OMAP4430_CM2_DSS_DSS_CDOFFS,
.flags = CLKDM_CAN_HWSUP_SWSUP,
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
};
@@ -228,8 +250,9 @@ static struct clockdomain l3_dss_44xx_clkdm = {
static struct clockdomain l4_wkup_44xx_clkdm = {
.name = "l4_wkup_clkdm",
.pwrdm = { .name = "wkup_pwrdm" },
- .clkstctrl_reg = OMAP4430_CM_WKUP_CLKSTCTRL,
- .clktrctrl_mask = OMAP4430_CLKTRCTRL_MASK,
+ .prcm_partition = OMAP4430_PRM_PARTITION,
+ .cm_inst = OMAP4430_PRM_WKUP_CM_INST,
+ .clkdm_offs = OMAP4430_PRM_WKUP_CM_WKUP_CDOFFS,
.flags = CLKDM_CAN_HWSUP,
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
};
@@ -237,8 +260,9 @@ static struct clockdomain l4_wkup_44xx_clkdm = {
static struct clockdomain emu_sys_44xx_clkdm = {
.name = "emu_sys_clkdm",
.pwrdm = { .name = "emu_pwrdm" },
- .clkstctrl_reg = OMAP4430_CM_EMU_CLKSTCTRL,
- .clktrctrl_mask = OMAP4430_CLKTRCTRL_MASK,
+ .prcm_partition = OMAP4430_PRM_PARTITION,
+ .cm_inst = OMAP4430_PRM_EMU_CM_INST,
+ .clkdm_offs = OMAP4430_PRM_EMU_CM_EMU_CDOFFS,
.flags = CLKDM_CAN_HWSUP,
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
};
@@ -246,8 +270,9 @@ static struct clockdomain emu_sys_44xx_clkdm = {
static struct clockdomain l3_dma_44xx_clkdm = {
.name = "l3_dma_clkdm",
.pwrdm = { .name = "core_pwrdm" },
- .clkstctrl_reg = OMAP4430_CM_SDMA_CLKSTCTRL,
- .clktrctrl_mask = OMAP4430_CLKTRCTRL_MASK,
+ .prcm_partition = OMAP4430_CM2_PARTITION,
+ .cm_inst = OMAP4430_CM2_CORE_INST,
+ .clkdm_offs = OMAP4430_CM2_CORE_SDMA_CDOFFS,
.flags = CLKDM_CAN_FORCE_WAKEUP | CLKDM_CAN_HWSUP,
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
};
diff --git a/arch/arm/mach-omap2/cm-regbits-34xx.h b/arch/arm/mach-omap2/cm-regbits-34xx.h
index cd9ff8b..b912759 100644
--- a/arch/arm/mach-omap2/cm-regbits-34xx.h
+++ b/arch/arm/mach-omap2/cm-regbits-34xx.h
@@ -798,4 +798,15 @@
#define OMAP3430ES2_CLKACTIVITY_USBHOST_SHIFT 0
#define OMAP3430ES2_CLKACTIVITY_USBHOST_MASK (1 << 0)
+/*
+ *
+ */
+
+/* OMAP3XXX CM_CLKSTCTRL_*.CLKTRCTRL_* register bit values */
+#define OMAP34XX_CLKSTCTRL_DISABLE_AUTO 0x0
+#define OMAP34XX_CLKSTCTRL_FORCE_SLEEP 0x1
+#define OMAP34XX_CLKSTCTRL_FORCE_WAKEUP 0x2
+#define OMAP34XX_CLKSTCTRL_ENABLE_AUTO 0x3
+
+
#endif
diff --git a/arch/arm/mach-omap2/cminst44xx.c b/arch/arm/mach-omap2/cminst44xx.c
index 2c0cad3..fa9d0b8 100644
--- a/arch/arm/mach-omap2/cminst44xx.c
+++ b/arch/arm/mach-omap2/cminst44xx.c
@@ -26,6 +26,7 @@
#include "cm2_44xx.h"
#include "cm44xx.h"
#include "cminst44xx.h"
+#include "cm-regbits-34xx.h"
#include "cm-regbits-44xx.h"
#include "prcm44xx.h"
#include "prm44xx.h"
@@ -81,6 +82,110 @@ u32 omap4_cminst_rmw_inst_reg_bits(u32 mask, u32 bits, u8 part,
return v;
}
+/*
+ *
+ */
+
+/**
+ * _clktrctrl_write - write @c to a CM_CLKSTCTRL.CLKTRCTRL register bitfield
+ * @c: CLKTRCTRL register bitfield (LSB = bit 0, i.e., unshifted)
+ * @part: PRCM partition ID that the CM_CLKSTCTRL register exists in
+ * @inst: CM instance register offset (*_INST macro)
+ * @cdoffs: Clockdomain register offset (*_CDOFFS macro)
+ *
+ * @c must be the unshifted value for CLKTRCTRL - i.e., this function
+ * will handle the shift itself.
+ */
+static void _clktrctrl_write(u8 c, u8 part, s16 inst, u16 cdoffs)
+{
+ u32 v;
+
+ v = omap4_cminst_read_inst_reg(part, inst, cdoffs + OMAP4_CM_CLKSTCTRL);
+ v &= ~OMAP4430_CLKTRCTRL_MASK;
+ v |= c << OMAP4430_CLKTRCTRL_SHIFT;
+ omap4_cminst_write_inst_reg(v, part, inst, cdoffs + OMAP4_CM_CLKSTCTRL);
+}
+
+/**
+ * omap4_cminst_is_clkdm_in_hwsup - is a clockdomain in hwsup idle mode?
+ * @part: PRCM partition ID that the CM_CLKSTCTRL register exists in
+ * @inst: CM instance register offset (*_INST macro)
+ * @cdoffs: Clockdomain register offset (*_CDOFFS macro)
+ *
+ * Returns true if the clockdomain referred to by (@part, @inst, @cdoffs)
+ * is in hardware-supervised idle mode, or 0 otherwise.
+ */
+bool omap4_cminst_is_clkdm_in_hwsup(u8 part, s16 inst, u16 cdoffs)
+{
+ u32 v;
+
+ v = omap4_cminst_read_inst_reg(part, inst, cdoffs + OMAP4_CM_CLKSTCTRL);
+ v &= OMAP4430_CLKTRCTRL_MASK;
+ v >>= OMAP4430_CLKTRCTRL_SHIFT;
+
+ return (v == OMAP34XX_CLKSTCTRL_ENABLE_AUTO) ? true : false;
+}
+
+/**
+ * omap4_cminst_clkdm_enable_hwsup - put a clockdomain in hwsup-idle mode
+ * @part: PRCM partition ID that the clockdomain registers exist in
+ * @inst: CM instance register offset (*_INST macro)
+ * @cdoffs: Clockdomain register offset (*_CDOFFS macro)
+ *
+ * Put a clockdomain referred to by (@part, @inst, @cdoffs) into
+ * hardware-supervised idle mode. No return value.
+ */
+void omap4_cminst_clkdm_enable_hwsup(u8 part, s16 inst, u16 cdoffs)
+{
+ _clktrctrl_write(OMAP34XX_CLKSTCTRL_ENABLE_AUTO, part, inst, cdoffs);
+}
+
+/**
+ * omap4_cminst_clkdm_disable_hwsup - put a clockdomain in swsup-idle mode
+ * @part: PRCM partition ID that the clockdomain registers exist in
+ * @inst: CM instance register offset (*_INST macro)
+ * @cdoffs: Clockdomain register offset (*_CDOFFS macro)
+ *
+ * Put a clockdomain referred to by (@part, @inst, @cdoffs) into
+ * software-supervised idle mode, i.e., controlled manually by the
+ * Linux OMAP clockdomain code. No return value.
+ */
+void omap4_cminst_clkdm_disable_hwsup(u8 part, s16 inst, u16 cdoffs)
+{
+ _clktrctrl_write(OMAP34XX_CLKSTCTRL_DISABLE_AUTO, part, inst, cdoffs);
+}
+
+/**
+ * omap4_cminst_clkdm_force_sleep - try to put a clockdomain into idle
+ * @part: PRCM partition ID that the clockdomain registers exist in
+ * @inst: CM instance register offset (*_INST macro)
+ * @cdoffs: Clockdomain register offset (*_CDOFFS macro)
+ *
+ * Put a clockdomain referred to by (@part, @inst, @cdoffs) into idle
+ * No return value.
+ */
+void omap4_cminst_clkdm_force_sleep(u8 part, s16 inst, u16 cdoffs)
+{
+ _clktrctrl_write(OMAP34XX_CLKSTCTRL_FORCE_SLEEP, part, inst, cdoffs);
+}
+
+/**
+ * omap4_cminst_clkdm_force_sleep - try to take a clockdomain out of idle
+ * @part: PRCM partition ID that the clockdomain registers exist in
+ * @inst: CM instance register offset (*_INST macro)
+ * @cdoffs: Clockdomain register offset (*_CDOFFS macro)
+ *
+ * Take a clockdomain referred to by (@part, @inst, @cdoffs) out of idle,
+ * waking it up. No return value.
+ */
+void omap4_cminst_clkdm_force_wakeup(u8 part, s16 inst, u16 cdoffs)
+{
+ _clktrctrl_write(OMAP34XX_CLKSTCTRL_FORCE_WAKEUP, part, inst, cdoffs);
+}
+
+/*
+ *
+ */
/**
* omap4_cm_wait_module_ready - wait for a module to be in 'func' state
diff --git a/arch/arm/plat-omap/include/plat/clockdomain.h b/arch/arm/plat-omap/include/plat/clockdomain.h
index a5f8579..ec433c3 100644
--- a/arch/arm/plat-omap/include/plat/clockdomain.h
+++ b/arch/arm/plat-omap/include/plat/clockdomain.h
@@ -38,12 +38,6 @@
#define OMAP24XX_CLKSTCTRL_DISABLE_AUTO 0x0
#define OMAP24XX_CLKSTCTRL_ENABLE_AUTO 0x1
-/* OMAP3XXX CM_CLKSTCTRL_*.CLKTRCTRL_* register bit values */
-#define OMAP34XX_CLKSTCTRL_DISABLE_AUTO 0x0
-#define OMAP34XX_CLKSTCTRL_FORCE_SLEEP 0x1
-#define OMAP34XX_CLKSTCTRL_FORCE_WAKEUP 0x2
-#define OMAP34XX_CLKSTCTRL_ENABLE_AUTO 0x3
-
/**
* struct clkdm_autodep - clkdm deps to add when entering/exiting hwsup mode
* @clkdm: clockdomain to add wkdep+sleepdep on - set name member only
@@ -94,11 +88,20 @@ struct clkdm_dep {
* @clktrctrl_mask: CLKTRCTRL/AUTOSTATE field mask in CM_CLKSTCTRL reg
* @flags: Clockdomain capability flags
* @dep_bit: Bit shift of this clockdomain's PM_WKDEP/CM_SLEEPDEP bit
+ * @prcm_partition: (OMAP4 only) PRCM partition ID for this clkdm's registers
+ * @cm_inst: (OMAP4 only) CM instance register offset
+ * @clkdm_offs: (OMAP4 only) CM clockdomain register offset
* @wkdep_srcs: Clockdomains that can be told to wake this powerdomain up
* @sleepdep_srcs: Clockdomains that can be told to keep this clkdm from inact
* @omap_chip: OMAP chip types that this clockdomain is valid on
* @usecount: Usecount tracking
* @node: list_head to link all clockdomains together
+ *
+ * @prcm_partition should be a macro from mach-omap2/prcm44xx.h (OMAP4 only)
+ * @cm_inst should be a macro ending in _INST from the OMAP4 CM instance
+ * definitions (OMAP4 only)
+ * @clkdm_offs should be a macro ending in _CDOFFS from the OMAP4 CM instance
+ * definitions (OMAP4 only)
*/
struct clockdomain {
const char *name;
@@ -106,10 +109,15 @@ struct clockdomain {
const char *name;
struct powerdomain *ptr;
} pwrdm;
+#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
void __iomem *clkstctrl_reg;
const u16 clktrctrl_mask;
+#endif
const u8 flags;
const u8 dep_bit;
+ const u8 prcm_partition;
+ const s16 cm_inst;
+ const u16 clkdm_offs;
struct clkdm_dep *wkdep_srcs;
struct clkdm_dep *sleepdep_srcs;
const struct omap_chip_id omap_chip;
^ permalink raw reply related [flat|nested] 38+ messages in thread* [PATCH 08/11] OMAP2/3: clockdomain: remove unneeded .clkstctrl_reg, remove some direct CM register accesses
2010-12-08 6:18 [PATCH 00/11] OMAP: PRCM/powerdomain/clockdomain patches for 2.6.38, part two Paul Walmsley
` (6 preceding siblings ...)
2010-12-08 6:18 ` [PATCH 07/11] OMAP4: clockdomains: add OMAP4 PRCM data and OMAP4 support Paul Walmsley
@ 2010-12-08 6:18 ` Paul Walmsley
2010-12-08 6:18 ` [PATCH 09/11] OMAP2+: clockdomain: move header file from plat-omap to mach-omap2 Paul Walmsley
` (5 subsequent siblings)
13 siblings, 0 replies; 38+ messages in thread
From: Paul Walmsley @ 2010-12-08 6:18 UTC (permalink / raw)
To: linux-arm-kernel
Reverse some of the effects of commit
84c0c39aec31a09571fc08a752a2f4da0fe9fcf2 ("ARM: OMAP4: PM: Make OMAP3
Clock-domain framework compatible for OMAP4"). On OMAP2/3, the
CM_CLKSTCTRL register is at a constant offset from the powerdomain's
CM instance.
Also, remove some of the direct CM register access from the
clockdomain code, moving it to the OMAP2/3 CM code instead. The
intention here is to simplify the clockdomain code. (The long-term
goal is to move all direct CM register access across the OMAP core
code to the appropriate cm*.c file.)
Signed-off-by: Paul Walmsley <paul@pwsan.com>
---
arch/arm/mach-omap2/clockdomain.c | 135 +++++++---------------
arch/arm/mach-omap2/clockdomains2xxx_3xxx_data.c | 40 -------
arch/arm/mach-omap2/cm-regbits-24xx.h | 5 +
arch/arm/mach-omap2/cm2xxx_3xxx.c | 68 +++++++++++
arch/arm/mach-omap2/cm2xxx_3xxx.h | 9 +
arch/arm/plat-omap/include/plat/clockdomain.h | 5 -
6 files changed, 127 insertions(+), 135 deletions(-)
diff --git a/arch/arm/mach-omap2/clockdomain.c b/arch/arm/mach-omap2/clockdomain.c
index f83a1d4..84cdd1d 100644
--- a/arch/arm/mach-omap2/clockdomain.c
+++ b/arch/arm/mach-omap2/clockdomain.c
@@ -29,7 +29,7 @@
#include "prm2xxx_3xxx.h"
#include "prm-regbits-24xx.h"
#include "cm2xxx_3xxx.h"
-#include "cm-regbits-34xx.h"
+#include "cm-regbits-24xx.h"
#include "cminst44xx.h"
#include "prcm44xx.h"
@@ -244,30 +244,18 @@ static void _clkdm_del_autodeps(struct clockdomain *clkdm)
*/
static void _enable_hwsup(struct clockdomain *clkdm)
{
- u32 bits, v;
-
if (cpu_is_omap24xx())
- bits = OMAP24XX_CLKSTCTRL_ENABLE_AUTO;
+ omap2xxx_cm_clkdm_enable_hwsup(clkdm->pwrdm.ptr->prcm_offs,
+ clkdm->clktrctrl_mask);
else if (cpu_is_omap34xx())
- bits = OMAP34XX_CLKSTCTRL_ENABLE_AUTO;
+ omap3xxx_cm_clkdm_enable_hwsup(clkdm->pwrdm.ptr->prcm_offs,
+ clkdm->clktrctrl_mask);
else if (cpu_is_omap44xx())
return omap4_cminst_clkdm_enable_hwsup(clkdm->prcm_partition,
clkdm->cm_inst,
clkdm->clkdm_offs);
else
BUG();
-
- bits = bits << __ffs(clkdm->clktrctrl_mask);
-
- /*
- * XXX clkstctrl_reg is known on OMAP2 - this clkdm
- * field is not needed
- */
- v = __raw_readl(clkdm->clkstctrl_reg);
- v &= ~(clkdm->clktrctrl_mask);
- v |= bits;
- __raw_writel(v, clkdm->clkstctrl_reg);
-
}
/**
@@ -280,29 +268,18 @@ static void _enable_hwsup(struct clockdomain *clkdm)
*/
static void _disable_hwsup(struct clockdomain *clkdm)
{
- u32 bits, v;
-
if (cpu_is_omap24xx())
- bits = OMAP24XX_CLKSTCTRL_DISABLE_AUTO;
+ omap2xxx_cm_clkdm_disable_hwsup(clkdm->pwrdm.ptr->prcm_offs,
+ clkdm->clktrctrl_mask);
else if (cpu_is_omap34xx())
- bits = OMAP34XX_CLKSTCTRL_DISABLE_AUTO;
+ omap3xxx_cm_clkdm_disable_hwsup(clkdm->pwrdm.ptr->prcm_offs,
+ clkdm->clktrctrl_mask);
else if (cpu_is_omap44xx())
return omap4_cminst_clkdm_disable_hwsup(clkdm->prcm_partition,
clkdm->cm_inst,
clkdm->clkdm_offs);
else
BUG();
-
- bits = bits << __ffs(clkdm->clktrctrl_mask);
-
- /*
- * XXX clkstctrl_reg is known on OMAP2 - this clkdm
- * field is not needed
- */
- v = __raw_readl(clkdm->clkstctrl_reg);
- v &= ~(clkdm->clktrctrl_mask);
- v |= bits;
- __raw_writel(v, clkdm->clkstctrl_reg);
}
/* Public functions */
@@ -731,34 +708,6 @@ int clkdm_clear_all_sleepdeps(struct clockdomain *clkdm)
}
/**
- * omap2_clkdm_clktrctrl_read - read the clkdm's current state transition mode
- * @clkdm: struct clkdm * of a clockdomain
- *
- * Return the clockdomain @clkdm current state transition mode from the
- * corresponding domain CM_CLKSTCTRL register. Returns -EINVAL if @clkdm
- * is NULL or the current mode upon success.
- */
-static int omap2_clkdm_clktrctrl_read(struct clockdomain *clkdm)
-{
- u32 v = 0;
-
- if (!clkdm)
- return -EINVAL;
-
- if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
- v = __raw_readl(clkdm->clkstctrl_reg);
- v &= clkdm->clktrctrl_mask;
- v >>= __ffs(clkdm->clktrctrl_mask);
- } else if (cpu_is_omap44xx()) {
- pr_warn("OMAP4 clockdomain: missing wakeup/sleep deps\n");
- } else {
- BUG();
- }
-
- return v;
-}
-
-/**
* omap2_clkdm_sleep - force clockdomain sleep transition
* @clkdm: struct clockdomain *
*
@@ -769,8 +718,6 @@ static int omap2_clkdm_clktrctrl_read(struct clockdomain *clkdm)
*/
int omap2_clkdm_sleep(struct clockdomain *clkdm)
{
- u32 bits, v;
-
if (!clkdm)
return -EINVAL;
@@ -789,13 +736,8 @@ int omap2_clkdm_sleep(struct clockdomain *clkdm)
} else if (cpu_is_omap34xx()) {
- bits = (OMAP34XX_CLKSTCTRL_FORCE_SLEEP <<
- __ffs(clkdm->clktrctrl_mask));
-
- v = __raw_readl(clkdm->clkstctrl_reg);
- v &= ~(clkdm->clktrctrl_mask);
- v |= bits;
- __raw_writel(v, clkdm->clkstctrl_reg);
+ omap3xxx_cm_clkdm_force_sleep(clkdm->pwrdm.ptr->prcm_offs,
+ clkdm->clktrctrl_mask);
} else if (cpu_is_omap44xx()) {
@@ -821,8 +763,6 @@ int omap2_clkdm_sleep(struct clockdomain *clkdm)
*/
int omap2_clkdm_wakeup(struct clockdomain *clkdm)
{
- u32 bits, v;
-
if (!clkdm)
return -EINVAL;
@@ -841,13 +781,8 @@ int omap2_clkdm_wakeup(struct clockdomain *clkdm)
} else if (cpu_is_omap34xx()) {
- bits = (OMAP34XX_CLKSTCTRL_FORCE_WAKEUP <<
- __ffs(clkdm->clktrctrl_mask));
-
- v = __raw_readl(clkdm->clkstctrl_reg);
- v &= ~(clkdm->clktrctrl_mask);
- v |= bits;
- __raw_writel(v, clkdm->clkstctrl_reg);
+ omap3xxx_cm_clkdm_force_wakeup(clkdm->pwrdm.ptr->prcm_offs,
+ clkdm->clktrctrl_mask);
} else if (cpu_is_omap44xx()) {
@@ -960,7 +895,7 @@ void omap2_clkdm_deny_idle(struct clockdomain *clkdm)
*/
int omap2_clkdm_clk_enable(struct clockdomain *clkdm, struct clk *clk)
{
- int v;
+ bool hwsup = false;
/*
* XXX Rewrite this code to maintain a list of enabled
@@ -978,13 +913,23 @@ int omap2_clkdm_clk_enable(struct clockdomain *clkdm, struct clk *clk)
pr_debug("clockdomain: clkdm %s: clk %s now enabled\n", clkdm->name,
clk->name);
- if (!clkdm->clkstctrl_reg)
- return 0;
+ if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
- v = omap2_clkdm_clktrctrl_read(clkdm);
+ if (!clkdm->clktrctrl_mask)
+ return 0;
+
+ hwsup = omap2_cm_is_clkdm_in_hwsup(clkdm->pwrdm.ptr->prcm_offs,
+ clkdm->clktrctrl_mask);
+
+ } else if (cpu_is_omap44xx()) {
+
+ hwsup = omap4_cminst_is_clkdm_in_hwsup(clkdm->prcm_partition,
+ clkdm->cm_inst,
+ clkdm->clkdm_offs);
- if ((cpu_is_omap34xx() && v == OMAP34XX_CLKSTCTRL_ENABLE_AUTO) ||
- (cpu_is_omap24xx() && v == OMAP24XX_CLKSTCTRL_ENABLE_AUTO)) {
+ }
+
+ if (hwsup) {
/* Disable HW transitions when we are changing deps */
_disable_hwsup(clkdm);
_clkdm_add_autodeps(clkdm);
@@ -1015,7 +960,7 @@ int omap2_clkdm_clk_enable(struct clockdomain *clkdm, struct clk *clk)
*/
int omap2_clkdm_clk_disable(struct clockdomain *clkdm, struct clk *clk)
{
- int v;
+ bool hwsup = false;
/*
* XXX Rewrite this code to maintain a list of enabled
@@ -1040,13 +985,23 @@ int omap2_clkdm_clk_disable(struct clockdomain *clkdm, struct clk *clk)
pr_debug("clockdomain: clkdm %s: clk %s now disabled\n", clkdm->name,
clk->name);
- if (!clkdm->clkstctrl_reg)
- return 0;
+ if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
+
+ if (!clkdm->clktrctrl_mask)
+ return 0;
+
+ hwsup = omap2_cm_is_clkdm_in_hwsup(clkdm->pwrdm.ptr->prcm_offs,
+ clkdm->clktrctrl_mask);
- v = omap2_clkdm_clktrctrl_read(clkdm);
+ } else if (cpu_is_omap44xx()) {
+
+ hwsup = omap4_cminst_is_clkdm_in_hwsup(clkdm->prcm_partition,
+ clkdm->cm_inst,
+ clkdm->clkdm_offs);
+
+ }
- if ((cpu_is_omap34xx() && v == OMAP34XX_CLKSTCTRL_ENABLE_AUTO) ||
- (cpu_is_omap24xx() && v == OMAP24XX_CLKSTCTRL_ENABLE_AUTO)) {
+ if (hwsup) {
/* Disable HW transitions when we are changing deps */
_disable_hwsup(clkdm);
_clkdm_del_autodeps(clkdm);
diff --git a/arch/arm/mach-omap2/clockdomains2xxx_3xxx_data.c b/arch/arm/mach-omap2/clockdomains2xxx_3xxx_data.c
index de1d3b7..6e9ec49 100644
--- a/arch/arm/mach-omap2/clockdomains2xxx_3xxx_data.c
+++ b/arch/arm/mach-omap2/clockdomains2xxx_3xxx_data.c
@@ -456,7 +456,6 @@ static struct clockdomain mpu_2420_clkdm = {
.name = "mpu_clkdm",
.pwrdm = { .name = "mpu_pwrdm" },
.flags = CLKDM_CAN_HWSUP,
- .clkstctrl_reg = OMAP2420_CM_REGADDR(MPU_MOD, OMAP2_CM_CLKSTCTRL),
.wkdep_srcs = mpu_24xx_wkdeps,
.clktrctrl_mask = OMAP24XX_AUTOSTATE_MPU_MASK,
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
@@ -466,8 +465,6 @@ static struct clockdomain iva1_2420_clkdm = {
.name = "iva1_clkdm",
.pwrdm = { .name = "dsp_pwrdm" },
.flags = CLKDM_CAN_HWSUP_SWSUP,
- .clkstctrl_reg = OMAP2420_CM_REGADDR(OMAP24XX_DSP_MOD,
- OMAP2_CM_CLKSTCTRL),
.dep_bit = OMAP24XX_PM_WKDEP_MPU_EN_DSP_SHIFT,
.wkdep_srcs = dsp_24xx_wkdeps,
.clktrctrl_mask = OMAP2420_AUTOSTATE_IVA_MASK,
@@ -478,8 +475,6 @@ static struct clockdomain dsp_2420_clkdm = {
.name = "dsp_clkdm",
.pwrdm = { .name = "dsp_pwrdm" },
.flags = CLKDM_CAN_HWSUP_SWSUP,
- .clkstctrl_reg = OMAP2420_CM_REGADDR(OMAP24XX_DSP_MOD,
- OMAP2_CM_CLKSTCTRL),
.clktrctrl_mask = OMAP24XX_AUTOSTATE_DSP_MASK,
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
};
@@ -488,7 +483,6 @@ static struct clockdomain gfx_2420_clkdm = {
.name = "gfx_clkdm",
.pwrdm = { .name = "gfx_pwrdm" },
.flags = CLKDM_CAN_HWSUP_SWSUP,
- .clkstctrl_reg = OMAP2420_CM_REGADDR(GFX_MOD, OMAP2_CM_CLKSTCTRL),
.wkdep_srcs = gfx_sgx_wkdeps,
.clktrctrl_mask = OMAP24XX_AUTOSTATE_GFX_MASK,
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
@@ -498,7 +492,6 @@ static struct clockdomain core_l3_2420_clkdm = {
.name = "core_l3_clkdm",
.pwrdm = { .name = "core_pwrdm" },
.flags = CLKDM_CAN_HWSUP,
- .clkstctrl_reg = OMAP2420_CM_REGADDR(CORE_MOD, OMAP2_CM_CLKSTCTRL),
.wkdep_srcs = core_24xx_wkdeps,
.clktrctrl_mask = OMAP24XX_AUTOSTATE_L3_MASK,
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
@@ -508,7 +501,6 @@ static struct clockdomain core_l4_2420_clkdm = {
.name = "core_l4_clkdm",
.pwrdm = { .name = "core_pwrdm" },
.flags = CLKDM_CAN_HWSUP,
- .clkstctrl_reg = OMAP2420_CM_REGADDR(CORE_MOD, OMAP2_CM_CLKSTCTRL),
.wkdep_srcs = core_24xx_wkdeps,
.clktrctrl_mask = OMAP24XX_AUTOSTATE_L4_MASK,
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
@@ -518,7 +510,6 @@ static struct clockdomain dss_2420_clkdm = {
.name = "dss_clkdm",
.pwrdm = { .name = "core_pwrdm" },
.flags = CLKDM_CAN_HWSUP,
- .clkstctrl_reg = OMAP2420_CM_REGADDR(CORE_MOD, OMAP2_CM_CLKSTCTRL),
.clktrctrl_mask = OMAP24XX_AUTOSTATE_DSS_MASK,
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
};
@@ -536,8 +527,6 @@ static struct clockdomain mpu_2430_clkdm = {
.name = "mpu_clkdm",
.pwrdm = { .name = "mpu_pwrdm" },
.flags = CLKDM_CAN_HWSUP_SWSUP,
- .clkstctrl_reg = OMAP2430_CM_REGADDR(MPU_MOD,
- OMAP2_CM_CLKSTCTRL),
.wkdep_srcs = mpu_24xx_wkdeps,
.clktrctrl_mask = OMAP24XX_AUTOSTATE_MPU_MASK,
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
@@ -548,8 +537,6 @@ static struct clockdomain mdm_clkdm = {
.name = "mdm_clkdm",
.pwrdm = { .name = "mdm_pwrdm" },
.flags = CLKDM_CAN_HWSUP_SWSUP,
- .clkstctrl_reg = OMAP2430_CM_REGADDR(OMAP2430_MDM_MOD,
- OMAP2_CM_CLKSTCTRL),
.dep_bit = OMAP2430_PM_WKDEP_MPU_EN_MDM_SHIFT,
.wkdep_srcs = mdm_2430_wkdeps,
.clktrctrl_mask = OMAP2430_AUTOSTATE_MDM_MASK,
@@ -560,8 +547,6 @@ static struct clockdomain dsp_2430_clkdm = {
.name = "dsp_clkdm",
.pwrdm = { .name = "dsp_pwrdm" },
.flags = CLKDM_CAN_HWSUP_SWSUP,
- .clkstctrl_reg = OMAP2430_CM_REGADDR(OMAP24XX_DSP_MOD,
- OMAP2_CM_CLKSTCTRL),
.dep_bit = OMAP24XX_PM_WKDEP_MPU_EN_DSP_SHIFT,
.wkdep_srcs = dsp_24xx_wkdeps,
.clktrctrl_mask = OMAP24XX_AUTOSTATE_DSP_MASK,
@@ -572,7 +557,6 @@ static struct clockdomain gfx_2430_clkdm = {
.name = "gfx_clkdm",
.pwrdm = { .name = "gfx_pwrdm" },
.flags = CLKDM_CAN_HWSUP_SWSUP,
- .clkstctrl_reg = OMAP2430_CM_REGADDR(GFX_MOD, OMAP2_CM_CLKSTCTRL),
.wkdep_srcs = gfx_sgx_wkdeps,
.clktrctrl_mask = OMAP24XX_AUTOSTATE_GFX_MASK,
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
@@ -587,7 +571,6 @@ static struct clockdomain core_l3_2430_clkdm = {
.name = "core_l3_clkdm",
.pwrdm = { .name = "core_pwrdm" },
.flags = CLKDM_CAN_HWSUP,
- .clkstctrl_reg = OMAP2430_CM_REGADDR(CORE_MOD, OMAP2_CM_CLKSTCTRL),
.dep_bit = OMAP24XX_EN_CORE_SHIFT,
.wkdep_srcs = core_24xx_wkdeps,
.clktrctrl_mask = OMAP24XX_AUTOSTATE_L3_MASK,
@@ -603,7 +586,6 @@ static struct clockdomain core_l4_2430_clkdm = {
.name = "core_l4_clkdm",
.pwrdm = { .name = "core_pwrdm" },
.flags = CLKDM_CAN_HWSUP,
- .clkstctrl_reg = OMAP2430_CM_REGADDR(CORE_MOD, OMAP2_CM_CLKSTCTRL),
.dep_bit = OMAP24XX_EN_CORE_SHIFT,
.wkdep_srcs = core_24xx_wkdeps,
.clktrctrl_mask = OMAP24XX_AUTOSTATE_L4_MASK,
@@ -614,7 +596,6 @@ static struct clockdomain dss_2430_clkdm = {
.name = "dss_clkdm",
.pwrdm = { .name = "core_pwrdm" },
.flags = CLKDM_CAN_HWSUP,
- .clkstctrl_reg = OMAP2430_CM_REGADDR(CORE_MOD, OMAP2_CM_CLKSTCTRL),
.clktrctrl_mask = OMAP24XX_AUTOSTATE_DSS_MASK,
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
};
@@ -632,7 +613,6 @@ static struct clockdomain mpu_3xxx_clkdm = {
.name = "mpu_clkdm",
.pwrdm = { .name = "mpu_pwrdm" },
.flags = CLKDM_CAN_HWSUP | CLKDM_CAN_FORCE_WAKEUP,
- .clkstctrl_reg = OMAP34XX_CM_REGADDR(MPU_MOD, OMAP2_CM_CLKSTCTRL),
.dep_bit = OMAP3430_EN_MPU_SHIFT,
.wkdep_srcs = mpu_3xxx_wkdeps,
.clktrctrl_mask = OMAP3430_CLKTRCTRL_MPU_MASK,
@@ -643,8 +623,6 @@ static struct clockdomain neon_clkdm = {
.name = "neon_clkdm",
.pwrdm = { .name = "neon_pwrdm" },
.flags = CLKDM_CAN_HWSUP_SWSUP,
- .clkstctrl_reg = OMAP34XX_CM_REGADDR(OMAP3430_NEON_MOD,
- OMAP2_CM_CLKSTCTRL),
.wkdep_srcs = neon_wkdeps,
.clktrctrl_mask = OMAP3430_CLKTRCTRL_NEON_MASK,
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
@@ -654,8 +632,6 @@ static struct clockdomain iva2_clkdm = {
.name = "iva2_clkdm",
.pwrdm = { .name = "iva2_pwrdm" },
.flags = CLKDM_CAN_HWSUP_SWSUP,
- .clkstctrl_reg = OMAP34XX_CM_REGADDR(OMAP3430_IVA2_MOD,
- OMAP2_CM_CLKSTCTRL),
.dep_bit = OMAP3430_PM_WKDEP_MPU_EN_IVA2_SHIFT,
.wkdep_srcs = iva2_wkdeps,
.clktrctrl_mask = OMAP3430_CLKTRCTRL_IVA2_MASK,
@@ -666,7 +642,6 @@ static struct clockdomain gfx_3430es1_clkdm = {
.name = "gfx_clkdm",
.pwrdm = { .name = "gfx_pwrdm" },
.flags = CLKDM_CAN_HWSUP_SWSUP,
- .clkstctrl_reg = OMAP34XX_CM_REGADDR(GFX_MOD, OMAP2_CM_CLKSTCTRL),
.wkdep_srcs = gfx_sgx_wkdeps,
.sleepdep_srcs = gfx_sgx_sleepdeps,
.clktrctrl_mask = OMAP3430ES1_CLKTRCTRL_GFX_MASK,
@@ -677,8 +652,6 @@ static struct clockdomain sgx_clkdm = {
.name = "sgx_clkdm",
.pwrdm = { .name = "sgx_pwrdm" },
.flags = CLKDM_CAN_HWSUP_SWSUP,
- .clkstctrl_reg = OMAP34XX_CM_REGADDR(OMAP3430ES2_SGX_MOD,
- OMAP2_CM_CLKSTCTRL),
.wkdep_srcs = gfx_sgx_wkdeps,
.sleepdep_srcs = gfx_sgx_sleepdeps,
.clktrctrl_mask = OMAP3430ES2_CLKTRCTRL_SGX_MASK,
@@ -696,7 +669,6 @@ static struct clockdomain d2d_clkdm = {
.name = "d2d_clkdm",
.pwrdm = { .name = "core_pwrdm" },
.flags = CLKDM_CAN_HWSUP_SWSUP,
- .clkstctrl_reg = OMAP34XX_CM_REGADDR(CORE_MOD, OMAP2_CM_CLKSTCTRL),
.clktrctrl_mask = OMAP3430ES1_CLKTRCTRL_D2D_MASK,
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
};
@@ -710,7 +682,6 @@ static struct clockdomain core_l3_3xxx_clkdm = {
.name = "core_l3_clkdm",
.pwrdm = { .name = "core_pwrdm" },
.flags = CLKDM_CAN_HWSUP,
- .clkstctrl_reg = OMAP34XX_CM_REGADDR(CORE_MOD, OMAP2_CM_CLKSTCTRL),
.dep_bit = OMAP3430_EN_CORE_SHIFT,
.clktrctrl_mask = OMAP3430_CLKTRCTRL_L3_MASK,
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
@@ -725,7 +696,6 @@ static struct clockdomain core_l4_3xxx_clkdm = {
.name = "core_l4_clkdm",
.pwrdm = { .name = "core_pwrdm" },
.flags = CLKDM_CAN_HWSUP,
- .clkstctrl_reg = OMAP34XX_CM_REGADDR(CORE_MOD, OMAP2_CM_CLKSTCTRL),
.dep_bit = OMAP3430_EN_CORE_SHIFT,
.clktrctrl_mask = OMAP3430_CLKTRCTRL_L4_MASK,
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
@@ -736,8 +706,6 @@ static struct clockdomain dss_3xxx_clkdm = {
.name = "dss_clkdm",
.pwrdm = { .name = "dss_pwrdm" },
.flags = CLKDM_CAN_HWSUP_SWSUP,
- .clkstctrl_reg = OMAP34XX_CM_REGADDR(OMAP3430_DSS_MOD,
- OMAP2_CM_CLKSTCTRL),
.dep_bit = OMAP3430_PM_WKDEP_MPU_EN_DSS_SHIFT,
.wkdep_srcs = dss_wkdeps,
.sleepdep_srcs = dss_sleepdeps,
@@ -749,8 +717,6 @@ static struct clockdomain cam_clkdm = {
.name = "cam_clkdm",
.pwrdm = { .name = "cam_pwrdm" },
.flags = CLKDM_CAN_HWSUP_SWSUP,
- .clkstctrl_reg = OMAP34XX_CM_REGADDR(OMAP3430_CAM_MOD,
- OMAP2_CM_CLKSTCTRL),
.wkdep_srcs = cam_wkdeps,
.sleepdep_srcs = cam_sleepdeps,
.clktrctrl_mask = OMAP3430_CLKTRCTRL_CAM_MASK,
@@ -761,8 +727,6 @@ static struct clockdomain usbhost_clkdm = {
.name = "usbhost_clkdm",
.pwrdm = { .name = "usbhost_pwrdm" },
.flags = CLKDM_CAN_HWSUP_SWSUP,
- .clkstctrl_reg = OMAP34XX_CM_REGADDR(OMAP3430ES2_USBHOST_MOD,
- OMAP2_CM_CLKSTCTRL),
.wkdep_srcs = usbhost_wkdeps,
.sleepdep_srcs = usbhost_sleepdeps,
.clktrctrl_mask = OMAP3430ES2_CLKTRCTRL_USBHOST_MASK,
@@ -773,8 +737,6 @@ static struct clockdomain per_clkdm = {
.name = "per_clkdm",
.pwrdm = { .name = "per_pwrdm" },
.flags = CLKDM_CAN_HWSUP_SWSUP,
- .clkstctrl_reg = OMAP34XX_CM_REGADDR(OMAP3430_PER_MOD,
- OMAP2_CM_CLKSTCTRL),
.dep_bit = OMAP3430_EN_PER_SHIFT,
.wkdep_srcs = per_wkdeps,
.sleepdep_srcs = per_sleepdeps,
@@ -790,8 +752,6 @@ static struct clockdomain emu_clkdm = {
.name = "emu_clkdm",
.pwrdm = { .name = "emu_pwrdm" },
.flags = /* CLKDM_CAN_ENABLE_AUTO | */CLKDM_CAN_SWSUP,
- .clkstctrl_reg = OMAP34XX_CM_REGADDR(OMAP3430_EMU_MOD,
- OMAP2_CM_CLKSTCTRL),
.clktrctrl_mask = OMAP3430_CLKTRCTRL_EMU_MASK,
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
};
diff --git a/arch/arm/mach-omap2/cm-regbits-24xx.h b/arch/arm/mach-omap2/cm-regbits-24xx.h
index bab62ee..82286bc 100644
--- a/arch/arm/mach-omap2/cm-regbits-24xx.h
+++ b/arch/arm/mach-omap2/cm-regbits-24xx.h
@@ -430,4 +430,9 @@
#define OMAP2430_AUTOSTATE_MDM_SHIFT 0
#define OMAP2430_AUTOSTATE_MDM_MASK (1 << 0)
+/* OMAP24XX CM_CLKSTCTRL_*.AUTOSTATE_* register bit values */
+#define OMAP24XX_CLKSTCTRL_DISABLE_AUTO 0x0
+#define OMAP24XX_CLKSTCTRL_ENABLE_AUTO 0x1
+
+
#endif
diff --git a/arch/arm/mach-omap2/cm2xxx_3xxx.c b/arch/arm/mach-omap2/cm2xxx_3xxx.c
index e3d598a..96954aa 100644
--- a/arch/arm/mach-omap2/cm2xxx_3xxx.c
+++ b/arch/arm/mach-omap2/cm2xxx_3xxx.c
@@ -62,6 +62,74 @@ u32 omap2_cm_clear_mod_reg_bits(u32 bits, s16 module, s16 idx)
return omap2_cm_rmw_mod_reg_bits(bits, 0x0, module, idx);
}
+/*
+ *
+ */
+
+static void _write_clktrctrl(u8 c, s16 module, u32 mask)
+{
+ u32 v;
+
+ v = omap2_cm_read_mod_reg(module, OMAP2_CM_CLKSTCTRL);
+ v &= ~mask;
+ v |= c << __ffs(mask);
+ omap2_cm_write_mod_reg(v, module, OMAP2_CM_CLKSTCTRL);
+}
+
+bool omap2_cm_is_clkdm_in_hwsup(s16 module, u32 mask)
+{
+ u32 v;
+ bool ret = 0;
+
+ BUG_ON(!cpu_is_omap24xx() && !cpu_is_omap34xx());
+
+ v = omap2_cm_read_mod_reg(module, OMAP2_CM_CLKSTCTRL);
+ v &= mask;
+ v >>= __ffs(mask);
+
+ if (cpu_is_omap24xx())
+ ret = (v == OMAP24XX_CLKSTCTRL_ENABLE_AUTO) ? 1 : 0;
+ else
+ ret = (v == OMAP34XX_CLKSTCTRL_ENABLE_AUTO) ? 1 : 0;
+
+ return ret;
+}
+
+void omap2xxx_cm_clkdm_enable_hwsup(s16 module, u32 mask)
+{
+ _write_clktrctrl(OMAP24XX_CLKSTCTRL_ENABLE_AUTO, module, mask);
+}
+
+void omap2xxx_cm_clkdm_disable_hwsup(s16 module, u32 mask)
+{
+ _write_clktrctrl(OMAP24XX_CLKSTCTRL_DISABLE_AUTO, module, mask);
+}
+
+void omap3xxx_cm_clkdm_enable_hwsup(s16 module, u32 mask)
+{
+ _write_clktrctrl(OMAP34XX_CLKSTCTRL_ENABLE_AUTO, module, mask);
+}
+
+void omap3xxx_cm_clkdm_disable_hwsup(s16 module, u32 mask)
+{
+ _write_clktrctrl(OMAP34XX_CLKSTCTRL_DISABLE_AUTO, module, mask);
+}
+
+void omap3xxx_cm_clkdm_force_sleep(s16 module, u32 mask)
+{
+ _write_clktrctrl(OMAP34XX_CLKSTCTRL_FORCE_SLEEP, module, mask);
+}
+
+void omap3xxx_cm_clkdm_force_wakeup(s16 module, u32 mask)
+{
+ _write_clktrctrl(OMAP34XX_CLKSTCTRL_FORCE_WAKEUP, module, mask);
+}
+
+
+/*
+ *
+ */
+
/**
* omap2_cm_wait_idlest_ready - wait for a module to leave idle or standby
* @prcm_mod: PRCM module offset
diff --git a/arch/arm/mach-omap2/cm2xxx_3xxx.h b/arch/arm/mach-omap2/cm2xxx_3xxx.h
index ff24edf..5e9ea5b 100644
--- a/arch/arm/mach-omap2/cm2xxx_3xxx.h
+++ b/arch/arm/mach-omap2/cm2xxx_3xxx.h
@@ -113,6 +113,15 @@ extern int omap2_cm_wait_module_ready(s16 prcm_mod, u8 idlest_id,
extern u32 omap2_cm_set_mod_reg_bits(u32 bits, s16 module, s16 idx);
extern u32 omap2_cm_clear_mod_reg_bits(u32 bits, s16 module, s16 idx);
+extern bool omap2_cm_is_clkdm_in_hwsup(s16 module, u32 mask);
+extern void omap2xxx_cm_clkdm_enable_hwsup(s16 module, u32 mask);
+extern void omap2xxx_cm_clkdm_disable_hwsup(s16 module, u32 mask);
+
+extern void omap3xxx_cm_clkdm_enable_hwsup(s16 module, u32 mask);
+extern void omap3xxx_cm_clkdm_disable_hwsup(s16 module, u32 mask);
+extern void omap3xxx_cm_clkdm_force_sleep(s16 module, u32 mask);
+extern void omap3xxx_cm_clkdm_force_wakeup(s16 module, u32 mask);
+
#endif
/* CM register bits shared between 24XX and 3430 */
diff --git a/arch/arm/plat-omap/include/plat/clockdomain.h b/arch/arm/plat-omap/include/plat/clockdomain.h
index ec433c3..e91ae92 100644
--- a/arch/arm/plat-omap/include/plat/clockdomain.h
+++ b/arch/arm/plat-omap/include/plat/clockdomain.h
@@ -34,10 +34,6 @@
#define CLKDM_CAN_SWSUP (CLKDM_CAN_FORCE_SLEEP | CLKDM_CAN_FORCE_WAKEUP)
#define CLKDM_CAN_HWSUP_SWSUP (CLKDM_CAN_SWSUP | CLKDM_CAN_HWSUP)
-/* OMAP24XX CM_CLKSTCTRL_*.AUTOSTATE_* register bit values */
-#define OMAP24XX_CLKSTCTRL_DISABLE_AUTO 0x0
-#define OMAP24XX_CLKSTCTRL_ENABLE_AUTO 0x1
-
/**
* struct clkdm_autodep - clkdm deps to add when entering/exiting hwsup mode
* @clkdm: clockdomain to add wkdep+sleepdep on - set name member only
@@ -110,7 +106,6 @@ struct clockdomain {
struct powerdomain *ptr;
} pwrdm;
#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
- void __iomem *clkstctrl_reg;
const u16 clktrctrl_mask;
#endif
const u8 flags;
^ permalink raw reply related [flat|nested] 38+ messages in thread* [PATCH 09/11] OMAP2+: clockdomain: move header file from plat-omap to mach-omap2
2010-12-08 6:18 [PATCH 00/11] OMAP: PRCM/powerdomain/clockdomain patches for 2.6.38, part two Paul Walmsley
` (7 preceding siblings ...)
2010-12-08 6:18 ` [PATCH 08/11] OMAP2/3: clockdomain: remove unneeded .clkstctrl_reg, remove some direct CM register accesses Paul Walmsley
@ 2010-12-08 6:18 ` Paul Walmsley
2010-12-15 5:39 ` Paul Walmsley
2010-12-08 6:18 ` [PATCH 10/11] OMAP2+: powerdomain: " Paul Walmsley
` (4 subsequent siblings)
13 siblings, 1 reply; 38+ messages in thread
From: Paul Walmsley @ 2010-12-08 6:18 UTC (permalink / raw)
To: linux-arm-kernel
The OMAP clockdomain code and data is all OMAP2+-specific. This seems
unlikely to change any time soon. Move plat-omap/include/plat/clockdomain.h
to mach-omap2/clockdomain.h. The primary point of doing this is to remove
the temptation for unrelated upper-layer code to access clockdomain code
and data directly.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
---
arch/arm/mach-omap2/clock.c | 2 +-
arch/arm/mach-omap2/clockdomain.c | 2 +-
arch/arm/mach-omap2/clockdomain.h | 6 ++----
arch/arm/mach-omap2/clockdomains2xxx_3xxx_data.c | 2 +-
arch/arm/mach-omap2/clockdomains44xx_data.c | 2 +-
arch/arm/mach-omap2/cpuidle34xx.c | 2 +-
arch/arm/mach-omap2/io.c | 2 +-
arch/arm/mach-omap2/omap_hwmod.c | 2 +-
arch/arm/mach-omap2/pm-debug.c | 2 +-
arch/arm/mach-omap2/pm.c | 2 +-
arch/arm/mach-omap2/pm24xx.c | 2 +-
arch/arm/mach-omap2/pm34xx.c | 2 +-
arch/arm/mach-omap2/powerdomain.c | 2 +-
13 files changed, 14 insertions(+), 16 deletions(-)
rename arch/arm/{plat-omap/include/plat/clockdomain.h => mach-omap2/clockdomain.h} (97%)
diff --git a/arch/arm/mach-omap2/clock.c b/arch/arm/mach-omap2/clock.c
index cda2f1d..2a2f152 100644
--- a/arch/arm/mach-omap2/clock.c
+++ b/arch/arm/mach-omap2/clock.c
@@ -24,7 +24,7 @@
#include <linux/bitops.h>
#include <plat/clock.h>
-#include <plat/clockdomain.h>
+#include "clockdomain.h"
#include <plat/cpu.h>
#include <plat/prcm.h>
diff --git a/arch/arm/mach-omap2/clockdomain.c b/arch/arm/mach-omap2/clockdomain.c
index 84cdd1d..dadfb3f 100644
--- a/arch/arm/mach-omap2/clockdomain.c
+++ b/arch/arm/mach-omap2/clockdomain.c
@@ -35,7 +35,7 @@
#include <plat/clock.h>
#include <plat/powerdomain.h>
-#include <plat/clockdomain.h>
+#include "clockdomain.h"
#include <plat/prcm.h>
/* clkdm_list contains all registered struct clockdomains */
diff --git a/arch/arm/plat-omap/include/plat/clockdomain.h b/arch/arm/mach-omap2/clockdomain.h
similarity index 97%
rename from arch/arm/plat-omap/include/plat/clockdomain.h
rename to arch/arm/mach-omap2/clockdomain.h
index e91ae92..372c646 100644
--- a/arch/arm/plat-omap/include/plat/clockdomain.h
+++ b/arch/arm/mach-omap2/clockdomain.h
@@ -11,12 +11,10 @@
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
- *
- * XXX This should be moved to mach-omap2/ at the earliest opportunity.
*/
-#ifndef __ASM_ARM_ARCH_OMAP_CLOCKDOMAIN_H
-#define __ASM_ARM_ARCH_OMAP_CLOCKDOMAIN_H
+#ifndef __ARCH_ARM_MACH_OMAP2_CLOCKDOMAIN_H
+#define __ARCH_ARM_MACH_OMAP2_CLOCKDOMAIN_H
#include <linux/init.h>
diff --git a/arch/arm/mach-omap2/clockdomains2xxx_3xxx_data.c b/arch/arm/mach-omap2/clockdomains2xxx_3xxx_data.c
index 6e9ec49..e4a7133 100644
--- a/arch/arm/mach-omap2/clockdomains2xxx_3xxx_data.c
+++ b/arch/arm/mach-omap2/clockdomains2xxx_3xxx_data.c
@@ -35,7 +35,7 @@
#include <linux/kernel.h>
#include <linux/io.h>
-#include <plat/clockdomain.h>
+#include "clockdomain.h"
#include "prm2xxx_3xxx.h"
#include "cm2xxx_3xxx.h"
#include "cm-regbits-24xx.h"
diff --git a/arch/arm/mach-omap2/clockdomains44xx_data.c b/arch/arm/mach-omap2/clockdomains44xx_data.c
index 2d3d1ef..51920fc 100644
--- a/arch/arm/mach-omap2/clockdomains44xx_data.c
+++ b/arch/arm/mach-omap2/clockdomains44xx_data.c
@@ -26,7 +26,7 @@
#include <linux/kernel.h>
#include <linux/io.h>
-#include <plat/clockdomain.h>
+#include "clockdomain.h"
#include "cm1_44xx.h"
#include "cm2_44xx.h"
diff --git a/arch/arm/mach-omap2/cpuidle34xx.c b/arch/arm/mach-omap2/cpuidle34xx.c
index 0d50b45..568dff7 100644
--- a/arch/arm/mach-omap2/cpuidle34xx.c
+++ b/arch/arm/mach-omap2/cpuidle34xx.c
@@ -28,7 +28,7 @@
#include <plat/prcm.h>
#include <plat/irqs.h>
#include <plat/powerdomain.h>
-#include <plat/clockdomain.h>
+#include "clockdomain.h"
#include <plat/serial.h>
#include "pm.h"
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
index d05638ac..1151f4a 100644
--- a/arch/arm/mach-omap2/io.c
+++ b/arch/arm/mach-omap2/io.c
@@ -41,7 +41,7 @@
#include <plat/omap-pm.h>
#include <plat/powerdomain.h>
-#include <plat/clockdomain.h>
+#include "clockdomain.h"
#include <plat/omap_hwmod.h>
/*
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index 63d3f4d..10bd001 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -138,7 +138,7 @@
#include <plat/common.h>
#include <plat/cpu.h>
-#include <plat/clockdomain.h>
+#include "clockdomain.h"
#include <plat/powerdomain.h>
#include <plat/clock.h>
#include <plat/omap_hwmod.h>
diff --git a/arch/arm/mach-omap2/pm-debug.c b/arch/arm/mach-omap2/pm-debug.c
index 73f8ec0..3fc7707 100644
--- a/arch/arm/mach-omap2/pm-debug.c
+++ b/arch/arm/mach-omap2/pm-debug.c
@@ -30,7 +30,7 @@
#include <plat/clock.h>
#include <plat/board.h>
#include <plat/powerdomain.h>
-#include <plat/clockdomain.h>
+#include "clockdomain.h"
#include <plat/dmtimer.h>
#include "cm2xxx_3xxx.h"
diff --git a/arch/arm/mach-omap2/pm.c b/arch/arm/mach-omap2/pm.c
index 59ca03b..60cfe67 100644
--- a/arch/arm/mach-omap2/pm.c
+++ b/arch/arm/mach-omap2/pm.c
@@ -19,7 +19,7 @@
#include <plat/common.h>
#include <plat/powerdomain.h>
-#include <plat/clockdomain.h>
+#include "clockdomain.h"
static struct omap_device_pm_latency *pm_lats;
diff --git a/arch/arm/mach-omap2/pm24xx.c b/arch/arm/mach-omap2/pm24xx.c
index f13e2ca..7d4933b 100644
--- a/arch/arm/mach-omap2/pm24xx.c
+++ b/arch/arm/mach-omap2/pm24xx.c
@@ -51,7 +51,7 @@
#include "control.h"
#include <plat/powerdomain.h>
-#include <plat/clockdomain.h>
+#include "clockdomain.h"
static void (*omap2_sram_idle)(void);
static void (*omap2_sram_suspend)(u32 dllctrl, void __iomem *sdrc_dlla_ctrl,
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index 8ea8051..43c1a43 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -31,7 +31,7 @@
#include <linux/console.h>
#include <plat/sram.h>
-#include <plat/clockdomain.h>
+#include "clockdomain.h"
#include <plat/powerdomain.h>
#include <plat/serial.h>
#include <plat/sdrc.h>
diff --git a/arch/arm/mach-omap2/powerdomain.c b/arch/arm/mach-omap2/powerdomain.c
index a76ad3f..7eb7ba4 100644
--- a/arch/arm/mach-omap2/powerdomain.c
+++ b/arch/arm/mach-omap2/powerdomain.c
@@ -27,7 +27,7 @@
#include <plat/cpu.h>
#include <plat/powerdomain.h>
-#include <plat/clockdomain.h>
+#include "clockdomain.h"
#include <plat/prcm.h>
#include "pm.h"
^ permalink raw reply related [flat|nested] 38+ messages in thread* [PATCH 09/11] OMAP2+: clockdomain: move header file from plat-omap to mach-omap2
2010-12-08 6:18 ` [PATCH 09/11] OMAP2+: clockdomain: move header file from plat-omap to mach-omap2 Paul Walmsley
@ 2010-12-15 5:39 ` Paul Walmsley
0 siblings, 0 replies; 38+ messages in thread
From: Paul Walmsley @ 2010-12-15 5:39 UTC (permalink / raw)
To: linux-arm-kernel
On Tue, 7 Dec 2010, Paul Walmsley wrote:
> The OMAP clockdomain code and data is all OMAP2+-specific. This seems
> unlikely to change any time soon. Move plat-omap/include/plat/clockdomain.h
> to mach-omap2/clockdomain.h. The primary point of doing this is to remove
> the temptation for unrelated upper-layer code to access clockdomain code
> and data directly.
>
> Signed-off-by: Paul Walmsley <paul@pwsan.com>
> Cc: Kevin Hilman <khilman@deeprootsystems.com>
This patch has been updated to get DSPBridge building again.
The DSPBridge should not be touching the clockdomain headers; this is
just a temporary workaround until the DSPBridge people fix the code.
- Paul
From: Paul Walmsley <paul@pwsan.com>
Date: Tue, 14 Dec 2010 13:03:49 -0700
Subject: [PATCH] OMAP2+: clockdomain: move header file from plat-omap to mach-omap2
The OMAP clockdomain code and data is all OMAP2+-specific. This seems
unlikely to change any time soon. Move plat-omap/include/plat/clockdomain.h
to mach-omap2/clockdomain.h. The primary point of doing this is to remove
the temptation for unrelated upper-layer code to access clockdomain code
and data directly.
DSPBridge also uses the clockdomain headers for some reason, so,
modify it also. The DSPBridge code should not be including the
clockdomain headers; these should be removed.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
Cc: Omar Ramirez Luna <omar.ramirez@ti.com>
Cc: Felipe Contreras <felipe.contreras@gmail.com>
Cc: Greg Kroah-Hartman <greg@kroah.com>
---
arch/arm/mach-omap2/clock.c | 2 +-
arch/arm/mach-omap2/clockdomain.c | 2 +-
.../include/plat => mach-omap2}/clockdomain.h | 6 ++----
arch/arm/mach-omap2/clockdomains2xxx_3xxx_data.c | 2 +-
arch/arm/mach-omap2/clockdomains44xx_data.c | 2 +-
arch/arm/mach-omap2/cpuidle34xx.c | 2 +-
arch/arm/mach-omap2/io.c | 2 +-
arch/arm/mach-omap2/omap_hwmod.c | 2 +-
arch/arm/mach-omap2/pm-debug.c | 2 +-
arch/arm/mach-omap2/pm.c | 2 +-
arch/arm/mach-omap2/pm24xx.c | 2 +-
arch/arm/mach-omap2/pm34xx.c | 2 +-
arch/arm/mach-omap2/powerdomain.c | 2 +-
drivers/staging/tidspbridge/core/_tiomap.h | 7 ++++++-
14 files changed, 20 insertions(+), 17 deletions(-)
rename arch/arm/{plat-omap/include/plat => mach-omap2}/clockdomain.h (97%)
diff --git a/arch/arm/mach-omap2/clock.c b/arch/arm/mach-omap2/clock.c
index cda2f1d..2a2f152 100644
--- a/arch/arm/mach-omap2/clock.c
+++ b/arch/arm/mach-omap2/clock.c
@@ -24,7 +24,7 @@
#include <linux/bitops.h>
#include <plat/clock.h>
-#include <plat/clockdomain.h>
+#include "clockdomain.h"
#include <plat/cpu.h>
#include <plat/prcm.h>
diff --git a/arch/arm/mach-omap2/clockdomain.c b/arch/arm/mach-omap2/clockdomain.c
index e5605c2..650bf68 100644
--- a/arch/arm/mach-omap2/clockdomain.c
+++ b/arch/arm/mach-omap2/clockdomain.c
@@ -35,7 +35,7 @@
#include <plat/clock.h>
#include <plat/powerdomain.h>
-#include <plat/clockdomain.h>
+#include "clockdomain.h"
#include <plat/prcm.h>
/* clkdm_list contains all registered struct clockdomains */
diff --git a/arch/arm/plat-omap/include/plat/clockdomain.h b/arch/arm/mach-omap2/clockdomain.h
similarity index 97%
rename from arch/arm/plat-omap/include/plat/clockdomain.h
rename to arch/arm/mach-omap2/clockdomain.h
index e91ae92..372c646 100644
--- a/arch/arm/plat-omap/include/plat/clockdomain.h
+++ b/arch/arm/mach-omap2/clockdomain.h
@@ -11,12 +11,10 @@
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
- *
- * XXX This should be moved to mach-omap2/ at the earliest opportunity.
*/
-#ifndef __ASM_ARM_ARCH_OMAP_CLOCKDOMAIN_H
-#define __ASM_ARM_ARCH_OMAP_CLOCKDOMAIN_H
+#ifndef __ARCH_ARM_MACH_OMAP2_CLOCKDOMAIN_H
+#define __ARCH_ARM_MACH_OMAP2_CLOCKDOMAIN_H
#include <linux/init.h>
diff --git a/arch/arm/mach-omap2/clockdomains2xxx_3xxx_data.c b/arch/arm/mach-omap2/clockdomains2xxx_3xxx_data.c
index 6e9ec49..e4a7133 100644
--- a/arch/arm/mach-omap2/clockdomains2xxx_3xxx_data.c
+++ b/arch/arm/mach-omap2/clockdomains2xxx_3xxx_data.c
@@ -35,7 +35,7 @@
#include <linux/kernel.h>
#include <linux/io.h>
-#include <plat/clockdomain.h>
+#include "clockdomain.h"
#include "prm2xxx_3xxx.h"
#include "cm2xxx_3xxx.h"
#include "cm-regbits-24xx.h"
diff --git a/arch/arm/mach-omap2/clockdomains44xx_data.c b/arch/arm/mach-omap2/clockdomains44xx_data.c
index 2d3d1ef..51920fc 100644
--- a/arch/arm/mach-omap2/clockdomains44xx_data.c
+++ b/arch/arm/mach-omap2/clockdomains44xx_data.c
@@ -26,7 +26,7 @@
#include <linux/kernel.h>
#include <linux/io.h>
-#include <plat/clockdomain.h>
+#include "clockdomain.h"
#include "cm1_44xx.h"
#include "cm2_44xx.h"
diff --git a/arch/arm/mach-omap2/cpuidle34xx.c b/arch/arm/mach-omap2/cpuidle34xx.c
index 0d50b45..568dff7 100644
--- a/arch/arm/mach-omap2/cpuidle34xx.c
+++ b/arch/arm/mach-omap2/cpuidle34xx.c
@@ -28,7 +28,7 @@
#include <plat/prcm.h>
#include <plat/irqs.h>
#include <plat/powerdomain.h>
-#include <plat/clockdomain.h>
+#include "clockdomain.h"
#include <plat/serial.h>
#include "pm.h"
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
index 1732fb3..ab2d1ed 100644
--- a/arch/arm/mach-omap2/io.c
+++ b/arch/arm/mach-omap2/io.c
@@ -41,7 +41,7 @@
#include <plat/omap-pm.h>
#include <plat/powerdomain.h>
-#include <plat/clockdomain.h>
+#include "clockdomain.h"
#include <plat/omap_hwmod.h>
#include <plat/multi.h>
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index 1312ce2..e1358ba 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -139,7 +139,7 @@
#include <plat/common.h>
#include <plat/cpu.h>
-#include <plat/clockdomain.h>
+#include "clockdomain.h"
#include <plat/powerdomain.h>
#include <plat/clock.h>
#include <plat/omap_hwmod.h>
diff --git a/arch/arm/mach-omap2/pm-debug.c b/arch/arm/mach-omap2/pm-debug.c
index 73f8ec0..3fc7707 100644
--- a/arch/arm/mach-omap2/pm-debug.c
+++ b/arch/arm/mach-omap2/pm-debug.c
@@ -30,7 +30,7 @@
#include <plat/clock.h>
#include <plat/board.h>
#include <plat/powerdomain.h>
-#include <plat/clockdomain.h>
+#include "clockdomain.h"
#include <plat/dmtimer.h>
#include "cm2xxx_3xxx.h"
diff --git a/arch/arm/mach-omap2/pm.c b/arch/arm/mach-omap2/pm.c
index 59ca03b..60cfe67 100644
--- a/arch/arm/mach-omap2/pm.c
+++ b/arch/arm/mach-omap2/pm.c
@@ -19,7 +19,7 @@
#include <plat/common.h>
#include <plat/powerdomain.h>
-#include <plat/clockdomain.h>
+#include "clockdomain.h"
static struct omap_device_pm_latency *pm_lats;
diff --git a/arch/arm/mach-omap2/pm24xx.c b/arch/arm/mach-omap2/pm24xx.c
index f13e2ca..7d4933b 100644
--- a/arch/arm/mach-omap2/pm24xx.c
+++ b/arch/arm/mach-omap2/pm24xx.c
@@ -51,7 +51,7 @@
#include "control.h"
#include <plat/powerdomain.h>
-#include <plat/clockdomain.h>
+#include "clockdomain.h"
static void (*omap2_sram_idle)(void);
static void (*omap2_sram_suspend)(u32 dllctrl, void __iomem *sdrc_dlla_ctrl,
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index 8ea8051..43c1a43 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -31,7 +31,7 @@
#include <linux/console.h>
#include <plat/sram.h>
-#include <plat/clockdomain.h>
+#include "clockdomain.h"
#include <plat/powerdomain.h>
#include <plat/serial.h>
#include <plat/sdrc.h>
diff --git a/arch/arm/mach-omap2/powerdomain.c b/arch/arm/mach-omap2/powerdomain.c
index a76ad3f..7eb7ba4 100644
--- a/arch/arm/mach-omap2/powerdomain.c
+++ b/arch/arm/mach-omap2/powerdomain.c
@@ -27,7 +27,7 @@
#include <plat/cpu.h>
#include <plat/powerdomain.h>
-#include <plat/clockdomain.h>
+#include "clockdomain.h"
#include <plat/prcm.h>
#include "pm.h"
diff --git a/drivers/staging/tidspbridge/core/_tiomap.h b/drivers/staging/tidspbridge/core/_tiomap.h
index 7fac488..a3190e7 100644
--- a/drivers/staging/tidspbridge/core/_tiomap.h
+++ b/drivers/staging/tidspbridge/core/_tiomap.h
@@ -19,8 +19,13 @@
#ifndef _TIOMAP_
#define _TIOMAP_
+/*
+ * XXX These powerdomain.h/clockdomain.h includes are wrong and should
+ * be removed. No driver should call pwrdm_* or clkdm_* functions
+ * directly; they should rely on OMAP core code to do this.
+ */
#include <plat/powerdomain.h>
-#include <plat/clockdomain.h>
+#include <mach-omap2/clockdomain.h>
/*
* XXX These mach-omap2/ includes are wrong and should be removed. No
* driver should read or write to PRM/CM registers directly; they
--
1.7.2.3
^ permalink raw reply related [flat|nested] 38+ messages in thread
* [PATCH 10/11] OMAP2+: powerdomain: move header file from plat-omap to mach-omap2
2010-12-08 6:18 [PATCH 00/11] OMAP: PRCM/powerdomain/clockdomain patches for 2.6.38, part two Paul Walmsley
` (8 preceding siblings ...)
2010-12-08 6:18 ` [PATCH 09/11] OMAP2+: clockdomain: move header file from plat-omap to mach-omap2 Paul Walmsley
@ 2010-12-08 6:18 ` Paul Walmsley
2010-12-15 5:37 ` Paul Walmsley
2010-12-08 6:18 ` [PATCH 11/11] OMAP3: control/PM: move padconf save code to mach-omap2/control.c Paul Walmsley
` (3 subsequent siblings)
13 siblings, 1 reply; 38+ messages in thread
From: Paul Walmsley @ 2010-12-08 6:18 UTC (permalink / raw)
To: linux-arm-kernel
The OMAP powerdomain code and data is all OMAP2+-specific. This seems
unlikely to change any time soon. Move plat-omap/include/plat/powerdomain.h
to mach-omap2/powerdomain.h. The primary point of doing this is to remove
the temptation for unrelated upper-layer code to access powerdomain code
and data directly.
As part of this process, remove the references to powerdomain data from
the GPIO "driver" and the OMAP PM no-op layer, both in plat-omap.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
---
arch/arm/mach-omap2/clockdomain.c | 2 +
arch/arm/mach-omap2/clockdomain.h | 2 +
arch/arm/mach-omap2/cpuidle34xx.c | 2 +
arch/arm/mach-omap2/io.c | 2 +
arch/arm/mach-omap2/omap_hwmod.c | 2 +
arch/arm/mach-omap2/pm-debug.c | 2 +
arch/arm/mach-omap2/pm.c | 2 +
arch/arm/mach-omap2/pm.h | 2 +
arch/arm/mach-omap2/pm24xx.c | 4 +--
arch/arm/mach-omap2/pm34xx.c | 6 +++-
arch/arm/mach-omap2/pm44xx.c | 2 +
arch/arm/mach-omap2/powerdomain-common.c | 1 -
arch/arm/mach-omap2/powerdomain.c | 2 +
arch/arm/mach-omap2/powerdomain.h | 23 +++++++++++++----
arch/arm/mach-omap2/powerdomain2xxx_3xxx.c | 2 +
arch/arm/mach-omap2/powerdomain44xx.c | 3 +-
arch/arm/mach-omap2/powerdomains.h | 30 ----------------------
arch/arm/mach-omap2/powerdomains2xxx_3xxx_data.c | 4 +--
arch/arm/mach-omap2/powerdomains2xxx_3xxx_data.h | 2 +
arch/arm/mach-omap2/powerdomains2xxx_data.c | 3 +-
arch/arm/mach-omap2/powerdomains3xxx_data.c | 3 +-
arch/arm/mach-omap2/powerdomains44xx_data.c | 3 +-
arch/arm/plat-omap/gpio.c | 5 +---
arch/arm/plat-omap/include/plat/gpio.h | 2 +
arch/arm/plat-omap/include/plat/omap-pm.h | 2 -
arch/arm/plat-omap/omap-pm-noop.c | 2 -
26 files changed, 44 insertions(+), 71 deletions(-)
rename arch/arm/{plat-omap/include/plat/powerdomain.h => mach-omap2/powerdomain.h} (92%)
delete mode 100644 arch/arm/mach-omap2/powerdomains.h
diff --git a/arch/arm/mach-omap2/clockdomain.c b/arch/arm/mach-omap2/clockdomain.c
index dadfb3f..4ebfa26 100644
--- a/arch/arm/mach-omap2/clockdomain.c
+++ b/arch/arm/mach-omap2/clockdomain.c
@@ -34,7 +34,7 @@
#include "prcm44xx.h"
#include <plat/clock.h>
-#include <plat/powerdomain.h>
+#include "powerdomain.h"
#include "clockdomain.h"
#include <plat/prcm.h>
diff --git a/arch/arm/mach-omap2/clockdomain.h b/arch/arm/mach-omap2/clockdomain.h
index 372c646..de3faa2 100644
--- a/arch/arm/mach-omap2/clockdomain.h
+++ b/arch/arm/mach-omap2/clockdomain.h
@@ -18,7 +18,7 @@
#include <linux/init.h>
-#include <plat/powerdomain.h>
+#include "powerdomain.h"
#include <plat/clock.h>
#include <plat/cpu.h>
diff --git a/arch/arm/mach-omap2/cpuidle34xx.c b/arch/arm/mach-omap2/cpuidle34xx.c
index 568dff7..81b0a90 100644
--- a/arch/arm/mach-omap2/cpuidle34xx.c
+++ b/arch/arm/mach-omap2/cpuidle34xx.c
@@ -27,7 +27,7 @@
#include <plat/prcm.h>
#include <plat/irqs.h>
-#include <plat/powerdomain.h>
+#include "powerdomain.h"
#include "clockdomain.h"
#include <plat/serial.h>
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
index 1151f4a..a31acff 100644
--- a/arch/arm/mach-omap2/io.c
+++ b/arch/arm/mach-omap2/io.c
@@ -39,7 +39,7 @@
#include "io.h"
#include <plat/omap-pm.h>
-#include <plat/powerdomain.h>
+#include "powerdomain.h"
#include "clockdomain.h"
#include <plat/omap_hwmod.h>
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index 10bd001..38652d0 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -139,7 +139,7 @@
#include <plat/common.h>
#include <plat/cpu.h>
#include "clockdomain.h"
-#include <plat/powerdomain.h>
+#include "powerdomain.h"
#include <plat/clock.h>
#include <plat/omap_hwmod.h>
#include <plat/prcm.h>
diff --git a/arch/arm/mach-omap2/pm-debug.c b/arch/arm/mach-omap2/pm-debug.c
index 3fc7707..ed892ae 100644
--- a/arch/arm/mach-omap2/pm-debug.c
+++ b/arch/arm/mach-omap2/pm-debug.c
@@ -29,7 +29,7 @@
#include <plat/clock.h>
#include <plat/board.h>
-#include <plat/powerdomain.h>
+#include "powerdomain.h"
#include "clockdomain.h"
#include <plat/dmtimer.h>
diff --git a/arch/arm/mach-omap2/pm.c b/arch/arm/mach-omap2/pm.c
index 60cfe67..cf1c4c9 100644
--- a/arch/arm/mach-omap2/pm.c
+++ b/arch/arm/mach-omap2/pm.c
@@ -18,7 +18,7 @@
#include <plat/omap_device.h>
#include <plat/common.h>
-#include <plat/powerdomain.h>
+#include "powerdomain.h"
#include "clockdomain.h"
static struct omap_device_pm_latency *pm_lats;
diff --git a/arch/arm/mach-omap2/pm.h b/arch/arm/mach-omap2/pm.h
index 0d75bfd..642e519 100644
--- a/arch/arm/mach-omap2/pm.h
+++ b/arch/arm/mach-omap2/pm.h
@@ -11,7 +11,7 @@
#ifndef __ARCH_ARM_MACH_OMAP2_PM_H
#define __ARCH_ARM_MACH_OMAP2_PM_H
-#include <plat/powerdomain.h>
+#include "powerdomain.h"
extern void *omap3_secure_ram_storage;
extern void omap3_pm_off_mode_enable(int);
diff --git a/arch/arm/mach-omap2/pm24xx.c b/arch/arm/mach-omap2/pm24xx.c
index 7d4933b..0413314 100644
--- a/arch/arm/mach-omap2/pm24xx.c
+++ b/arch/arm/mach-omap2/pm24xx.c
@@ -50,7 +50,7 @@
#include "pm.h"
#include "control.h"
-#include <plat/powerdomain.h>
+#include "powerdomain.h"
#include "clockdomain.h"
static void (*omap2_sram_idle)(void);
@@ -107,7 +107,7 @@ static void omap2_enter_full_retention(void)
l = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0) | OMAP24XX_USBSTANDBYCTRL;
omap_ctrl_writel(l, OMAP2_CONTROL_DEVCONF0);
- omap2_gpio_prepare_for_idle(PWRDM_POWER_RET);
+ omap2_gpio_prepare_for_idle(0);
if (omap2_pm_debug) {
omap2_pm_dump(0, 0, 0);
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index 43c1a43..e804a9f 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -32,7 +32,7 @@
#include <plat/sram.h>
#include "clockdomain.h"
-#include <plat/powerdomain.h>
+#include "powerdomain.h"
#include <plat/serial.h>
#include <plat/sdrc.h>
#include <plat/prcm.h>
@@ -344,6 +344,7 @@ void omap_sram_idle(void)
int mpu_next_state = PWRDM_POWER_ON;
int per_next_state = PWRDM_POWER_ON;
int core_next_state = PWRDM_POWER_ON;
+ int per_going_off;
int core_prev_state, per_prev_state;
u32 sdrc_pwr = 0;
@@ -394,9 +395,10 @@ void omap_sram_idle(void)
/* PER */
if (per_next_state < PWRDM_POWER_ON) {
+ per_going_off = (per_next_state == PWRDM_POWER_OFF) ? 1 : 0;
omap_uart_prepare_idle(2);
omap_uart_prepare_idle(3);
- omap2_gpio_prepare_for_idle(per_next_state);
+ omap2_gpio_prepare_for_idle(per_going_off);
if (per_next_state == PWRDM_POWER_OFF)
omap3_per_save_context();
}
diff --git a/arch/arm/mach-omap2/pm44xx.c b/arch/arm/mach-omap2/pm44xx.c
index 54544b4..32d02cb 100644
--- a/arch/arm/mach-omap2/pm44xx.c
+++ b/arch/arm/mach-omap2/pm44xx.c
@@ -16,7 +16,7 @@
#include <linux/err.h>
#include <linux/slab.h>
-#include <plat/powerdomain.h>
+#include "powerdomain.h"
#include <mach/omap4-common.h>
struct power_state {
diff --git a/arch/arm/mach-omap2/powerdomain-common.c b/arch/arm/mach-omap2/powerdomain-common.c
index cb01c7a..171fccd 100644
--- a/arch/arm/mach-omap2/powerdomain-common.c
+++ b/arch/arm/mach-omap2/powerdomain-common.c
@@ -20,7 +20,6 @@
#include "cm-regbits-44xx.h"
#include "prm-regbits-34xx.h"
#include "prm-regbits-44xx.h"
-#include "powerdomains.h"
/*
* OMAP3 and OMAP4 specific register bit initialisations
diff --git a/arch/arm/mach-omap2/powerdomain.c b/arch/arm/mach-omap2/powerdomain.c
index 7eb7ba4..06ef60ee 100644
--- a/arch/arm/mach-omap2/powerdomain.c
+++ b/arch/arm/mach-omap2/powerdomain.c
@@ -26,7 +26,7 @@
#include "prm44xx.h"
#include <plat/cpu.h>
-#include <plat/powerdomain.h>
+#include "powerdomain.h"
#include "clockdomain.h"
#include <plat/prcm.h>
diff --git a/arch/arm/plat-omap/include/plat/powerdomain.h b/arch/arm/mach-omap2/powerdomain.h
similarity index 92%
rename from arch/arm/plat-omap/include/plat/powerdomain.h
rename to arch/arm/mach-omap2/powerdomain.h
index a0d3a30..35b5b48 100644
--- a/arch/arm/plat-omap/include/plat/powerdomain.h
+++ b/arch/arm/mach-omap2/powerdomain.h
@@ -1,10 +1,10 @@
/*
* OMAP2/3/4 powerdomain control
*
- * Copyright (C) 2007-2008 Texas Instruments, Inc.
+ * Copyright (C) 2007-2008, 2010 Texas Instruments, Inc.
* Copyright (C) 2007-2010 Nokia Corporation
*
- * Written by Paul Walmsley
+ * Paul Walmsley
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
@@ -14,13 +14,13 @@
* opportunity.
*/
-#ifndef ASM_ARM_PLAT_OMAP_INCLUDE_PLAT_POWERDOMAIN
-#define ASM_ARM_PLAT_OMAP_INCLUDE_PLAT_POWERDOMAIN
+#ifndef __ARCH_ARM_MACH_OMAP2_POWERDOMAIN_H
+#define __ARCH_ARM_MACH_OMAP2_POWERDOMAIN_H
#include <linux/types.h>
#include <linux/list.h>
-#include <asm/atomic.h>
+#include <linux/atomic.h>
#include <plat/cpu.h>
@@ -216,4 +216,17 @@ extern void omap2xxx_powerdomains_init(void);
extern void omap3xxx_powerdomains_init(void);
extern void omap44xx_powerdomains_init(void);
+extern struct pwrdm_ops omap2_pwrdm_operations;
+extern struct pwrdm_ops omap3_pwrdm_operations;
+extern struct pwrdm_ops omap4_pwrdm_operations;
+
+/* Common Internal functions used across OMAP rev's */
+extern u32 omap2_pwrdm_get_mem_bank_onstate_mask(u8 bank);
+extern u32 omap2_pwrdm_get_mem_bank_retst_mask(u8 bank);
+extern u32 omap2_pwrdm_get_mem_bank_stst_mask(u8 bank);
+
+extern struct powerdomain wkup_omap2_pwrdm;
+extern struct powerdomain gfx_omap2_pwrdm;
+
+
#endif
diff --git a/arch/arm/mach-omap2/powerdomain2xxx_3xxx.c b/arch/arm/mach-omap2/powerdomain2xxx_3xxx.c
index b5e9e4d..d523389 100644
--- a/arch/arm/mach-omap2/powerdomain2xxx_3xxx.c
+++ b/arch/arm/mach-omap2/powerdomain2xxx_3xxx.c
@@ -18,8 +18,8 @@
#include <plat/prcm.h>
+#include "powerdomain.h"
#include "prm-regbits-34xx.h"
-#include "powerdomains.h"
#include "prm.h"
#include "prm-regbits-24xx.h"
#include "prm-regbits-34xx.h"
diff --git a/arch/arm/mach-omap2/powerdomain44xx.c b/arch/arm/mach-omap2/powerdomain44xx.c
index 28bf5e3..a7880af 100644
--- a/arch/arm/mach-omap2/powerdomain44xx.c
+++ b/arch/arm/mach-omap2/powerdomain44xx.c
@@ -16,13 +16,12 @@
#include <linux/errno.h>
#include <linux/delay.h>
-#include <plat/powerdomain.h>
+#include "powerdomain.h"
#include <plat/prcm.h>
#include "prm2xxx_3xxx.h"
#include "prm44xx.h"
#include "prminst44xx.h"
#include "prm-regbits-44xx.h"
-#include "powerdomains.h"
static int omap4_pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst)
{
diff --git a/arch/arm/mach-omap2/powerdomains.h b/arch/arm/mach-omap2/powerdomains.h
deleted file mode 100644
index f83adaf..0000000
--- a/arch/arm/mach-omap2/powerdomains.h
+++ /dev/null
@@ -1,30 +0,0 @@
-/*
- * OMAP2+ powerdomain prototypes
- *
- * Copyright (C) 2010 Texas Instruments, Inc.
- *
- * Rajendra Nayak <rnayak@ti.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#ifndef ARCH_ARM_MACH_OMAP2_POWERDOMAINS_H
-#define ARCH_ARM_MACH_OMAP2_POWERDOMAINS_H
-
-#include <plat/powerdomain.h>
-
-extern struct pwrdm_ops omap2_pwrdm_operations;
-extern struct pwrdm_ops omap3_pwrdm_operations;
-extern struct pwrdm_ops omap4_pwrdm_operations;
-
-/* Common Internal functions used across OMAP rev's */
-extern u32 omap2_pwrdm_get_mem_bank_onstate_mask(u8 bank);
-extern u32 omap2_pwrdm_get_mem_bank_retst_mask(u8 bank);
-extern u32 omap2_pwrdm_get_mem_bank_stst_mask(u8 bank);
-
-extern struct powerdomain wkup_omap2_pwrdm;
-extern struct powerdomain gfx_omap2_pwrdm;
-
-#endif
diff --git a/arch/arm/mach-omap2/powerdomains2xxx_3xxx_data.c b/arch/arm/mach-omap2/powerdomains2xxx_3xxx_data.c
index 14c6ef7..5b4dd97 100644
--- a/arch/arm/mach-omap2/powerdomains2xxx_3xxx_data.c
+++ b/arch/arm/mach-omap2/powerdomains2xxx_3xxx_data.c
@@ -45,13 +45,11 @@
* address offset is different between the C55 and C64 DSPs.
*/
-#include <plat/powerdomain.h>
+#include "powerdomain.h"
#include "prcm-common.h"
#include "prm.h"
-#include "powerdomains.h"
-
/* OMAP2/3-common powerdomains */
/*
diff --git a/arch/arm/mach-omap2/powerdomains2xxx_3xxx_data.h b/arch/arm/mach-omap2/powerdomains2xxx_3xxx_data.h
index 45d684a..fa31166 100644
--- a/arch/arm/mach-omap2/powerdomains2xxx_3xxx_data.h
+++ b/arch/arm/mach-omap2/powerdomains2xxx_3xxx_data.h
@@ -14,7 +14,7 @@
#ifndef __ARCH_ARM_MACH_OMAP2_POWERDOMAINS2XXX_3XXX_DATA_H
#define __ARCH_ARM_MACH_OMAP2_POWERDOMAINS2XXX_3XXX_DATA_H
-#include <plat/powerdomain.h>
+#include "powerdomain.h"
extern struct powerdomain gfx_omap2_pwrdm;
extern struct powerdomain wkup_omap2_pwrdm;
diff --git a/arch/arm/mach-omap2/powerdomains2xxx_data.c b/arch/arm/mach-omap2/powerdomains2xxx_data.c
index e136895..9b1a335 100644
--- a/arch/arm/mach-omap2/powerdomains2xxx_data.c
+++ b/arch/arm/mach-omap2/powerdomains2xxx_data.c
@@ -14,9 +14,8 @@
#include <linux/kernel.h>
#include <linux/init.h>
-#include <plat/powerdomain.h>
+#include "powerdomain.h"
#include "powerdomains2xxx_3xxx_data.h"
-#include "powerdomains.h"
#include "prcm-common.h"
#include "prm2xxx_3xxx.h"
diff --git a/arch/arm/mach-omap2/powerdomains3xxx_data.c b/arch/arm/mach-omap2/powerdomains3xxx_data.c
index f383784..7e712b0 100644
--- a/arch/arm/mach-omap2/powerdomains3xxx_data.c
+++ b/arch/arm/mach-omap2/powerdomains3xxx_data.c
@@ -14,9 +14,8 @@
#include <linux/kernel.h>
#include <linux/init.h>
-#include <plat/powerdomain.h>
+#include "powerdomain.h"
#include "powerdomains2xxx_3xxx_data.h"
-#include "powerdomains.h"
#include "prcm-common.h"
#include "prm2xxx_3xxx.h"
diff --git a/arch/arm/mach-omap2/powerdomains44xx_data.c b/arch/arm/mach-omap2/powerdomains44xx_data.c
index 823f477..5fdf485 100644
--- a/arch/arm/mach-omap2/powerdomains44xx_data.c
+++ b/arch/arm/mach-omap2/powerdomains44xx_data.c
@@ -22,8 +22,7 @@
#include <linux/kernel.h>
#include <linux/init.h>
-#include <plat/powerdomain.h>
-#include "powerdomains.h"
+#include "powerdomain.h"
#include "prcm-common.h"
#include "prcm44xx.h"
diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c
index c05c653..fa6d18d 100644
--- a/arch/arm/plat-omap/gpio.c
+++ b/arch/arm/plat-omap/gpio.c
@@ -27,7 +27,6 @@
#include <mach/irqs.h>
#include <mach/gpio.h>
#include <asm/mach/irq.h>
-#include <plat/powerdomain.h>
/*
* OMAP1510 GPIO registers
@@ -2074,7 +2073,7 @@ static struct sys_device omap_gpio_device = {
static int workaround_enabled;
-void omap2_gpio_prepare_for_idle(int power_state)
+void omap2_gpio_prepare_for_idle(int off_mode)
{
int i, c = 0;
int min = 0;
@@ -2090,7 +2089,7 @@ void omap2_gpio_prepare_for_idle(int power_state)
for (j = 0; j < hweight_long(bank->dbck_enable_mask); j++)
clk_disable(bank->dbck);
- if (power_state > PWRDM_POWER_OFF)
+ if (!off_mode)
continue;
/* If going to OFF, remove triggering for all
diff --git a/arch/arm/plat-omap/include/plat/gpio.h b/arch/arm/plat-omap/include/plat/gpio.h
index de1c604..d5634c5 100644
--- a/arch/arm/plat-omap/include/plat/gpio.h
+++ b/arch/arm/plat-omap/include/plat/gpio.h
@@ -72,7 +72,7 @@
IH_GPIO_BASE + (nr))
extern int omap_gpio_init(void); /* Call from board init only */
-extern void omap2_gpio_prepare_for_idle(int power_state);
+extern void omap2_gpio_prepare_for_idle(int off_mode);
extern void omap2_gpio_resume_after_idle(void);
extern void omap_set_gpio_debounce(int gpio, int enable);
extern void omap_set_gpio_debounce_time(int gpio, int enable);
diff --git a/arch/arm/plat-omap/include/plat/omap-pm.h b/arch/arm/plat-omap/include/plat/omap-pm.h
index 728fbb9..639bf91 100644
--- a/arch/arm/plat-omap/include/plat/omap-pm.h
+++ b/arch/arm/plat-omap/include/plat/omap-pm.h
@@ -18,8 +18,6 @@
#include <linux/cpufreq.h>
#include <linux/clk.h>
-#include "powerdomain.h"
-
/**
* struct omap_opp - clock frequency-to-OPP ID table for DSP, MPU
* @rate: target clock rate
diff --git a/arch/arm/plat-omap/omap-pm-noop.c b/arch/arm/plat-omap/omap-pm-noop.c
index e129ce8..81b4ac1 100644
--- a/arch/arm/plat-omap/omap-pm-noop.c
+++ b/arch/arm/plat-omap/omap-pm-noop.c
@@ -24,8 +24,6 @@
/* Interface documentation is in mach/omap-pm.h */
#include <plat/omap-pm.h>
-#include <plat/powerdomain.h>
-
struct omap_opp *dsp_opps;
struct omap_opp *mpu_opps;
struct omap_opp *l3_opps;
^ permalink raw reply related [flat|nested] 38+ messages in thread* [PATCH 10/11] OMAP2+: powerdomain: move header file from plat-omap to mach-omap2
2010-12-08 6:18 ` [PATCH 10/11] OMAP2+: powerdomain: " Paul Walmsley
@ 2010-12-15 5:37 ` Paul Walmsley
2010-12-15 5:51 ` Paul Walmsley
0 siblings, 1 reply; 38+ messages in thread
From: Paul Walmsley @ 2010-12-15 5:37 UTC (permalink / raw)
To: linux-arm-kernel
On Tue, 7 Dec 2010, Paul Walmsley wrote:
> The OMAP powerdomain code and data is all OMAP2+-specific. This seems
> unlikely to change any time soon. Move plat-omap/include/plat/powerdomain.h
> to mach-omap2/powerdomain.h. The primary point of doing this is to remove
> the temptation for unrelated upper-layer code to access powerdomain code
> and data directly.
>
> As part of this process, remove the references to powerdomain data from
> the GPIO "driver" and the OMAP PM no-op layer, both in plat-omap.
>
> Signed-off-by: Paul Walmsley <paul@pwsan.com>
> Cc: Kevin Hilman <khilman@deeprootsystems.com>
This patch has been updated to get DSPBridge building again. The
DSPBridge should not be touching the powerdomain headers; this is
just a temporary workaround until the DSPBridge people fix the code.
- Paul
From: Paul Walmsley <paul@pwsan.com>
Date: Tue, 14 Dec 2010 13:03:49 -0700
Subject: [PATCH] OMAP2+: powerdomain: move header file from plat-omap to mach-omap2
The OMAP powerdomain code and data is all OMAP2+-specific. This seems
unlikely to change any time soon. Move plat-omap/include/plat/powerdomain.h
to mach-omap2/powerdomain.h. The primary point of doing this is to remove
the temptation for unrelated upper-layer code to access powerdomain code
and data directly.
As part of this process, remove the references to powerdomain data
from the GPIO "driver" and the OMAP PM no-op layer, both in plat-omap.
Change the DSPBridge code to point to the new location for the
powerdomain headers. The DSPBridge code should not be including the
powerdomain headers; these should be removed.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
Cc: Omar Ramirez Luna <omar.ramirez@ti.com>
Cc: Felipe Contreras <felipe.contreras@gmail.com>
Cc: Greg Kroah-Hartman <greg@kroah.com>
---
arch/arm/mach-omap2/clockdomain.c | 2 +-
arch/arm/mach-omap2/clockdomain.h | 2 +-
arch/arm/mach-omap2/cpuidle34xx.c | 2 +-
arch/arm/mach-omap2/io.c | 2 +-
arch/arm/mach-omap2/omap_hwmod.c | 2 +-
arch/arm/mach-omap2/pm-debug.c | 2 +-
arch/arm/mach-omap2/pm.c | 2 +-
arch/arm/mach-omap2/pm.h | 2 +-
arch/arm/mach-omap2/pm24xx.c | 4 +-
arch/arm/mach-omap2/pm34xx.c | 6 ++-
arch/arm/mach-omap2/pm44xx.c | 2 +-
arch/arm/mach-omap2/powerdomain-common.c | 1 -
arch/arm/mach-omap2/powerdomain.c | 2 +-
.../include/plat => mach-omap2}/powerdomain.h | 23 ++++++++++++---
arch/arm/mach-omap2/powerdomain2xxx_3xxx.c | 2 +-
arch/arm/mach-omap2/powerdomain44xx.c | 3 +-
arch/arm/mach-omap2/powerdomains.h | 30 --------------------
arch/arm/mach-omap2/powerdomains2xxx_3xxx_data.c | 4 +--
arch/arm/mach-omap2/powerdomains2xxx_3xxx_data.h | 2 +-
arch/arm/mach-omap2/powerdomains2xxx_data.c | 3 +-
arch/arm/mach-omap2/powerdomains3xxx_data.c | 3 +-
arch/arm/mach-omap2/powerdomains44xx_data.c | 3 +-
arch/arm/plat-omap/gpio.c | 5 +--
arch/arm/plat-omap/include/plat/gpio.h | 2 +-
arch/arm/plat-omap/include/plat/omap-pm.h | 2 -
arch/arm/plat-omap/omap-pm-noop.c | 2 -
26 files changed, 44 insertions(+), 71 deletions(-)
rename arch/arm/{plat-omap/include/plat => mach-omap2}/powerdomain.h (92%)
delete mode 100644 arch/arm/mach-omap2/powerdomains.h
diff --git a/arch/arm/mach-omap2/clockdomain.c b/arch/arm/mach-omap2/clockdomain.c
index 650bf68..e20b986 100644
--- a/arch/arm/mach-omap2/clockdomain.c
+++ b/arch/arm/mach-omap2/clockdomain.c
@@ -34,7 +34,7 @@
#include "prcm44xx.h"
#include <plat/clock.h>
-#include <plat/powerdomain.h>
+#include "powerdomain.h"
#include "clockdomain.h"
#include <plat/prcm.h>
diff --git a/arch/arm/mach-omap2/clockdomain.h b/arch/arm/mach-omap2/clockdomain.h
index 372c646..de3faa2 100644
--- a/arch/arm/mach-omap2/clockdomain.h
+++ b/arch/arm/mach-omap2/clockdomain.h
@@ -18,7 +18,7 @@
#include <linux/init.h>
-#include <plat/powerdomain.h>
+#include "powerdomain.h"
#include <plat/clock.h>
#include <plat/cpu.h>
diff --git a/arch/arm/mach-omap2/cpuidle34xx.c b/arch/arm/mach-omap2/cpuidle34xx.c
index 568dff7..81b0a90 100644
--- a/arch/arm/mach-omap2/cpuidle34xx.c
+++ b/arch/arm/mach-omap2/cpuidle34xx.c
@@ -27,7 +27,7 @@
#include <plat/prcm.h>
#include <plat/irqs.h>
-#include <plat/powerdomain.h>
+#include "powerdomain.h"
#include "clockdomain.h"
#include <plat/serial.h>
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
index ab2d1ed..9ccb239 100644
--- a/arch/arm/mach-omap2/io.c
+++ b/arch/arm/mach-omap2/io.c
@@ -39,7 +39,7 @@
#include "io.h"
#include <plat/omap-pm.h>
-#include <plat/powerdomain.h>
+#include "powerdomain.h"
#include "clockdomain.h"
#include <plat/omap_hwmod.h>
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index e1358ba..12856eb 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -140,7 +140,7 @@
#include <plat/common.h>
#include <plat/cpu.h>
#include "clockdomain.h"
-#include <plat/powerdomain.h>
+#include "powerdomain.h"
#include <plat/clock.h>
#include <plat/omap_hwmod.h>
#include <plat/prcm.h>
diff --git a/arch/arm/mach-omap2/pm-debug.c b/arch/arm/mach-omap2/pm-debug.c
index 3fc7707..ed892ae 100644
--- a/arch/arm/mach-omap2/pm-debug.c
+++ b/arch/arm/mach-omap2/pm-debug.c
@@ -29,7 +29,7 @@
#include <plat/clock.h>
#include <plat/board.h>
-#include <plat/powerdomain.h>
+#include "powerdomain.h"
#include "clockdomain.h"
#include <plat/dmtimer.h>
diff --git a/arch/arm/mach-omap2/pm.c b/arch/arm/mach-omap2/pm.c
index 60cfe67..cf1c4c9 100644
--- a/arch/arm/mach-omap2/pm.c
+++ b/arch/arm/mach-omap2/pm.c
@@ -18,7 +18,7 @@
#include <plat/omap_device.h>
#include <plat/common.h>
-#include <plat/powerdomain.h>
+#include "powerdomain.h"
#include "clockdomain.h"
static struct omap_device_pm_latency *pm_lats;
diff --git a/arch/arm/mach-omap2/pm.h b/arch/arm/mach-omap2/pm.h
index 0d75bfd..642e519 100644
--- a/arch/arm/mach-omap2/pm.h
+++ b/arch/arm/mach-omap2/pm.h
@@ -11,7 +11,7 @@
#ifndef __ARCH_ARM_MACH_OMAP2_PM_H
#define __ARCH_ARM_MACH_OMAP2_PM_H
-#include <plat/powerdomain.h>
+#include "powerdomain.h"
extern void *omap3_secure_ram_storage;
extern void omap3_pm_off_mode_enable(int);
diff --git a/arch/arm/mach-omap2/pm24xx.c b/arch/arm/mach-omap2/pm24xx.c
index 7d4933b..0413314 100644
--- a/arch/arm/mach-omap2/pm24xx.c
+++ b/arch/arm/mach-omap2/pm24xx.c
@@ -50,7 +50,7 @@
#include "pm.h"
#include "control.h"
-#include <plat/powerdomain.h>
+#include "powerdomain.h"
#include "clockdomain.h"
static void (*omap2_sram_idle)(void);
@@ -107,7 +107,7 @@ static void omap2_enter_full_retention(void)
l = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0) | OMAP24XX_USBSTANDBYCTRL;
omap_ctrl_writel(l, OMAP2_CONTROL_DEVCONF0);
- omap2_gpio_prepare_for_idle(PWRDM_POWER_RET);
+ omap2_gpio_prepare_for_idle(0);
if (omap2_pm_debug) {
omap2_pm_dump(0, 0, 0);
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index 43c1a43..e804a9f 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -32,7 +32,7 @@
#include <plat/sram.h>
#include "clockdomain.h"
-#include <plat/powerdomain.h>
+#include "powerdomain.h"
#include <plat/serial.h>
#include <plat/sdrc.h>
#include <plat/prcm.h>
@@ -344,6 +344,7 @@ void omap_sram_idle(void)
int mpu_next_state = PWRDM_POWER_ON;
int per_next_state = PWRDM_POWER_ON;
int core_next_state = PWRDM_POWER_ON;
+ int per_going_off;
int core_prev_state, per_prev_state;
u32 sdrc_pwr = 0;
@@ -394,9 +395,10 @@ void omap_sram_idle(void)
/* PER */
if (per_next_state < PWRDM_POWER_ON) {
+ per_going_off = (per_next_state == PWRDM_POWER_OFF) ? 1 : 0;
omap_uart_prepare_idle(2);
omap_uart_prepare_idle(3);
- omap2_gpio_prepare_for_idle(per_next_state);
+ omap2_gpio_prepare_for_idle(per_going_off);
if (per_next_state == PWRDM_POWER_OFF)
omap3_per_save_context();
}
diff --git a/arch/arm/mach-omap2/pm44xx.c b/arch/arm/mach-omap2/pm44xx.c
index 54544b4..32d02cb 100644
--- a/arch/arm/mach-omap2/pm44xx.c
+++ b/arch/arm/mach-omap2/pm44xx.c
@@ -16,7 +16,7 @@
#include <linux/err.h>
#include <linux/slab.h>
-#include <plat/powerdomain.h>
+#include "powerdomain.h"
#include <mach/omap4-common.h>
struct power_state {
diff --git a/arch/arm/mach-omap2/powerdomain-common.c b/arch/arm/mach-omap2/powerdomain-common.c
index cb01c7a..171fccd 100644
--- a/arch/arm/mach-omap2/powerdomain-common.c
+++ b/arch/arm/mach-omap2/powerdomain-common.c
@@ -20,7 +20,6 @@
#include "cm-regbits-44xx.h"
#include "prm-regbits-34xx.h"
#include "prm-regbits-44xx.h"
-#include "powerdomains.h"
/*
* OMAP3 and OMAP4 specific register bit initialisations
diff --git a/arch/arm/mach-omap2/powerdomain.c b/arch/arm/mach-omap2/powerdomain.c
index 7eb7ba4..06ef60ee 100644
--- a/arch/arm/mach-omap2/powerdomain.c
+++ b/arch/arm/mach-omap2/powerdomain.c
@@ -26,7 +26,7 @@
#include "prm44xx.h"
#include <plat/cpu.h>
-#include <plat/powerdomain.h>
+#include "powerdomain.h"
#include "clockdomain.h"
#include <plat/prcm.h>
diff --git a/arch/arm/plat-omap/include/plat/powerdomain.h b/arch/arm/mach-omap2/powerdomain.h
similarity index 92%
rename from arch/arm/plat-omap/include/plat/powerdomain.h
rename to arch/arm/mach-omap2/powerdomain.h
index a0d3a30..35b5b48 100644
--- a/arch/arm/plat-omap/include/plat/powerdomain.h
+++ b/arch/arm/mach-omap2/powerdomain.h
@@ -1,10 +1,10 @@
/*
* OMAP2/3/4 powerdomain control
*
- * Copyright (C) 2007-2008 Texas Instruments, Inc.
+ * Copyright (C) 2007-2008, 2010 Texas Instruments, Inc.
* Copyright (C) 2007-2010 Nokia Corporation
*
- * Written by Paul Walmsley
+ * Paul Walmsley
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
@@ -14,13 +14,13 @@
* opportunity.
*/
-#ifndef ASM_ARM_PLAT_OMAP_INCLUDE_PLAT_POWERDOMAIN
-#define ASM_ARM_PLAT_OMAP_INCLUDE_PLAT_POWERDOMAIN
+#ifndef __ARCH_ARM_MACH_OMAP2_POWERDOMAIN_H
+#define __ARCH_ARM_MACH_OMAP2_POWERDOMAIN_H
#include <linux/types.h>
#include <linux/list.h>
-#include <asm/atomic.h>
+#include <linux/atomic.h>
#include <plat/cpu.h>
@@ -216,4 +216,17 @@ extern void omap2xxx_powerdomains_init(void);
extern void omap3xxx_powerdomains_init(void);
extern void omap44xx_powerdomains_init(void);
+extern struct pwrdm_ops omap2_pwrdm_operations;
+extern struct pwrdm_ops omap3_pwrdm_operations;
+extern struct pwrdm_ops omap4_pwrdm_operations;
+
+/* Common Internal functions used across OMAP rev's */
+extern u32 omap2_pwrdm_get_mem_bank_onstate_mask(u8 bank);
+extern u32 omap2_pwrdm_get_mem_bank_retst_mask(u8 bank);
+extern u32 omap2_pwrdm_get_mem_bank_stst_mask(u8 bank);
+
+extern struct powerdomain wkup_omap2_pwrdm;
+extern struct powerdomain gfx_omap2_pwrdm;
+
+
#endif
diff --git a/arch/arm/mach-omap2/powerdomain2xxx_3xxx.c b/arch/arm/mach-omap2/powerdomain2xxx_3xxx.c
index b5e9e4d..d523389 100644
--- a/arch/arm/mach-omap2/powerdomain2xxx_3xxx.c
+++ b/arch/arm/mach-omap2/powerdomain2xxx_3xxx.c
@@ -18,8 +18,8 @@
#include <plat/prcm.h>
+#include "powerdomain.h"
#include "prm-regbits-34xx.h"
-#include "powerdomains.h"
#include "prm.h"
#include "prm-regbits-24xx.h"
#include "prm-regbits-34xx.h"
diff --git a/arch/arm/mach-omap2/powerdomain44xx.c b/arch/arm/mach-omap2/powerdomain44xx.c
index 28bf5e3..a7880af 100644
--- a/arch/arm/mach-omap2/powerdomain44xx.c
+++ b/arch/arm/mach-omap2/powerdomain44xx.c
@@ -16,13 +16,12 @@
#include <linux/errno.h>
#include <linux/delay.h>
-#include <plat/powerdomain.h>
+#include "powerdomain.h"
#include <plat/prcm.h>
#include "prm2xxx_3xxx.h"
#include "prm44xx.h"
#include "prminst44xx.h"
#include "prm-regbits-44xx.h"
-#include "powerdomains.h"
static int omap4_pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst)
{
diff --git a/arch/arm/mach-omap2/powerdomains.h b/arch/arm/mach-omap2/powerdomains.h
deleted file mode 100644
index f83adaf..0000000
--- a/arch/arm/mach-omap2/powerdomains.h
+++ /dev/null
@@ -1,30 +0,0 @@
-/*
- * OMAP2+ powerdomain prototypes
- *
- * Copyright (C) 2010 Texas Instruments, Inc.
- *
- * Rajendra Nayak <rnayak@ti.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#ifndef ARCH_ARM_MACH_OMAP2_POWERDOMAINS_H
-#define ARCH_ARM_MACH_OMAP2_POWERDOMAINS_H
-
-#include <plat/powerdomain.h>
-
-extern struct pwrdm_ops omap2_pwrdm_operations;
-extern struct pwrdm_ops omap3_pwrdm_operations;
-extern struct pwrdm_ops omap4_pwrdm_operations;
-
-/* Common Internal functions used across OMAP rev's */
-extern u32 omap2_pwrdm_get_mem_bank_onstate_mask(u8 bank);
-extern u32 omap2_pwrdm_get_mem_bank_retst_mask(u8 bank);
-extern u32 omap2_pwrdm_get_mem_bank_stst_mask(u8 bank);
-
-extern struct powerdomain wkup_omap2_pwrdm;
-extern struct powerdomain gfx_omap2_pwrdm;
-
-#endif
diff --git a/arch/arm/mach-omap2/powerdomains2xxx_3xxx_data.c b/arch/arm/mach-omap2/powerdomains2xxx_3xxx_data.c
index 14c6ef7..5b4dd97 100644
--- a/arch/arm/mach-omap2/powerdomains2xxx_3xxx_data.c
+++ b/arch/arm/mach-omap2/powerdomains2xxx_3xxx_data.c
@@ -45,13 +45,11 @@
* address offset is different between the C55 and C64 DSPs.
*/
-#include <plat/powerdomain.h>
+#include "powerdomain.h"
#include "prcm-common.h"
#include "prm.h"
-#include "powerdomains.h"
-
/* OMAP2/3-common powerdomains */
/*
diff --git a/arch/arm/mach-omap2/powerdomains2xxx_3xxx_data.h b/arch/arm/mach-omap2/powerdomains2xxx_3xxx_data.h
index 45d684a..fa31166 100644
--- a/arch/arm/mach-omap2/powerdomains2xxx_3xxx_data.h
+++ b/arch/arm/mach-omap2/powerdomains2xxx_3xxx_data.h
@@ -14,7 +14,7 @@
#ifndef __ARCH_ARM_MACH_OMAP2_POWERDOMAINS2XXX_3XXX_DATA_H
#define __ARCH_ARM_MACH_OMAP2_POWERDOMAINS2XXX_3XXX_DATA_H
-#include <plat/powerdomain.h>
+#include "powerdomain.h"
extern struct powerdomain gfx_omap2_pwrdm;
extern struct powerdomain wkup_omap2_pwrdm;
diff --git a/arch/arm/mach-omap2/powerdomains2xxx_data.c b/arch/arm/mach-omap2/powerdomains2xxx_data.c
index e136895..9b1a335 100644
--- a/arch/arm/mach-omap2/powerdomains2xxx_data.c
+++ b/arch/arm/mach-omap2/powerdomains2xxx_data.c
@@ -14,9 +14,8 @@
#include <linux/kernel.h>
#include <linux/init.h>
-#include <plat/powerdomain.h>
+#include "powerdomain.h"
#include "powerdomains2xxx_3xxx_data.h"
-#include "powerdomains.h"
#include "prcm-common.h"
#include "prm2xxx_3xxx.h"
diff --git a/arch/arm/mach-omap2/powerdomains3xxx_data.c b/arch/arm/mach-omap2/powerdomains3xxx_data.c
index f383784..7e712b0 100644
--- a/arch/arm/mach-omap2/powerdomains3xxx_data.c
+++ b/arch/arm/mach-omap2/powerdomains3xxx_data.c
@@ -14,9 +14,8 @@
#include <linux/kernel.h>
#include <linux/init.h>
-#include <plat/powerdomain.h>
+#include "powerdomain.h"
#include "powerdomains2xxx_3xxx_data.h"
-#include "powerdomains.h"
#include "prcm-common.h"
#include "prm2xxx_3xxx.h"
diff --git a/arch/arm/mach-omap2/powerdomains44xx_data.c b/arch/arm/mach-omap2/powerdomains44xx_data.c
index 823f477..5fdf485 100644
--- a/arch/arm/mach-omap2/powerdomains44xx_data.c
+++ b/arch/arm/mach-omap2/powerdomains44xx_data.c
@@ -22,8 +22,7 @@
#include <linux/kernel.h>
#include <linux/init.h>
-#include <plat/powerdomain.h>
-#include "powerdomains.h"
+#include "powerdomain.h"
#include "prcm-common.h"
#include "prcm44xx.h"
diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c
index 8d493b9..1f98e0b 100644
--- a/arch/arm/plat-omap/gpio.c
+++ b/arch/arm/plat-omap/gpio.c
@@ -29,7 +29,6 @@
#include <mach/irqs.h>
#include <mach/gpio.h>
#include <asm/mach/irq.h>
-#include <plat/powerdomain.h>
/*
* OMAP1510 GPIO registers
@@ -1864,7 +1863,7 @@ static struct sys_device omap_gpio_device = {
static int workaround_enabled;
-void omap2_gpio_prepare_for_idle(int power_state)
+void omap2_gpio_prepare_for_idle(int off_mode)
{
int i, c = 0;
int min = 0;
@@ -1880,7 +1879,7 @@ void omap2_gpio_prepare_for_idle(int power_state)
for (j = 0; j < hweight_long(bank->dbck_enable_mask); j++)
clk_disable(bank->dbck);
- if (power_state > PWRDM_POWER_OFF)
+ if (!off_mode)
continue;
/* If going to OFF, remove triggering for all
diff --git a/arch/arm/plat-omap/include/plat/gpio.h b/arch/arm/plat-omap/include/plat/gpio.h
index 41ff2f8..d6f9fa0 100644
--- a/arch/arm/plat-omap/include/plat/gpio.h
+++ b/arch/arm/plat-omap/include/plat/gpio.h
@@ -82,7 +82,7 @@ struct omap_gpio_platform_data {
/* TODO: Analyze removing gpio_bank_count usage from driver code */
extern int gpio_bank_count;
-extern void omap2_gpio_prepare_for_idle(int power_state);
+extern void omap2_gpio_prepare_for_idle(int off_mode);
extern void omap2_gpio_resume_after_idle(void);
extern void omap_set_gpio_debounce(int gpio, int enable);
extern void omap_set_gpio_debounce_time(int gpio, int enable);
diff --git a/arch/arm/plat-omap/include/plat/omap-pm.h b/arch/arm/plat-omap/include/plat/omap-pm.h
index 728fbb9..639bf91 100644
--- a/arch/arm/plat-omap/include/plat/omap-pm.h
+++ b/arch/arm/plat-omap/include/plat/omap-pm.h
@@ -18,8 +18,6 @@
#include <linux/cpufreq.h>
#include <linux/clk.h>
-#include "powerdomain.h"
-
/**
* struct omap_opp - clock frequency-to-OPP ID table for DSP, MPU
* @rate: target clock rate
diff --git a/arch/arm/plat-omap/omap-pm-noop.c b/arch/arm/plat-omap/omap-pm-noop.c
index e129ce8..81b4ac1 100644
--- a/arch/arm/plat-omap/omap-pm-noop.c
+++ b/arch/arm/plat-omap/omap-pm-noop.c
@@ -24,8 +24,6 @@
/* Interface documentation is in mach/omap-pm.h */
#include <plat/omap-pm.h>
-#include <plat/powerdomain.h>
-
struct omap_opp *dsp_opps;
struct omap_opp *mpu_opps;
struct omap_opp *l3_opps;
--
1.7.2.3
^ permalink raw reply related [flat|nested] 38+ messages in thread* [PATCH 10/11] OMAP2+: powerdomain: move header file from plat-omap to mach-omap2
2010-12-15 5:37 ` Paul Walmsley
@ 2010-12-15 5:51 ` Paul Walmsley
0 siblings, 0 replies; 38+ messages in thread
From: Paul Walmsley @ 2010-12-15 5:51 UTC (permalink / raw)
To: linux-arm-kernel
On Tue, 14 Dec 2010, Paul Walmsley wrote:
> On Tue, 7 Dec 2010, Paul Walmsley wrote:
>
> > The OMAP powerdomain code and data is all OMAP2+-specific. This seems
> > unlikely to change any time soon. Move plat-omap/include/plat/powerdomain.h
> > to mach-omap2/powerdomain.h. The primary point of doing this is to remove
> > the temptation for unrelated upper-layer code to access powerdomain code
> > and data directly.
> >
> > As part of this process, remove the references to powerdomain data from
> > the GPIO "driver" and the OMAP PM no-op layer, both in plat-omap.
> >
> > Signed-off-by: Paul Walmsley <paul@pwsan.com>
> > Cc: Kevin Hilman <khilman@deeprootsystems.com>
>
> This patch has been updated to get DSPBridge building again. The
> DSPBridge should not be touching the powerdomain headers; this is
> just a temporary workaround until the DSPBridge people fix the code.
An old version of this patch was inadvertently sent. The crucial diff
(for review purposes anyway) from the previous patch is below.
Nothing earthshattering.
The updated integration tag that contains all of these updated changes is
'integration-2.6.38-20101214-013' available from
git://git.pwsan.com/linux-integration
- Paul
diff --git a/drivers/staging/tidspbridge/core/_tiomap.h b/drivers/staging/tidspbridge/core/_tiomap.h
index a3190e7..1159a50 100644
--- a/drivers/staging/tidspbridge/core/_tiomap.h
+++ b/drivers/staging/tidspbridge/core/_tiomap.h
@@ -24,7 +24,7 @@
* be removed. No driver should call pwrdm_* or clkdm_* functions
* directly; they should rely on OMAP core code to do this.
*/
-#include <plat/powerdomain.h>
+#include <mach-omap2/powerdomain.h>
#include <mach-omap2/clockdomain.h>
/*
* XXX These mach-omap2/ includes are wrong and should be removed. No
^ permalink raw reply related [flat|nested] 38+ messages in thread
* [PATCH 11/11] OMAP3: control/PM: move padconf save code to mach-omap2/control.c
2010-12-08 6:18 [PATCH 00/11] OMAP: PRCM/powerdomain/clockdomain patches for 2.6.38, part two Paul Walmsley
` (9 preceding siblings ...)
2010-12-08 6:18 ` [PATCH 10/11] OMAP2+: powerdomain: " Paul Walmsley
@ 2010-12-08 6:18 ` Paul Walmsley
2010-12-09 14:19 ` [PATCH 00/11] OMAP: PRCM/powerdomain/clockdomain patches for 2.6.38, part two Jarkko Nikula
` (2 subsequent siblings)
13 siblings, 0 replies; 38+ messages in thread
From: Paul Walmsley @ 2010-12-08 6:18 UTC (permalink / raw)
To: linux-arm-kernel
Move the padconf save code from pm34xx.c to the System Control Module
code in mach-omap2/control.c. This is part of the general push to
move direct register access from middle-layer core code to low-level
core code, so the middle-layer code can be abstracted to work on
multiple platforms and cleaned up.
In the medium-to-long term, this code should be called by the mux
layer code, not the PM idle code. This is because, according to the
TRM, saving the padconf only needs to be done when the padconf
changes[1].
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
Cc: Tony Lindgren <tony@atomide.com>
1. OMAP34xx Multimedia Device Silicon Revision 3.1.x [Rev. ZH] [SWPU222H]
Section 4.11.4 "Device Off-Mode Sequences"
---
arch/arm/mach-omap2/control.c | 32 ++++++++++++++++++++++++++++++++
arch/arm/mach-omap2/control.h | 1 +
arch/arm/mach-omap2/pm34xx.c | 11 +----------
arch/arm/plat-omap/include/plat/prcm.h | 3 ---
4 files changed, 34 insertions(+), 13 deletions(-)
diff --git a/arch/arm/mach-omap2/control.c b/arch/arm/mach-omap2/control.c
index 16bde76..891df18 100644
--- a/arch/arm/mach-omap2/control.c
+++ b/arch/arm/mach-omap2/control.c
@@ -26,6 +26,10 @@
#include "pm.h"
#include "control.h"
+/* Used by omap3_ctrl_save_padconf() */
+#define START_PADCONF_SAVE 0x2
+#define PADCONF_SAVE_DONE 0x1
+
static void __iomem *omap2_ctrl_base;
static void __iomem *omap4_ctrl_pad_base;
@@ -512,4 +516,32 @@ void omap3_control_restore_context(void)
OMAP343X_CONTROL_PADCONF_SYSNIRQ);
return;
}
+
+/**
+ * omap3_ctrl_save_padconf - save padconf registers to scratchpad RAM
+ *
+ * Tell the SCM to start saving the padconf registers, then wait for
+ * the process to complete. Returns 0 unconditionally, although it
+ * should also eventually be able to return -ETIMEDOUT, if the save
+ * does not complete.
+ *
+ * XXX This function is missing a timeout. What should it be?
+ */
+int omap3_ctrl_save_padconf(void)
+{
+ u32 cpo;
+
+ /* Save the padconf registers */
+ cpo = omap_ctrl_readl(OMAP343X_CONTROL_PADCONF_OFF);
+ cpo |= START_PADCONF_SAVE;
+ omap_ctrl_writel(cpo, OMAP343X_CONTROL_PADCONF_OFF);
+
+ /* wait for the save to complete */
+ while (!(omap_ctrl_readl(OMAP343X_CONTROL_GENERAL_PURPOSE_STATUS)
+ & PADCONF_SAVE_DONE))
+ udelay(1);
+
+ return 0;
+}
+
#endif /* CONFIG_ARCH_OMAP3 && CONFIG_PM */
diff --git a/arch/arm/mach-omap2/control.h b/arch/arm/mach-omap2/control.h
index a9325ad..5289461 100644
--- a/arch/arm/mach-omap2/control.h
+++ b/arch/arm/mach-omap2/control.h
@@ -351,6 +351,7 @@ extern u32 omap3_arm_context[128];
extern void omap3_control_save_context(void);
extern void omap3_control_restore_context(void);
extern void omap3_ctrl_write_boot_mode(u8 bootmode);
+extern int omap3_ctrl_save_padconf(void);
#else
#define omap_ctrl_base_get() 0
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index e804a9f..be755a6 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -117,16 +117,7 @@ static void omap3_disable_io_chain(void)
static void omap3_core_save_context(void)
{
- u32 control_padconf_off;
-
- /* Save the padconf registers */
- control_padconf_off = omap_ctrl_readl(OMAP343X_CONTROL_PADCONF_OFF);
- control_padconf_off |= START_PADCONF_SAVE;
- omap_ctrl_writel(control_padconf_off, OMAP343X_CONTROL_PADCONF_OFF);
- /* wait for the save to complete */
- while (!(omap_ctrl_readl(OMAP343X_CONTROL_GENERAL_PURPOSE_STATUS)
- & PADCONF_SAVE_DONE))
- udelay(1);
+ omap3_ctrl_save_padconf();
/*
* Force write last pad into memory, as this can fail in some
diff --git a/arch/arm/plat-omap/include/plat/prcm.h b/arch/arm/plat-omap/include/plat/prcm.h
index 078906d..2fdf8c8 100644
--- a/arch/arm/plat-omap/include/plat/prcm.h
+++ b/arch/arm/plat-omap/include/plat/prcm.h
@@ -32,9 +32,6 @@ void omap_prcm_arch_reset(char mode, const char *cmd);
int omap2_cm_wait_idlest(void __iomem *reg, u32 mask, u8 idlest,
const char *name);
-#define START_PADCONF_SAVE 0x2
-#define PADCONF_SAVE_DONE 0x1
-
#endif
^ permalink raw reply related [flat|nested] 38+ messages in thread* [PATCH 00/11] OMAP: PRCM/powerdomain/clockdomain patches for 2.6.38, part two
2010-12-08 6:18 [PATCH 00/11] OMAP: PRCM/powerdomain/clockdomain patches for 2.6.38, part two Paul Walmsley
` (10 preceding siblings ...)
2010-12-08 6:18 ` [PATCH 11/11] OMAP3: control/PM: move padconf save code to mach-omap2/control.c Paul Walmsley
@ 2010-12-09 14:19 ` Jarkko Nikula
2010-12-09 17:41 ` Paul Walmsley
2010-12-14 14:40 ` [PATCH 00/11] OMAP: PRCM/powerdomain/clockdomain patches for 2.6.38,part two Rajendra Nayak
2010-12-15 4:15 ` Santosh Shilimkar
13 siblings, 1 reply; 38+ messages in thread
From: Jarkko Nikula @ 2010-12-09 14:19 UTC (permalink / raw)
To: linux-arm-kernel
On Tue, 07 Dec 2010 23:18:28 -0700
Paul Walmsley <paul@pwsan.com> wrote:
> This series is available via git from git://git.pwsan.com/linux-2.6 in
> the branch 'pwrdm_prcm_b_2.6.38'. It applies on top of the "OMAP:
> PRCM/powerdomain/clockdomain patches for 2.6.38, part one" series,
> sent earlier.
>
> Kevin and OMAP ASoC-hackers, I'd appreciate review and acks, if
> appropriate, on the patches that touch code that you maintain. TI
> OMAP4 PM people, I would appreciate any testing assistance that you
> may be able to provide. Beno?t, I've tried to keep the kernel data
> files and the output of the scripts relatively similar, but we might
> need to do some tweaking of the scripts or data files to align them
> in the way that makes the most sense.
>
Is there some patch missing? Part one compiles but this set does not.
CC arch/arm/mach-omap2/clockdomain.o
arch/arm/mach-omap2/clockdomain.c:33: fatal error: cminst44xx.h: No
such file or directory compilation terminated.
make[1]: *** [arch/arm/mach-omap2/clockdomain.o] Error 1
make: *** [arch/arm/mach-omap2] Error 2
--
Jarkko
^ permalink raw reply [flat|nested] 38+ messages in thread* [PATCH 00/11] OMAP: PRCM/powerdomain/clockdomain patches for 2.6.38, part two
2010-12-09 14:19 ` [PATCH 00/11] OMAP: PRCM/powerdomain/clockdomain patches for 2.6.38, part two Jarkko Nikula
@ 2010-12-09 17:41 ` Paul Walmsley
0 siblings, 0 replies; 38+ messages in thread
From: Paul Walmsley @ 2010-12-09 17:41 UTC (permalink / raw)
To: linux-arm-kernel
Hello Jarkko
On Thu, 9 Dec 2010, Jarkko Nikula wrote:
> On Tue, 07 Dec 2010 23:18:28 -0700
> Paul Walmsley <paul@pwsan.com> wrote:
>
> > This series is available via git from git://git.pwsan.com/linux-2.6 in
> > the branch 'pwrdm_prcm_b_2.6.38'. It applies on top of the "OMAP:
> > PRCM/powerdomain/clockdomain patches for 2.6.38, part one" series,
> > sent earlier.
> >
> > Kevin and OMAP ASoC-hackers, I'd appreciate review and acks, if
> > appropriate, on the patches that touch code that you maintain. TI
> > OMAP4 PM people, I would appreciate any testing assistance that you
> > may be able to provide. Beno?t, I've tried to keep the kernel data
> > files and the output of the scripts relatively similar, but we might
> > need to do some tweaking of the scripts or data files to align them
> > in the way that makes the most sense.
> >
> Is there some patch missing? Part one compiles but this set does not.
Yes, mach-omap2/cminst44xx.h is missing from the posted series. It's been
added to the branch on the git server and posted here:
http://www.spinics.net/lists/arm-kernel/msg106850.html
Will repost the updated series after handling some of the other comments.
- Paul
^ permalink raw reply [flat|nested] 38+ messages in thread
* [PATCH 00/11] OMAP: PRCM/powerdomain/clockdomain patches for 2.6.38,part two
2010-12-08 6:18 [PATCH 00/11] OMAP: PRCM/powerdomain/clockdomain patches for 2.6.38, part two Paul Walmsley
` (11 preceding siblings ...)
2010-12-09 14:19 ` [PATCH 00/11] OMAP: PRCM/powerdomain/clockdomain patches for 2.6.38, part two Jarkko Nikula
@ 2010-12-14 14:40 ` Rajendra Nayak
2010-12-15 3:57 ` Paul Walmsley
2010-12-15 4:15 ` Santosh Shilimkar
13 siblings, 1 reply; 38+ messages in thread
From: Rajendra Nayak @ 2010-12-14 14:40 UTC (permalink / raw)
To: linux-arm-kernel
> -----Original Message-----
> From: Paul Walmsley [mailto:paul at pwsan.com]
> Sent: Wednesday, December 08, 2010 11:48 AM
> To: linux-omap at vger.kernel.org; linux-arm-kernel at lists.infradead.org
> Cc: Mark Brown; Beno?t Cousson; Kevin Hilman; Rajendra Nayak; Peter
Ujfalusi; Santosh Shilimkar; Jarkko Nikula; Liam
> Girdwood
> Subject: [PATCH 00/11] OMAP: PRCM/powerdomain/clockdomain patches for
2.6.38,part two
>
> This patch series, intended for 2.6.38:
>
> - adds OMAP4-specific PRM and CM instance functions, which are capable
> of writing to PRM/CM instances, no matter what PRCM partition they
> appear in;
>
> - renames the old OMAP2/3 PRM and CM functions to prefix them with
> 'omap2_';
>
> - adds OMAP4 clockdomain offset addressing to the OMAP4 clockdomain
> definitions;
>
> - removes the (now unused) OMAP clockdomain .clkstctrl_reg field;
>
> - moves plat-omap/include/plat/{clock,power}domain.h to mach-omap2/,
since
> these are OMAP2-specific;
>
> - moves the OMAP3 SCM padconf save code from pm34xx.c into the SCM
common
> code.
>
> This series is available via git from git://git.pwsan.com/linux-2.6 in
> the branch 'pwrdm_prcm_b_2.6.38'. It applies on top of the "OMAP:
> PRCM/powerdomain/clockdomain patches for 2.6.38, part one" series,
> sent earlier.
>
> Kevin and OMAP ASoC-hackers, I'd appreciate review and acks, if
> appropriate, on the patches that touch code that you maintain. TI
> OMAP4 PM people, I would appreciate any testing assistance that you
> may be able to provide. Beno?t, I've tried to keep the kernel data
> files and the output of the scripts relatively similar, but we might
> need to do some tweaking of the scripts or data files to align them
> in the way that makes the most sense.
>
> Boot-tested on N800, OMAP35xx Beagle, and OMAP4430ES2 Panda.
Boot tested on 2430/3430/4430SDP. Tested RET/OFF mode in suspend
on 3430SDP with minimal config (omap3_pm_defconfig).
>
>
> - Paul
>
> ---
>
> pwrdm_prcm_b_2.6.38
> text data bss dec hex filename
> 5709988 473952 5608800 11792740 b3f164 vmlinux.orig
> 5712868 474496 5608800 11796164 b3fec4 vmlinux.patched
>
> Paul Walmsley (11):
> OMAP4: PRCM: add OMAP4-specific accessor/mutator functions
> OMAP4: PRCM: move global reset function for OMAP4 to an
OMAP4-specific file
> OMAP2/3: PRM/CM: prefix OMAP2 PRM/CM functions with "omap2_"
> OMAP4: powerdomains: add PRCM partition data; use OMAP4 PRM
functions
> OMAP2+: clockdomains: split the clkdm hwsup enable/disable
function
> OMAP4: CM instances: add clockdomain register offsets
> OMAP4: clockdomains: add OMAP4 PRCM data and OMAP4 support
> OMAP2/3: clockdomain: remove unneeded .clkstctrl_reg, remove some
direct CM register accesses
> OMAP2+: clockdomain: move header file from plat-omap to mach-omap2
> OMAP2+: powerdomain: move header file from plat-omap to mach-omap2
> OMAP3: control/PM: move padconf save code to mach-omap2/control.c
>
>
> arch/arm/mach-omap2/Makefile | 4
> arch/arm/mach-omap2/clkt2xxx_apll.c | 10 -
> arch/arm/mach-omap2/clkt2xxx_dpllcore.c | 8
> arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c | 12 -
> arch/arm/mach-omap2/clock.c | 2
> arch/arm/mach-omap2/clockdomain.c | 209 ++++++-----
> arch/arm/mach-omap2/clockdomain.h | 33 +-
> arch/arm/mach-omap2/clockdomains2xxx_3xxx_data.c | 42 --
> arch/arm/mach-omap2/clockdomains44xx_data.c | 123 ++++--
> arch/arm/mach-omap2/cm-regbits-24xx.h | 5
> arch/arm/mach-omap2/cm-regbits-34xx.h | 11 +
> arch/arm/mach-omap2/cm1_44xx.h | 10 +
> arch/arm/mach-omap2/cm2_44xx.h | 25 +
> arch/arm/mach-omap2/cm2xxx_3xxx.c | 420
+++++++++++++---------
> arch/arm/mach-omap2/cm2xxx_3xxx.h | 19 +
> arch/arm/mach-omap2/cm44xx.c | 52 +++
> arch/arm/mach-omap2/cm4xxx.c | 62 ---
> arch/arm/mach-omap2/cminst44xx.c | 223 ++++++++++++
> arch/arm/mach-omap2/control.c | 72 +++-
> arch/arm/mach-omap2/control.h | 1
> arch/arm/mach-omap2/cpuidle34xx.c | 4
> arch/arm/mach-omap2/io.c | 4
> arch/arm/mach-omap2/omap_hwmod.c | 4
> arch/arm/mach-omap2/pm-debug.c | 12 -
> arch/arm/mach-omap2/pm.c | 4
> arch/arm/mach-omap2/pm.h | 2
> arch/arm/mach-omap2/pm24xx.c | 200 +++++-----
> arch/arm/mach-omap2/pm34xx.c | 162 ++++----
> arch/arm/mach-omap2/pm44xx.c | 2
> arch/arm/mach-omap2/powerdomain-common.c | 1
> arch/arm/mach-omap2/powerdomain.c | 14 +
> arch/arm/mach-omap2/powerdomain.h | 30 +-
> arch/arm/mach-omap2/powerdomain2xxx_3xxx.c | 68 ++--
> arch/arm/mach-omap2/powerdomain44xx.c | 122 ++++--
> arch/arm/mach-omap2/powerdomains.h | 30 --
> arch/arm/mach-omap2/powerdomains2xxx_3xxx_data.c | 4
> arch/arm/mach-omap2/powerdomains2xxx_3xxx_data.h | 2
> arch/arm/mach-omap2/powerdomains2xxx_data.c | 3
> arch/arm/mach-omap2/powerdomains3xxx_data.c | 3
> arch/arm/mach-omap2/powerdomains44xx_data.c | 20 +
> arch/arm/mach-omap2/prcm.c | 51 +--
> arch/arm/mach-omap2/prcm44xx.h | 42 ++
> arch/arm/mach-omap2/prcm_mpu44xx.c | 45 ++
> arch/arm/mach-omap2/prcm_mpu44xx.h | 13 +
> arch/arm/mach-omap2/prm2xxx_3xxx.c | 34 +-
> arch/arm/mach-omap2/prm2xxx_3xxx.h | 12 -
> arch/arm/mach-omap2/prm44xx.c | 79 ++++
> arch/arm/mach-omap2/prm44xx.h | 23 +
> arch/arm/mach-omap2/prminst44xx.c | 74 ++++
> arch/arm/mach-omap2/prminst44xx.h | 25 +
> arch/arm/mach-omap2/sdrc2xxx.c | 4
> arch/arm/mach-omap2/serial.c | 1
> arch/arm/plat-omap/gpio.c | 5
> arch/arm/plat-omap/include/plat/gpio.h | 2
> arch/arm/plat-omap/include/plat/omap-pm.h | 2
> arch/arm/plat-omap/include/plat/prcm.h | 10 -
> arch/arm/plat-omap/mcbsp.c | 8
> arch/arm/plat-omap/omap-pm-noop.c | 2
> 58 files changed, 1597 insertions(+), 869 deletions(-)
> rename arch/arm/{plat-omap/include/plat/clockdomain.h =>
mach-omap2/clockdomain.h} (86%)
> create mode 100644 arch/arm/mach-omap2/cm44xx.c
> delete mode 100644 arch/arm/mach-omap2/cm4xxx.c
> create mode 100644 arch/arm/mach-omap2/cminst44xx.c
> rename arch/arm/{plat-omap/include/plat/powerdomain.h =>
mach-omap2/powerdomain.h} (90%)
> delete mode 100644 arch/arm/mach-omap2/powerdomains.h
> create mode 100644 arch/arm/mach-omap2/prcm44xx.h
> create mode 100644 arch/arm/mach-omap2/prcm_mpu44xx.c
> create mode 100644 arch/arm/mach-omap2/prminst44xx.c
> create mode 100644 arch/arm/mach-omap2/prminst44xx.h
^ permalink raw reply [flat|nested] 38+ messages in thread* [PATCH 00/11] OMAP: PRCM/powerdomain/clockdomain patches for 2.6.38,part two
2010-12-14 14:40 ` [PATCH 00/11] OMAP: PRCM/powerdomain/clockdomain patches for 2.6.38,part two Rajendra Nayak
@ 2010-12-15 3:57 ` Paul Walmsley
2010-12-15 11:14 ` Rajendra Nayak
0 siblings, 1 reply; 38+ messages in thread
From: Paul Walmsley @ 2010-12-15 3:57 UTC (permalink / raw)
To: linux-arm-kernel
On Tue, 14 Dec 2010, Rajendra Nayak wrote:
> Boot tested on 2430/3430/4430SDP. Tested RET/OFF mode in suspend
> on 3430SDP with minimal config (omap3_pm_defconfig).
Thanks for testing this. Would you like me to add Tested-by:'s ?
Also, I still plan to make that change that you proposed to cause the
prminst, cminst functions to read/write directly to the registers...
soon...
- Paul
^ permalink raw reply [flat|nested] 38+ messages in thread
* [PATCH 00/11] OMAP: PRCM/powerdomain/clockdomain patches for 2.6.38,part two
2010-12-15 3:57 ` Paul Walmsley
@ 2010-12-15 11:14 ` Rajendra Nayak
0 siblings, 0 replies; 38+ messages in thread
From: Rajendra Nayak @ 2010-12-15 11:14 UTC (permalink / raw)
To: linux-arm-kernel
> -----Original Message-----
> From: Paul Walmsley [mailto:paul at pwsan.com]
> Sent: Wednesday, December 15, 2010 9:28 AM
> To: Rajendra Nayak
> Cc: linux-omap at vger.kernel.org; linux-arm-kernel at lists.infradead.org;
Mark Brown; Benoit Cousson; Kevin Hilman;
> Peter Ujfalusi; Santosh Shilimkar; Jarkko Nikula; Liam Girdwood
> Subject: RE: [PATCH 00/11] OMAP: PRCM/powerdomain/clockdomain patches
for 2.6.38,part two
>
> On Tue, 14 Dec 2010, Rajendra Nayak wrote:
>
> > Boot tested on 2430/3430/4430SDP. Tested RET/OFF mode in suspend
> > on 3430SDP with minimal config (omap3_pm_defconfig).
>
> Thanks for testing this. Would you like me to add Tested-by:'s ?
Sure,
Tested-by: Rajendra Nayak <rnayak@ti.com>
>
> Also, I still plan to make that change that you proposed to cause the
> prminst, cminst functions to read/write directly to the registers...
> soon...
Thanks, already had a look.
>
>
> - Paul
^ permalink raw reply [flat|nested] 38+ messages in thread
* [PATCH 00/11] OMAP: PRCM/powerdomain/clockdomain patches for 2.6.38,part two
2010-12-08 6:18 [PATCH 00/11] OMAP: PRCM/powerdomain/clockdomain patches for 2.6.38, part two Paul Walmsley
` (12 preceding siblings ...)
2010-12-14 14:40 ` [PATCH 00/11] OMAP: PRCM/powerdomain/clockdomain patches for 2.6.38,part two Rajendra Nayak
@ 2010-12-15 4:15 ` Santosh Shilimkar
2010-12-15 4:27 ` Paul Walmsley
13 siblings, 1 reply; 38+ messages in thread
From: Santosh Shilimkar @ 2010-12-15 4:15 UTC (permalink / raw)
To: linux-arm-kernel
Paul,
> -----Original Message-----
> From: Paul Walmsley [mailto:paul at pwsan.com]
> Sent: Wednesday, December 08, 2010 11:48 AM
> To: linux-omap at vger.kernel.org; linux-arm-kernel at lists.infradead.org
> Cc: Mark Brown; Beno?t Cousson; Kevin Hilman; Rajendra Nayak; Peter
> Ujfalusi; Santosh Shilimkar; Jarkko Nikula; Liam Girdwood
> Subject: [PATCH 00/11] OMAP: PRCM/powerdomain/clockdomain patches for
> 2.6.38,part two
>
> This patch series, intended for 2.6.38:
>
> - adds OMAP4-specific PRM and CM instance functions, which are capable
> of writing to PRM/CM instances, no matter what PRCM partition they
> appear in;
>
> - renames the old OMAP2/3 PRM and CM functions to prefix them with
> 'omap2_';
>
> - adds OMAP4 clockdomain offset addressing to the OMAP4 clockdomain
> definitions;
>
> - removes the (now unused) OMAP clockdomain .clkstctrl_reg field;
>
> - moves plat-omap/include/plat/{clock,power}domain.h to mach-omap2/,
since
> these are OMAP2-specific;
>
> - moves the OMAP3 SCM padconf save code from pm34xx.c into the SCM
common
> code.
>
> This series is available via git from git://git.pwsan.com/linux-2.6 in
> the branch 'pwrdm_prcm_b_2.6.38'. It applies on top of the "OMAP:
> PRCM/powerdomain/clockdomain patches for 2.6.38, part one" series,
> sent earlier.
>
> Kevin and OMAP ASoC-hackers, I'd appreciate review and acks, if
> appropriate, on the patches that touch code that you maintain. TI
> OMAP4 PM people, I would appreciate any testing assistance that you
> may be able to provide. Beno?t, I've tried to keep the kernel data
> files and the output of the scripts relatively similar, but we might
> need to do some tweaking of the scripts or data files to align them
> in the way that makes the most sense.
>
> Boot-tested on N800, OMAP35xx Beagle, and OMAP4430ES2 Panda.
>
>
Have tested both part1 and part2 of your series on OMAP4 and OMAP3 SDPs.
OFF mode works on OMAP3 SPD with this series.
Was planning to do some more testing with some porting of OMAP4 PM
but it's taking bit more time.
Regards,
Santosh
^ permalink raw reply [flat|nested] 38+ messages in thread* [PATCH 00/11] OMAP: PRCM/powerdomain/clockdomain patches for 2.6.38,part two
2010-12-15 4:15 ` Santosh Shilimkar
@ 2010-12-15 4:27 ` Paul Walmsley
2010-12-15 6:15 ` Santosh Shilimkar
0 siblings, 1 reply; 38+ messages in thread
From: Paul Walmsley @ 2010-12-15 4:27 UTC (permalink / raw)
To: linux-arm-kernel
Hi Santosh
On Wed, 15 Dec 2010, Santosh Shilimkar wrote:
> Have tested both part1 and part2 of your series on OMAP4 and OMAP3 SDPs.
> OFF mode works on OMAP3 SPD with this series.
> Was planning to do some more testing with some porting of OMAP4 PM
> but it's taking bit more time.
thanks for the testing, would you like me to add Tested-by:'s ?
- Paul
^ permalink raw reply [flat|nested] 38+ messages in thread
* [PATCH 00/11] OMAP: PRCM/powerdomain/clockdomain patches for 2.6.38,part two
2010-12-15 4:27 ` Paul Walmsley
@ 2010-12-15 6:15 ` Santosh Shilimkar
0 siblings, 0 replies; 38+ messages in thread
From: Santosh Shilimkar @ 2010-12-15 6:15 UTC (permalink / raw)
To: linux-arm-kernel
> -----Original Message-----
> From: Paul Walmsley [mailto:paul at pwsan.com]
> Sent: Wednesday, December 15, 2010 9:57 AM
> To: Santosh Shilimkar
> Cc: linux-omap at vger.kernel.org; linux-arm-kernel at lists.infradead.org;
Mark
> Brown; Benoit Cousson; Kevin Hilman; Rajendra Nayak; Peter Ujfalusi;
> Jarkko Nikula; Liam Girdwood
> Subject: RE: [PATCH 00/11] OMAP: PRCM/powerdomain/clockdomain patches
for
> 2.6.38,part two
>
> Hi Santosh
>
> On Wed, 15 Dec 2010, Santosh Shilimkar wrote:
>
> > Have tested both part1 and part2 of your series on OMAP4 and OMAP3
SDPs.
> > OFF mode works on OMAP3 SPD with this series.
> > Was planning to do some more testing with some porting of OMAP4 PM
> > but it's taking bit more time.
>
> thanks for the testing, would you like me to add Tested-by:'s ?
>
Sure.
Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
^ permalink raw reply [flat|nested] 38+ messages in thread