From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 41829C4332F for ; Tue, 14 Nov 2023 16:56:07 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:Content-Type: Content-Transfer-Encoding:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:In-Reply-To:From:References:Cc:To:Subject: MIME-Version:Date:Message-ID:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=xKGB4Wzz+bJY/OjfZ6y7Snzl2E8UbnEmunr2HnF3V8o=; b=YJG19D61P/UNFD DT75u7ksC5jwBxZjn3P/fMOdCf539dwGXwE8alXz5TKE4L7txtQBHxqFK45B9TuCpfQmAIE0rre0D BEejbjRyc7CVLkVhXTc/ZkM9/FcaygKzbss3NS/tIRjHb6E6LRjjNpM00T/UGK8RWq1lJz2uAflTq LQoZZNkY7lL+wQaorkDuEhRfdKmWtGKZb5d3Oh36OMldQa1XJ/FzYyiyypkKvqj0lnrEi6ofA1LiN Ch3MvJqg1TFGz5fREqtTpx7QVchOYgj67NJFUgk1vjJY3bO3rZ9+ng4THC9WlsJDZlAbtTkFe08uf D3UQ3sSx731gXU/7+aYg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1r2whQ-00GSk3-2E; Tue, 14 Nov 2023 16:55:40 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1r2whM-00GSjL-1E for linux-arm-kernel@lists.infradead.org; Tue, 14 Nov 2023 16:55:38 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id E9EE7C15; Tue, 14 Nov 2023 08:56:18 -0800 (PST) Received: from [10.1.196.40] (e121345-lin.cambridge.arm.com [10.1.196.40]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 22B3C3F641; Tue, 14 Nov 2023 08:55:32 -0800 (PST) Message-ID: <372885ab-b24d-44ae-afb8-76755bcd6e21@arm.com> Date: Tue, 14 Nov 2023 16:55:30 +0000 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 1/3] iommu/arm-smmu: introduction of ACTLR for custom prefetcher settings Content-Language: en-GB To: Bibek Kumar Patro , will@kernel.org, joro@8bytes.org, dmitry.baryshkov@linaro.org, a39.skl@gmail.com, konrad.dybcio@linaro.org, quic_pkondeti@quicinc.com, quic_molvera@quicinc.com Cc: linux-arm-msm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, iommu@lists.linux.dev, linux-kernel@vger.kernel.org, qipl.kernel.upstream@quicinc.com References: <20231114135654.30475-1-quic_bibekkum@quicinc.com> <20231114135654.30475-2-quic_bibekkum@quicinc.com> From: Robin Murphy In-Reply-To: <20231114135654.30475-2-quic_bibekkum@quicinc.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20231114_085536_515286_522DDD17 X-CRM114-Status: GOOD ( 31.15 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="us-ascii"; Format="flowed" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 14/11/2023 1:56 pm, Bibek Kumar Patro wrote: > Currently in Qualcomm SoCs the default prefetch is set to 1 which allows > the TLB to fetch just the next page table. MMU-500 features ACTLR > register which is implementation defined and is used for Qualcomm SoCs > to have a prefetch setting of 1/3/7/15 enabling TLB to prefetch > the next set of page tables accordingly allowing for faster translations. > > ACTLR value is unique for each SMR (Stream matching register) and stored > in a pre-populated table. This value is set to the register during > context bank initialisation. > > Signed-off-by: Bibek Kumar Patro > --- > drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c | 41 ++++++++++++++++++++++ > drivers/iommu/arm/arm-smmu/arm-smmu-qcom.h | 2 ++ > drivers/iommu/arm/arm-smmu/arm-smmu.c | 5 +-- > drivers/iommu/arm/arm-smmu/arm-smmu.h | 5 +++ > 4 files changed, 51 insertions(+), 2 deletions(-) > > diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c b/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c > index 549ae4dba3a6..578c662c7c30 100644 > --- a/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c > +++ b/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c > @@ -14,6 +14,17 @@ > > #define QCOM_DUMMY_VAL -1 > > +struct actlr_config { > + const struct actlr_data *adata; > + size_t size; > +}; > + > +struct actlr_data { > + u16 sid; > + u16 mask; Do we need to worry about masks? If you're already assuming that any SMR will be programmed to match a superset of the data here, surely a single unique ID per device would suffice? > + u32 actlr; > +}; > + > static struct qcom_smmu *to_qcom_smmu(struct arm_smmu_device *smmu) > { > return container_of(smmu, struct qcom_smmu, smmu); > @@ -261,9 +272,36 @@ static const struct of_device_id qcom_smmu_client_of_match[] __maybe_unused = { > { } > }; > > +static void arm_smmu_set_actlr(struct arm_smmu_device *smmu, int idx, > + const struct actlr_config *actlrcfg) > +{ > + struct arm_smmu_smr *smr = smmu->smrs; > + int i; > + u16 id; > + u16 mask; > + > + for (i = 0; i < actlrcfg->size; ++i) { > + id = actlrcfg->adata[i].sid; > + mask = actlrcfg->adata[i].mask; > + if (!smr_is_subset(*smr, id, mask)) How well have you tested this? ;) > + arm_smmu_cb_write(smmu, idx, ARM_SMMU_CB_ACTLR, > + actlrcfg->adata[i].actlr); > + } > +} > + > static int qcom_smmu_init_context(struct arm_smmu_domain *smmu_domain, > struct io_pgtable_cfg *pgtbl_cfg, struct device *dev) > { > + struct arm_smmu_device *smmu = smmu_domain->smmu; > + struct qcom_smmu *qsmmu = to_qcom_smmu(smmu); > + const struct actlr_config *actlrcfg; > + int idx = smmu_domain->cfg.cbndx; > + > + if (qsmmu->actlrcfg) { > + actlrcfg = qsmmu->actlrcfg; > + arm_smmu_set_actlr(smmu, idx, actlrcfg); > + } > + > smmu_domain->cfg.flush_walk_prefer_tlbiasid = true; > > return 0; > @@ -467,6 +505,9 @@ static struct arm_smmu_device *qcom_smmu_create(struct arm_smmu_device *smmu, > qsmmu->smmu.impl = impl; > qsmmu->cfg = data->cfg; > > + if (data->actlrcfg && (data->actlrcfg->size)) > + qsmmu->actlrcfg = data->actlrcfg; Do we really need to replicate multiple parts of the data, or would it be sensible to just replace qsmmu->cfg with qsmmu->data and handle the further dereferences in the places that want them? > + > return &qsmmu->smmu; > } > > diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.h b/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.h > index 593910567b88..4b6862715070 100644 > --- a/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.h > +++ b/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.h > @@ -9,6 +9,7 @@ > struct qcom_smmu { > struct arm_smmu_device smmu; > const struct qcom_smmu_config *cfg; > + const struct actlr_config *actlrcfg; > bool bypass_quirk; > u8 bypass_cbndx; > u32 stall_enabled; > @@ -25,6 +26,7 @@ struct qcom_smmu_config { > }; > > struct qcom_smmu_match_data { > + const struct actlr_config *actlrcfg; > const struct qcom_smmu_config *cfg; > const struct arm_smmu_impl *impl; > const struct arm_smmu_impl *adreno_impl; > diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu.c b/drivers/iommu/arm/arm-smmu/arm-smmu.c > index d6d1a2a55cc0..8e4faf015286 100644 > --- a/drivers/iommu/arm/arm-smmu/arm-smmu.c > +++ b/drivers/iommu/arm/arm-smmu/arm-smmu.c > @@ -990,9 +990,10 @@ static int arm_smmu_find_sme(struct arm_smmu_device *smmu, u16 id, u16 mask) > * expect simply identical entries for this case, but there's > * no harm in accommodating the generalisation. > */ > - if ((mask & smrs[i].mask) == mask && > - !((id ^ smrs[i].id) & ~smrs[i].mask)) > + > + if (smr_is_subset(smrs[i], id, mask)) > return i; > + > /* > * If the new entry has any other overlap with an existing one, > * though, then there always exists at least one stream ID > diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu.h b/drivers/iommu/arm/arm-smmu/arm-smmu.h > index 703fd5817ec1..b1638bbc41d4 100644 > --- a/drivers/iommu/arm/arm-smmu/arm-smmu.h > +++ b/drivers/iommu/arm/arm-smmu/arm-smmu.h > @@ -501,6 +501,11 @@ static inline void arm_smmu_writeq(struct arm_smmu_device *smmu, int page, > writeq_relaxed(val, arm_smmu_page(smmu, page) + offset); > } > > +static inline bool smr_is_subset(struct arm_smmu_smr smrs, u16 id, u16 mask) Hmm, that name reads as implying the opposite of what it actually tests, not to mention that passing structs by value is a bit horrid as well :( Thanks, Robin. > +{ > + return (mask & smrs.mask) == mask && !((id ^ smrs.id) & ~smrs.mask); > +} > + > #define ARM_SMMU_GR0 0 > #define ARM_SMMU_GR1 1 > #define ARM_SMMU_CB(s, n) ((s)->numpage + (n)) > -- > 2.17.1 > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel