RE: [PATCH 0/9] drm/bridge: imx: Add i.MX93 MIPI DSI support

Ying Liu
2023-07-19T04:56:38Z

On Tuesday, July 18, 2023 3:40 PM Alexander Stein <alexander.stein@ew.tq-group.com> wrote:
>
> Hi,

Hi,

>
> Am Montag, 17. Juli 2023, 08:18:22 CEST schrieb Liu Ying:
> > Hi,
> >
> > This series aims to add MIPI DSI support for Freescale i.MX93 SoC.
> >
> > There is a Synopsys DesignWare MIPI DSI host controller and a Synopsys
> > Designware MIPI DPHY embedded in i.MX93. Some configurations and
> > extensions to them are controlled by i.MX93 media blk-ctrl.
> >
> > Add a DRM bridge for i.MX93 MIPI DSI by using existing DW MIPI DSI
> > bridge helpers and implementing i.MX93 MIPI DSI specific extensions.
> >
> > Note that since this series touches the dw-mipi-dsi driver, tests are
> > needed to be done for meson, rockchip and stm.
> >
> > Patch 1 ~ 7 do preparation work for adding i.MX93 MIPI DSI DRM bridge
> > driver.
> >
> > Patch 8 adds DT-binding documentation for i.MX93 MIPI DSI.
> >
> > Patch 9 adds i.MX93 MIPI DSI DRM bridge.
> >
> > Liu Ying (9):
> > drm/bridge: synopsys: dw-mipi-dsi: Add dw_mipi_dsi_get_bridge() helper
> > drm/bridge: synopsys: dw-mipi-dsi: Add input bus format negotiation
> > support
> > drm/bridge: synopsys: dw-mipi-dsi: Force input bus flags
> > drm/bridge: synopsys: dw-mipi-dsi: Add mode fixup support
> > drm/bridge: synopsys: dw-mipi-dsi: Use pixel clock rate to calculate
> > lbcc
> > drm/bridge: synopsys: dw-mipi-dsi: Set minimum lane byte clock cycles
> > for HSA and HBP
> > drm/bridge: synopsys: dw-mipi-dsi: Disable HSTX and LPRX timeout check
> > dt-bindings: display: bridge: Document Freescale i.MX93 MIPI DSI
> > drm/bridge: imx: Add i.MX93 MIPI DSI support
> >
> > .../display/bridge/fsl,imx93-mipi-dsi.yaml | 115 +++
> > drivers/gpu/drm/bridge/imx/Kconfig | 10 +
> > drivers/gpu/drm/bridge/imx/Makefile | 1 +
> > drivers/gpu/drm/bridge/imx/imx93-mipi-dsi.c | 934
> ++++++++++++++++++
> > drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c | 91 +-
> > include/drm/bridge/dw_mipi_dsi.h | 16 +
> > 6 files changed, 1163 insertions(+), 4 deletions(-)
> > create mode 100644
> > Documentation/devicetree/bindings/display/bridge/fsl,imx93-mipi-
> dsi.yaml
> > create mode 100644 drivers/gpu/drm/bridge/imx/imx93-mipi-dsi.c
>
> Thanks for posting this patch series. I was trying to use this driver on our
> TQMa93xxLA platform where the DSI signals are connected to a TC9595
> (driver
> tc358767) DSI-to-DP bridge.

Thanks for trying to test/use this driver.

I don't have TC9595 bridge to test, unfortunately.

> Unfortunately this bridge requires the DSI signals to be in LP-11 upon reset
> and while in idle, otherwise not even DP AUX channel is functional.
> Apparently DSI is currently not in LP-11. But reading the RM I have no idea
> how to configure the DSI host to achieve that. Do you have additional
> information which might help me here?

Hmm, probably no.
But, I tested ADV7535 DSI to HDMI bridge or RM67191 DSI panel on
i.MX93 11x11 EVK with this series, which works.

> Also could you provide your DT configuration?

For media blk-ctrl, dsi and lcdif, see:
https://pastebin.mozilla.org/aP8tFrPM

For adv7535 display pipeline, see:
https://pastebin.mozilla.org/89zwvr9Y

Note assigned-clock-rates is needed in lcdif DT node to suggest video pll rate.

Regards,
Liu Ying

>
> Thanks and best regards,
> Alexander
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