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Thu, 20 Feb 2020 15:06:00 +0000 MIME-Version: 1.0 Date: Thu, 20 Feb 2020 15:06:00 +0000 From: Marc Zyngier To: minyard@acm.org Subject: Re: [PATCH v2] arm64:kgdb: Fix kernel single-stepping In-Reply-To: <20200220145048.GH3704@minyard.net> References: <20200219152403.3495-1-minyard@acm.org> <1416dca51b52dff349923184f41d48e8@kernel.org> <20200220145048.GH3704@minyard.net> Message-ID: <375815af3c711b94dd2ee56326c2dd3b@kernel.org> X-Sender: maz@kernel.org User-Agent: Roundcube Webmail/1.3.10 X-SA-Exim-Connect-IP: 51.254.78.96 X-SA-Exim-Rcpt-To: minyard@acm.org, will@kernel.org, catalin.marinas@arm.com, linux-arm-kernel@lists.infradead.org, cminyard@mvista.com, linux-kernel@vger.kernel.org, tcminyard@gmail.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200220_070603_107947_5FFEAC85 X-CRM114-Status: GOOD ( 12.08 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Corey Minyard , Catalin Marinas , linux-kernel@vger.kernel.org, Will Deacon , Corey Minyard , linux-arm-kernel@lists.infradead.org Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="us-ascii"; Format="flowed" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 2020-02-20 14:50, Corey Minyard wrote: > On Thu, Feb 20, 2020 at 02:21:36PM +0000, Marc Zyngier wrote: >> On 2020-02-19 15:24, minyard@acm.org wrote: >> > From: Corey Minyard >> >> [...] >> >> > After studying the EL0 handling for this, I realized an issue with using >> > MDSCR to check if single step is enabled: it can be expensive on a VM. >> > So check the task flag first to see if single step is enabled. Then >> > check MDSCR if the task flag is set. >> >> Very tangential remark: I'd really like people *not* to try and >> optimize >> Linux based on the behaviour of a hypervisor. In general, reading a >> system register is fast, and the fact that it traps on a given >> hypervisor >> at some point may not be true in the future, nor be a valid assumption >> across hypervisors. > > Normally I would agree, but I based this upon git commit > https://github.com/torvalds/linux/commit/2a2830703a2371b47f7b50b1d35cb15dc0e2b717 > which seemed to say that it was a significant enough factor to do in > the > EL0 case. And that's a blast from a distant past. Hypervisors have changed drastically over these 6 years, and I'm still sitting on a bunch of patches that *could* change the way MDSCR_EL1 is handled. M. -- Jazz is not dead. It just smells funny... _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel