Re: [linux-sunxi] [PATCH 04/16] ASoC: sun4i-i2s: Set sign extend sample

Samuel Holland
2020-07-10T05:46:21Z

On 7/4/20 6:38 AM, Clément Péron wrote:
> From: Marcus Cooper <codekipper@gmail.com>
>
> On the newer SoCs such as the H3 and A64 this is set by default
> to transfer a 0 after each sample in each slot. However the A10
> and A20 SoCs that this driver was developed on had a default
> setting where it padded the audio gain with zeros.
>
> This isn't a problem while we have only support for 16bit audio
> but with larger sample resolution rates in the pipeline then SEXT
> bits should be cleared so that they also pad at the LSB. Without
> this the audio gets distorted.
>
> Set sign extend sample for all the sunxi generations even if they
> are not affected. This will keep coherency and avoid relying on
> default.
>
> Signed-off-by: Marcus Cooper <codekipper@gmail.com>
> Signed-off-by: Clément Péron <peron.clem@gmail.com>
> ---
> sound/soc/sunxi/sun4i-i2s.c | 22 ++++++++++++++++++++++
> 1 file changed, 22 insertions(+)
>
> diff --git a/sound/soc/sunxi/sun4i-i2s.c b/sound/soc/sunxi/sun4i-i2s.c
> index 8bae97efea30..f78167e152ce 100644
> --- a/sound/soc/sunxi/sun4i-i2s.c
> +++ b/sound/soc/sunxi/sun4i-i2s.c
> @@ -48,6 +48,9 @@
> #define SUN4I_I2S_FMT0_FMT_I2S (0 << 0)
>
> #define SUN4I_I2S_FMT1_REG 0x08
> +#define SUN4I_I2S_FMT1_REG_SEXT_MASK BIT(8)
> +#define SUN4I_I2S_FMT1_REG_SEXT(sext) ((sext) << 8)
> +
> #define SUN4I_I2S_FIFO_TX_REG 0x0c
> #define SUN4I_I2S_FIFO_RX_REG 0x10
>
> @@ -105,6 +108,9 @@
> #define SUN8I_I2S_FMT0_BCLK_POLARITY_INVERTED (1 << 7)
> #define SUN8I_I2S_FMT0_BCLK_POLARITY_NORMAL (0 << 7)
>
> +#define SUN8I_I2S_FMT1_REG_SEXT_MASK GENMASK(5, 4)
> +#define SUN8I_I2S_FMT1_REG_SEXT(sext) ((sext) << 4)
> +
> #define SUN8I_I2S_INT_STA_REG 0x0c
> #define SUN8I_I2S_FIFO_TX_REG 0x20
>
> @@ -663,6 +669,12 @@ static int sun4i_i2s_set_soc_fmt(const struct sun4i_i2s *i2s,
> }
> regmap_update_bits(i2s->regmap, SUN4I_I2S_CTRL_REG,
> SUN4I_I2S_CTRL_MODE_MASK, val);
> +
> + /* Set sign extension to pad out LSB with 0 */
> + regmap_update_bits(i2s->regmap, SUN4I_I2S_FMT1_REG,
> + SUN4I_I2S_FMT1_REG_SEXT_MASK,
> + SUN4I_I2S_FMT1_REG_SEXT(0));
> +

This is just a note; I'm not suggesting a change here:

This does nothing, because SUN4I_I2S_FMT1_REG only affects PCM mode, which is
not implemented in the driver for the sun4i generation of hardware. PCM mode
requires setting bit 4 of SUN4I_I2S_CTRL_REG, and then configuring
SUN4I_I2S_FMT1_REG instead of SUN4I_I2S_FMT0_REG.

Regards,
Samuel