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[109.73.99.134]) by smtp.gmail.com with ESMTPSA id h18-20020a056512221200b00492f294f06bsm993545lfu.110.2022.09.01.02.42.16 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 01 Sep 2022 02:42:16 -0700 (PDT) Message-ID: <38910de5-89ad-e7a1-261f-18b51c8e7877@linaro.org> Date: Thu, 1 Sep 2022 12:42:15 +0300 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.13.0 Subject: Re: [PATCH 2/4] dt-bindings: arm: mediatek: Add new bindings of MediaTek frequency hopping Content-Language: en-US To: AngeloGioacchino Del Regno , Johnson Wang , robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, sboyd@kernel.org Cc: linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, Project_Global_Chrome_Upstream_Group@mediatek.com, Edward-JW Yang References: <20220831124850.7748-1-johnson.wang@mediatek.com> <20220831124850.7748-3-johnson.wang@mediatek.com> <1fae0c47-fff9-89e9-c849-536d167d741d@collabora.com> From: Krzysztof Kozlowski In-Reply-To: <1fae0c47-fff9-89e9-c849-536d167d741d@collabora.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220901_024219_711918_620F45BE X-CRM114-Status: GOOD ( 24.03 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 01/09/2022 11:04, AngeloGioacchino Del Regno wrote: > Il 31/08/22 15:19, Krzysztof Kozlowski ha scritto: >> On 31/08/2022 15:48, Johnson Wang wrote: >>> Add the new binding documentation for MediaTek frequency hopping >>> and spread spectrum clocking control. >>> >>> Co-developed-by: Edward-JW Yang >>> Signed-off-by: Edward-JW Yang >>> Signed-off-by: Johnson Wang >>> --- >>> .../bindings/arm/mediatek/mediatek,fhctl.yaml | 49 +++++++++++++++++++ >>> 1 file changed, 49 insertions(+) >>> create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,fhctl.yaml >>> >>> diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,fhctl.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,fhctl.yaml >>> new file mode 100644 >>> index 000000000000..c5d76410538b >>> --- /dev/null >>> +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,fhctl.yaml >>> @@ -0,0 +1,49 @@ >>> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) >>> +%YAML 1.2 >>> +--- >>> +$id: http://devicetree.org/schemas/arm/mediatek/mediatek,fhctl.yaml# >>> +$schema: http://devicetree.org/meta-schemas/core.yaml# >>> + >>> +title: MediaTek frequency hopping and spread spectrum clocking control >>> + >>> +maintainers: >>> + - Edward-JW Yang >>> + >>> +description: | >>> + Frequency hopping control (FHCTL) is a piece of hardware that control >>> + some PLLs to adopt "hopping" mechanism to adjust their frequency. >>> + Spread spectrum clocking (SSC) is another function provided by this hardware. >>> + >>> +properties: >>> + compatible: >>> + const: mediatek,fhctl >> >> You need SoC/device specific compatibles. Preferably only SoC specific, >> without generic fallback, unless you can guarantee (while representing >> MediaTek), that generic fallback will cover all of their SoCs? >> >>> + >>> + reg: >>> + maxItems: 1 >>> + >>> + mediatek,hopping-ssc-percents: >>> + description: | >>> + Determine the enablement of frequency hopping feature and the percentage >>> + of spread spectrum clocking for PLLs. >>> + $ref: /schemas/types.yaml#/definitions/uint32-matrix >>> + items: >>> + items: >>> + - description: PLL id that is expected to enable frequency hopping. >> >> So the clocks are indices from some specific, yet unnamed >> clock-controller? This feels hacky. You should rather take here clock >> phandles (1) or integrate it into specific clock controller (2). The >> reason is that either your device does something on top of existing >> clocks (option 1, thus it takes clock as inputs) or it modifies existing >> clocks (option 2, thus it is integral part of clock-controller). >> > > FHCTL is a MCU that handles (some, or all, depending on what's supported on the > SoC and what's needed by the board) PLL frequency setting, doing it in steps and > avoiding overshooting and other issues. > > We had a pretty big conversation about this a while ago and the indices instead > of phandles is actually my fault, that happened because I initially proposed your > option 2 but then for a number of reasons we went with this kind of solution. > > I know it's going to be a long read, but the entire conversation is on the list [1] > Sorry, but it's a hacky architecture where one device (which is a clock provider) and second device have no relationship in hardware description but both play with each other resources. That's simply not a proper hardware description, so again: 1. If this is separate device (as you indicated), then it needs expressing the dependencies and uses of other device resources. 2. If this is not a separate device, but integral part of clock controller, then it would be fine but then probably should be child of that device. Best regards, Krzysztof _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel