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Tue, 10 Nov 2026 07:34:34 -0800 (PST) Received: from [192.168.1.3] ([37.18.141.193]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-49835e20f91sm6187825f8f.27.2026.11.10.07.34.33 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 10 Nov 2026 07:34:34 -0800 (PST) Message-ID: <38e4f4dc-e2ea-4b7f-82d1-e7b298e88002@linaro.org> Date: Tue, 10 Nov 2026 15:34:33 +0000 X-Archived-By: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 18/23] coresight: trbe: Keep the perf handle in per-CPU data To: Leo Yan Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, coresight@lists.linaro.org, Suzuki K Poulose , Mike Leach , Alexander Shishkin , Anshuman Khandual , Tamas Petz , Tamas Zsoldos , Suyash Mahar , Amir Ayupov References: <20261016-trbe_enable_disable_irq_handle_refactor-v2-0-3f57cf3199b1@arm.com> <20261016-trbe_enable_disable_irq_handle_refactor-v2-18-3f57cf3199b1@arm.com> Content-Language: en-US From: James Clark In-Reply-To: <20261016-trbe_enable_disable_irq_handle_refactor-v2-18-3f57cf3199b1@arm.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20261110_073436_966580_EAA34123 X-CRM114-Status: GOOD ( 27.60 ) X-Spam-Score: -2.1 (--) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" X-Spam-Status: No, score=-17.4 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_SANE_1 autolearn=ham autolearn_force=no version=4.0.1 X-Spam-Checker-Version: SpamAssassin 4.0.1 (2024-03-26) on aws-us-west-2-korg-listserv-alma10-1 On 16/10/2026 17:55, Leo Yan wrote: > Arm SPE owns a per-CPU perf output handle for the PMU lifetime. TRBE > instead receives a handle from CoreSight when enabling its sink. > > Store that session handle in trbe_cpudata instead of a separate per-CPU > pointer array, and pass the CPU data as the per-CPU IRQ context. Use this > context directly for overflow and spurious interrupt handling so local > hardware control does not depend on the current AUX buffer configuration. > > Allocate the CPU data before registering the IRQ and free it after > releasing the IRQ, keeping the IRQ context valid throughout registration. > > Signed-off-by: Leo Yan > --- > drivers/hwtracing/coresight/coresight-trbe.c | 44 ++++++++++++---------------- > 1 file changed, 19 insertions(+), 25 deletions(-) > > diff --git a/drivers/hwtracing/coresight/coresight-trbe.c b/drivers/hwtracing/coresight/coresight-trbe.c > index 9a469c8009ce8a8a8b804c2b63a68e741f1dceaa..2328aab0a084a0ac123e950f846f404d120ec2c0 100644 > --- a/drivers/hwtracing/coresight/coresight-trbe.c > +++ b/drivers/hwtracing/coresight/coresight-trbe.c > @@ -139,6 +139,7 @@ struct trbe_save_state { > * @cpu - CPU this TRBE belongs to. > * @mode - Mode of current operation. (perf/disabled) > * @buf - Buffer configuration retained for the enabled session. > + * @handle - Perf output handle from successful enable until disable. > * @drvdata - TRBE specific drvdata > * @errata - Bit map for the errata on this TRBE. > */ > @@ -149,6 +150,7 @@ struct trbe_cpudata { > int cpu; > enum cs_mode mode; > struct trbe_buf *buf; > + struct perf_output_handle *handle; > struct trbe_drvdata *drvdata; > struct trbe_save_state save_state; > DECLARE_BITMAP(errata, TRBE_ERRATA_MAX); > @@ -156,7 +158,6 @@ struct trbe_cpudata { > > struct trbe_drvdata { > struct trbe_cpudata __percpu *cpudata; > - struct perf_output_handle * __percpu *handle; > struct hlist_node hotplug_node; > int irq; > cpumask_t supported_cpus; > @@ -1091,7 +1092,7 @@ static int arm_trbe_enable(struct coresight_device *csdev, enum cs_mode mode, > return ret; > } > > - *this_cpu_ptr(drvdata->handle) = handle; > + cpudata->handle = handle; > cpudata->buf = buf; > cpudata->mode = mode; > return 0; > @@ -1112,16 +1113,15 @@ static int arm_trbe_disable(struct coresight_device *csdev) > trbe_drain_and_disable_local(cpudata); > clr_trbe_status(); > > - *this_cpu_ptr(drvdata->handle) = NULL; > buf->cpudata = NULL; > + cpudata->handle = NULL; > cpudata->buf = NULL; > cpudata->mode = CS_MODE_DISABLED; > return 0; > } > > -static void trbe_handle_spurious(struct perf_output_handle *handle) > +static void trbe_handle_spurious(struct trbe_cpudata *cpudata) > { > - struct trbe_buf *buf = etm_perf_sink_config(handle); > u64 trblimitr = read_sysreg_s(SYS_TRBLIMITR_EL1); > > /* > @@ -1129,11 +1129,12 @@ static void trbe_handle_spurious(struct perf_output_handle *handle) > * back without modifying the buffer parameters to > * retain the trace collected so far. > */ > - set_trbe_enabled(buf->cpudata, trblimitr); > + set_trbe_enabled(cpudata, trblimitr); > } > > -static int trbe_handle_overflow(struct perf_output_handle *handle) > +static int trbe_handle_overflow(struct trbe_cpudata *cpudata) > { > + struct perf_output_handle *handle = cpudata->handle; > struct perf_event *event = handle->event; > struct trbe_buf *buf = etm_perf_sink_config(handle); > unsigned long size; > @@ -1203,9 +1204,8 @@ static u64 cpu_prohibit_trace(void) > > static irqreturn_t arm_trbe_irq_handler(int irq, void *dev) > { > - struct perf_output_handle **handle_ptr = dev; > - struct perf_output_handle *handle = *handle_ptr; > - struct trbe_buf *buf; > + struct trbe_cpudata *cpudata = dev; > + struct perf_output_handle *handle = cpudata->handle; > enum trbe_fault_action act; > u64 status; > bool truncated = false; > @@ -1232,18 +1232,17 @@ static irqreturn_t arm_trbe_irq_handler(int irq, void *dev) > * Ensure the trace is visible to the CPUs and > * any external aborts have been resolved. > */ > - buf = etm_perf_sink_config(handle); > - trbe_drain_and_disable_local(buf->cpudata); > + trbe_drain_and_disable_local(cpudata); > clr_trbe_irq(); > isb(); > > act = trbe_get_fault_act(handle, status); > switch (act) { > case TRBE_FAULT_ACT_WRAP: > - truncated = !!trbe_handle_overflow(handle); > + truncated = !!trbe_handle_overflow(cpudata); > break; > case TRBE_FAULT_ACT_SPURIOUS: > - trbe_handle_spurious(handle); > + trbe_handle_spurious(cpudata); > break; > case TRBE_FAULT_ACT_FATAL: > trbe_truncate_event(handle); > @@ -1507,10 +1506,6 @@ static int arm_trbe_probe_coresight(struct trbe_drvdata *drvdata) > { > int cpu; > > - drvdata->cpudata = alloc_percpu(typeof(*drvdata->cpudata)); > - if (!drvdata->cpudata) > - return -ENOMEM; > - > for_each_cpu(cpu, &drvdata->supported_cpus) { > /* If we fail to probe the CPU, let us defer it to hotplug callbacks */ > if (smp_call_function_single(cpu, arm_trbe_probe_cpu, drvdata, 1)) > @@ -1531,7 +1526,6 @@ static int arm_trbe_remove_coresight(struct trbe_drvdata *drvdata) > smp_call_function_single(cpu, arm_trbe_disable_cpu, drvdata, 1); > arm_trbe_remove_coresight_cpu(drvdata, cpu); > } > - free_percpu(drvdata->cpudata); > return 0; > } > > @@ -1618,14 +1612,14 @@ static int arm_trbe_probe_irq(struct platform_device *pdev, > > cpumask_copy(&drvdata->supported_cpus, affinity); > > - drvdata->handle = alloc_percpu(struct perf_output_handle *); > - if (!drvdata->handle) > + drvdata->cpudata = alloc_percpu(typeof(*drvdata->cpudata)); > + if (!drvdata->cpudata) > return -ENOMEM; > > ret = request_percpu_irq_affinity(drvdata->irq, arm_trbe_irq_handler, DRVNAME, > - affinity, drvdata->handle); > + affinity, drvdata->cpudata); > if (ret) { > - free_percpu(drvdata->handle); > + free_percpu(drvdata->cpudata); > return ret; > } > return 0; > @@ -1633,8 +1627,8 @@ static int arm_trbe_probe_irq(struct platform_device *pdev, > > static void arm_trbe_remove_irq(struct trbe_drvdata *drvdata) > { > - free_percpu_irq(drvdata->irq, drvdata->handle); > - free_percpu(drvdata->handle); > + free_percpu_irq(drvdata->irq, drvdata->cpudata); > + free_percpu(drvdata->cpudata); > } > > static int arm_trbe_device_probe(struct platform_device *pdev) > Reviewed-by: James Clark