From: arnd@arndb.de (Arnd Bergmann)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2] irqchip: irq-mvebu-odmi: new driver for platform MSI on Marvell 7K/8K
Date: Thu, 18 Feb 2016 17:08:05 +0100 [thread overview]
Message-ID: <3923904.c50oLNXXZ1@wuerfel> (raw)
In-Reply-To: <1455811134-3679-1-git-send-email-thomas.petazzoni@free-electrons.com>
On Thursday 18 February 2016 16:58:54 Thomas Petazzoni wrote:
> +- marvell,spi-base : List of GIC base SPI interrupts, one for each
> + ODMI frame. Those SPI interrupts are 0-based,
> + i.e marvell,spi-base = <128> will use SPI #96.
> + See Documentation/devicetree/bindings/interrupt-controller/arm,gic.txt
> + for details about the GIC Device Tree binding.
>
Why are these not just in an 'interrupts' property as we do for other
nested irqchips?
Arnd
next prev parent reply other threads:[~2016-02-18 16:08 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-02-18 15:58 [PATCH v2] irqchip: irq-mvebu-odmi: new driver for platform MSI on Marvell 7K/8K Thomas Petazzoni
2016-02-18 16:08 ` Arnd Bergmann [this message]
2016-02-18 16:16 ` Thomas Petazzoni
2016-02-18 16:27 ` Arnd Bergmann
2016-02-18 16:41 ` Marc Zyngier
2016-02-19 9:35 ` Thomas Petazzoni
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