From: marek.vasut@gmail.com (Marek Vasut)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v3 5/5] mtd: spi-nor: cadence-quadspi: Add runtime PM support
Date: Sun, 24 Sep 2017 14:01:03 +0200 [thread overview]
Message-ID: <3a1160f9-a0ae-c84c-d209-af97c3c3b0f6@gmail.com> (raw)
In-Reply-To: <20170924105924.23923-6-vigneshr@ti.com>
On 09/24/2017 12:59 PM, Vignesh R wrote:
> Add pm_runtime* calls to cadence-quadspi driver. This is required to
> switch on QSPI power domain on TI 66AK2G SoC during probe.
>
> Signed-off-by: Vignesh R <vigneshr@ti.com>
Are you planning to add some more fine-grained PM control later?
> ---
> drivers/mtd/spi-nor/cadence-quadspi.c | 11 +++++++++++
> 1 file changed, 11 insertions(+)
>
> diff --git a/drivers/mtd/spi-nor/cadence-quadspi.c b/drivers/mtd/spi-nor/cadence-quadspi.c
> index d9629e8f4798..2c8e6226d267 100644
> --- a/drivers/mtd/spi-nor/cadence-quadspi.c
> +++ b/drivers/mtd/spi-nor/cadence-quadspi.c
> @@ -31,6 +31,7 @@
> #include <linux/of_device.h>
> #include <linux/of.h>
> #include <linux/platform_device.h>
> +#include <linux/pm_runtime.h>
> #include <linux/sched.h>
> #include <linux/spi/spi.h>
> #include <linux/timer.h>
> @@ -1224,6 +1225,13 @@ static int cqspi_probe(struct platform_device *pdev)
> return -ENXIO;
> }
>
> + pm_runtime_enable(&pdev->dev);
> + ret = pm_runtime_get_sync(&pdev->dev);
> + if (ret < 0) {
> + pm_runtime_put_noidle(&pdev->dev);
> + return ret;
> + }
> +
> ret = clk_prepare_enable(cqspi->clk);
> if (ret) {
> dev_err(dev, "Cannot enable QSPI clock.\n");
> @@ -1275,6 +1283,9 @@ static int cqspi_remove(struct platform_device *pdev)
>
> clk_disable_unprepare(cqspi->clk);
>
> + pm_runtime_put_sync(&pdev->dev);
> + pm_runtime_disable(&pdev->dev);
> +
> return 0;
> }
>
>
--
Best regards,
Marek Vasut
next prev parent reply other threads:[~2017-09-24 12:01 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-09-24 10:59 [PATCH v3 0/5] K2G: Add QSPI support Vignesh R
2017-09-24 10:59 ` [PATCH v3 1/5] mtd: spi-nor: cadence-quadspi: Add TI 66AK2G SoC specific compatible Vignesh R
2017-09-24 10:59 ` [PATCH v3 2/5] mtd: spi-nor: cadence-quadspi: add a delay in write sequence Vignesh R
2017-09-24 11:59 ` Marek Vasut
2017-09-24 12:33 ` Vignesh R
2017-09-24 13:13 ` Marek Vasut
2017-10-02 12:46 ` Vignesh R
2017-09-24 10:59 ` [PATCH v3 3/5] mtd: spi-nor: cadence-quadspi: Add new binding to enable loop-back circuit Vignesh R
2017-09-24 10:59 ` [PATCH v3 4/5] mtd: spi-nor: cadence-quadspi: Add support to enable loop-back clock circuit Vignesh R
2017-09-24 10:59 ` [PATCH v3 5/5] mtd: spi-nor: cadence-quadspi: Add runtime PM support Vignesh R
2017-09-24 12:01 ` Marek Vasut [this message]
2017-09-24 13:08 ` Vignesh R
2017-09-24 13:12 ` Marek Vasut
2017-09-24 13:27 ` Vignesh R
2017-09-24 13:51 ` Marek Vasut
2017-09-25 22:41 ` matthew.gerlach at linux.intel.com
2017-09-25 23:49 ` Marek Vasut
2017-09-27 10:48 ` Vignesh R
2017-09-28 15:01 ` matthew.gerlach at linux.intel.com
2017-10-02 12:28 ` Vignesh R
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