From: Thomas Richard <thomas.richard@bootlin.com>
To: "Kumar, Udit" <u-kumar1@ti.com>, Nishanth Menon <nm@ti.com>,
Vignesh Raghavendra <vigneshr@ti.com>,
Tero Kristo <kristo@kernel.org>, Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>
Cc: Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, gregory.clement@bootlin.com,
richard.genoud@bootlin.com, a-kumar2@ti.com
Subject: Re: [PATCH] arm64: dts: ti: k3-j721s2-som-p0: add bootph-pre-ram property to pmic@4c
Date: Tue, 28 Apr 2026 14:06:02 +0200 [thread overview]
Message-ID: <3a78ff9c-e70e-47c2-b356-2bf9d75bc372@bootlin.com> (raw)
In-Reply-To: <6aa8fd45-ec3d-4bd7-9b13-6c00e4fd4efc@ti.com>
On 4/28/26 12:15 PM, Kumar, Udit wrote:
>
>
> On 4/28/2026 2:23 PM, Thomas Richard (TI) wrote:
>> On j721s2, pmic@4c is needed to exit the DDR from retention after
>
> pmic@4c to PMIC-A to align with schematic, please
You mean PMIC-B.
Best Regards,
Thomas
next prev parent reply other threads:[~2026-04-28 12:06 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-04-28 8:53 [PATCH] arm64: dts: ti: k3-j721s2-som-p0: add bootph-pre-ram property to pmic@4c Thomas Richard (TI)
2026-04-28 10:15 ` Kumar, Udit
2026-04-28 12:06 ` Thomas Richard [this message]
2026-04-28 12:57 ` Kumar, Udit
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