From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id EAC7DC02198 for ; Tue, 18 Feb 2025 12:13:02 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: Content-Type:In-Reply-To:From:References:CC:To:Subject:MIME-Version:Date: Message-ID:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=QmDB2s0hgiezmOzzPHSZXy+cZE0dzTWlpWB06SQm1SU=; b=pWV762YxcdUQJkoTqjlDE25E4T Dkl5txF/8x1TyMpQQln8zEzugoyoC4E6b/Z4iVcECGL8KP9dqOks3Unp/pd/J2fnTq21PRILvt9lS OqsdldggNqCrDMgpXC6DuMNpA/UOS8Xf62xiJEY0aIp+b1yUjQ3d9Q/lqx1OxKOxuOarTCfuf++Pg ZUo4/7uaYxxjAq4xEwdnmYJDXsehblHi3D48sbWm5We+zajsvmGOshL/e4FVHmHKneHo9Olybw41+ m1ts4TEdJ6rtD+IJIfFQDQt7KJ1pzSnpeIPPkv1qW68jpVellhn/yE5oEd7MUkUbgTcFrE5Pcf7PJ izSJomqg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1tkMT6-0000000867A-0ltq; Tue, 18 Feb 2025 12:12:52 +0000 Received: from szxga03-in.huawei.com ([45.249.212.189]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1tkM8F-000000081yD-2bzo for linux-arm-kernel@lists.infradead.org; Tue, 18 Feb 2025 11:51:21 +0000 Received: from mail.maildlp.com (unknown [172.19.163.174]) by szxga03-in.huawei.com (SkyGuard) with ESMTP id 4YxyT969VDzTjWs; Tue, 18 Feb 2025 19:48:13 +0800 (CST) Received: from kwepemk500005.china.huawei.com (unknown [7.202.194.90]) by mail.maildlp.com (Postfix) with ESMTPS id 6C7E4140361; Tue, 18 Feb 2025 19:51:13 +0800 (CST) Received: from [10.174.179.234] (10.174.179.234) by kwepemk500005.china.huawei.com (7.202.194.90) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.11; Tue, 18 Feb 2025 19:51:11 +0800 Message-ID: <3b181285-2ff3-b77a-867b-725f38ea86d3@huawei.com> Date: Tue, 18 Feb 2025 19:51:10 +0800 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:91.0) Gecko/20100101 Thunderbird/91.8.0 Subject: Re: [PATCH v13 4/5] arm64: support copy_mc_[user]_highpage() To: Catalin Marinas CC: Mark Rutland , Jonathan Cameron , Mauro Carvalho Chehab , Will Deacon , Andrew Morton , James Morse , Robin Murphy , Andrey Konovalov , Dmitry Vyukov , Vincenzo Frascino , Michael Ellerman , Nicholas Piggin , Andrey Ryabinin , Alexander Potapenko , Christophe Leroy , Aneesh Kumar K.V , "Naveen N. Rao" , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , , "H. Peter Anvin" , Madhavan Srinivasan , , , , , , , Guohanjun References: <20241209024257.3618492-1-tongtiangen@huawei.com> <20241209024257.3618492-5-tongtiangen@huawei.com> <69955002-c3b1-459d-9b42-8d07475c3fd3@huawei.com> From: Tong Tiangen In-Reply-To: Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 8bit X-Originating-IP: [10.174.179.234] X-ClientProxiedBy: dggems705-chm.china.huawei.com (10.3.19.182) To kwepemk500005.china.huawei.com (7.202.194.90) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250218_035119_986696_B32AB159 X-CRM114-Status: GOOD ( 21.36 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org 在 2025/2/17 22:55, Catalin Marinas 写道: > On Mon, Feb 17, 2025 at 04:07:49PM +0800, Tong Tiangen wrote: >> 在 2025/2/15 1:24, Catalin Marinas 写道: >>> On Fri, Feb 14, 2025 at 10:49:01AM +0800, Tong Tiangen wrote: >>>> 在 2025/2/13 1:11, Catalin Marinas 写道: >>>>> On Mon, Dec 09, 2024 at 10:42:56AM +0800, Tong Tiangen wrote: >>>>>> Currently, many scenarios that can tolerate memory errors when copying page >>>>>> have been supported in the kernel[1~5], all of which are implemented by >>>>>> copy_mc_[user]_highpage(). arm64 should also support this mechanism. >>>>>> >>>>>> Due to mte, arm64 needs to have its own copy_mc_[user]_highpage() >>>>>> architecture implementation, macros __HAVE_ARCH_COPY_MC_HIGHPAGE and >>>>>> __HAVE_ARCH_COPY_MC_USER_HIGHPAGE have been added to control it. >>>>>> >>>>>> Add new helper copy_mc_page() which provide a page copy implementation with >>>>>> hardware memory error safe. The code logic of copy_mc_page() is the same as >>>>>> copy_page(), the main difference is that the ldp insn of copy_mc_page() >>>>>> contains the fixup type EX_TYPE_KACCESS_ERR_ZERO_MEM_ERR, therefore, the >>>>>> main logic is extracted to copy_page_template.S. In addition, the fixup of >>>>>> MOPS insn is not considered at present. >>>>> >>>>> Could we not add the exception table entry permanently but ignore the >>>>> exception table entry if it's not on the do_sea() path? That would save >>>>> some code duplication. >>>> >>>> I'm sorry, I didn't catch your point, that the do_sea() and non do_sea() >>>> paths use different exception tables? >>> >>> No, they would have the same exception table, only that we'd interpret >>> it differently depending on whether it's a SEA error or not. Or rather >>> ignore the exception table altogether for non-SEA errors. >> >> You mean to use the same exception type (EX_TYPE_KACCESS_ERR_ZERO) and >> then do different processing on SEA errors and non-SEA errors, right? > > Right. Ok, now we have the same understanding. > >> If so, some instructions of copy_page() did not add to the exception >> table will be added to the exception table, and the original logic will >> be affected. >> >> For example, if an instruction is not added to the exception table, the >> instruction will panic when it triggers a non-SEA error. If this >> instruction is added to the exception table because of SEA processing, >> and then a non-SEA error is triggered, should we fix it? > > No, we shouldn't fix it. The exception table entries have a type > associated. For a non-SEA error, we preserve the original behaviour even > if we find a SEA-specific entry in the exception table. You already need > such logic even if you duplicate the code for configurations where you > have MC enabled. So we need another way to distinguish the different processing of the same exception type on SEA and non-SEA path. For example, using strcut exception_table_entry.data, the disadvantage is that it occupies the future expansion space of data. I still think it's better to use methods like copy_from_user.S and copy_to_user.S calling copy_template.S, and the duplicate code in copy_template.S. Thanks, Tong. >