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Mon, 08 Jul 2024 22:19:12 -0700 (PDT) X-Google-Smtp-Source: AGHT+IFnVXcKv//QUkd2zalk0KVeKlO2V4LMxD2AA7tVtpYgxucEKRW687wZfsonrs0t+riLdK1vzA== X-Received: by 2002:a17:902:ced2:b0:1fb:6ea1:4c with SMTP id d9443c01a7336-1fbb6d3d631mr11099335ad.23.1720502352511; Mon, 08 Jul 2024 22:19:12 -0700 (PDT) Received: from [192.168.68.54] ([103.210.27.92]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-1fbb6a28f83sm7276275ad.72.2024.07.08.22.19.05 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 08 Jul 2024 22:19:11 -0700 (PDT) Message-ID: <3b1c8387-f40f-4841-b2b3-9e4dc1e35efc@redhat.com> Date: Tue, 9 Jul 2024 15:19:03 +1000 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 01/15] arm64: rsi: Add RSI definitions To: Steven Price , kvm@vger.kernel.org, kvmarm@lists.linux.dev Cc: Suzuki K Poulose , Catalin Marinas , Marc Zyngier , Will Deacon , James Morse , Oliver Upton , Zenghui Yu , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Joey Gouly , Alexandru Elisei , Christoffer Dall , Fuad Tabba , linux-coco@lists.linux.dev, Ganapatrao Kulkarni References: <20240701095505.165383-1-steven.price@arm.com> <20240701095505.165383-2-steven.price@arm.com> From: Gavin Shan In-Reply-To: <20240701095505.165383-2-steven.price@arm.com> X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Language: en-US Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240708_221920_258438_A76490A3 X-CRM114-Status: GOOD ( 16.78 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 7/1/24 7:54 PM, Steven Price wrote: > From: Suzuki K Poulose > > The RMM (Realm Management Monitor) provides functionality that can be > accessed by a realm guest through SMC (Realm Services Interface) calls. > > The SMC definitions are based on DEN0137[1] version A-eac5. > > [1] https://developer.arm.com/documentation/den0137/latest > > Signed-off-by: Suzuki K Poulose > Signed-off-by: Steven Price > --- > Changes since v3: > * Drop invoke_rsi_fn_smc_with_res() function and call arm_smccc_smc() > directly instead. > * Rename header guard in rsi_smc.h to be consistent. > Changes since v2: > * Rename rsi_get_version() to rsi_request_version() > * Fix size/alignment of struct realm_config > --- > arch/arm64/include/asm/rsi_cmds.h | 38 ++++++++ > arch/arm64/include/asm/rsi_smc.h | 142 ++++++++++++++++++++++++++++++ > 2 files changed, 180 insertions(+) > create mode 100644 arch/arm64/include/asm/rsi_cmds.h > create mode 100644 arch/arm64/include/asm/rsi_smc.h > [...] > --- /dev/null > +++ b/arch/arm64/include/asm/rsi_smc.h > @@ -0,0 +1,142 @@ > +/* SPDX-License-Identifier: GPL-2.0-only */ > +/* > + * Copyright (C) 2023 ARM Ltd. > + */ > + > +#ifndef __ASM_RSI_SMC_H_ > +#define __ASM_RSI_SMC_H_ > + > +/* > + * This file describes the Realm Services Interface (RSI) Application Binary > + * Interface (ABI) for SMC calls made from within the Realm to the RMM and > + * serviced by the RMM. > + */ > + > +#define SMC_RSI_CALL_BASE 0xC4000000 > + These fields have been defined in include/linux/arm-smccc.h. Those definitions can be reused. Otherwise, it's not obvious to reader what does 0xC4000000 represent. #define SMC_RSI_CALL_BASE ((ARM_SMCCC_FAST_CALL << ARM_SMCCC_TYPE_SHIFT) | \ (ARM_SMCCC_SMC_64 << ARM_SMCCC_CALL_CONV_SHIFT) | \ (ARM_SMCCC_OWNER_STANDARD << ARM_SMCCC_OWNER_SHIFT)) or #define SMC_RSI_CALL_BASE ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \ ARM_SMCCC_SMC_64, \ ARM_SMCCC_OWNER_STANDARD, \ 0) Thanks, Gavin