From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.3 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,NICE_REPLY_A,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED,USER_AGENT_SANE_1 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id EFDD9C433DB for ; Tue, 2 Mar 2021 07:44:08 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 7D007614A7 for ; Tue, 2 Mar 2021 07:44:08 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 7D007614A7 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=huawei.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:Date:Message-ID:From: References:To:Subject:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=Hzx7F6SmXMC3xZUOZ54rX6H5FcL20h1/sNVzh0RVQ0o=; b=U9RZdPdUBZdsgETIJYiXuU1+m 5iHyEy9nO8GYNVvaWgriSxDh45O1ij0vYLS3SB4FfHrZu6WwgQ/qMs29nlE0eyzkT3LNuSy5QF+v4 0+u5A5/28NnXS41xUmW0zCA/P1fH62fYGUOCNEZ7EKbwa7vbws1M0CPx6b2cRMZiLmv6ynbhoEmu6 +fYo42ddr/XPbkR2kuTxYKOg8AtMmQnAEqlOoXX398CYAcNvJ/N+grAX0qLXvO93wcurQFEiXU3Ut j8EfJ3Xr9ilE12nv5wFaFqosnjGpvOksSoxtxqBjk16HJJ1U1F9WEsDnsrzKRihdhyj3DyfFRNJjv oMnwcmqzA==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1lGzgL-0006zj-11; Tue, 02 Mar 2021 07:43:01 +0000 Received: from szxga04-in.huawei.com ([45.249.212.190]) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1lGzfy-0006x3-Br for linux-arm-kernel@lists.infradead.org; Tue, 02 Mar 2021 07:42:59 +0000 Received: from DGGEMS409-HUB.china.huawei.com (unknown [172.30.72.60]) by szxga04-in.huawei.com (SkyGuard) with ESMTP id 4DqTZP1nWGz16FVl; Tue, 2 Mar 2021 15:40:45 +0800 (CST) Received: from [10.174.184.42] (10.174.184.42) by DGGEMS409-HUB.china.huawei.com (10.3.19.209) with Microsoft SMTP Server id 14.3.498.0; Tue, 2 Mar 2021 15:42:18 +0800 Subject: Re: [RFC PATCH 01/11] iommu/arm-smmu-v3: Add feature detection for HTTU To: Robin Murphy , , , , , , "Will Deacon" , Alex Williamson , "Marc Zyngier" , Catalin Marinas References: <20210128151742.18840-1-zhukeqian1@huawei.com> <20210128151742.18840-2-zhukeqian1@huawei.com> From: Keqian Zhu Message-ID: <3b347f75-2e53-1f89-a76d-1f328766cf5f@huawei.com> Date: Tue, 2 Mar 2021 15:42:17 +0800 User-Agent: Mozilla/5.0 (Windows NT 10.0; WOW64; rv:45.0) Gecko/20100101 Thunderbird/45.7.1 MIME-Version: 1.0 In-Reply-To: X-Originating-IP: [10.174.184.42] X-CFilter-Loop: Reflected X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210302_024258_549325_B6B7AF2B X-CRM114-Status: GOOD ( 19.04 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , jiangkunkun@huawei.com, Suzuki K Poulose , Cornelia Huck , lushenming@huawei.com, Kirti Wankhede , James Morse , wanghaibin.wang@huawei.com Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi Robin, I am going to send v2 at next week, to addresses these issues reported by you. Many thanks! And do you have any further comments on patch #4 #5 and #6? Thanks, Keqian On 2021/2/5 3:50, Robin Murphy wrote: > On 2021-01-28 15:17, Keqian Zhu wrote: >> From: jiangkunkun >> >> The SMMU which supports HTTU (Hardware Translation Table Update) can >> update the access flag and the dirty state of TTD by hardware. It is >> essential to track dirty pages of DMA. >> >> This adds feature detection, none functional change. >> >> Co-developed-by: Keqian Zhu >> Signed-off-by: Kunkun Jiang >> --- >> drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 16 ++++++++++++++++ >> drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h | 8 ++++++++ >> include/linux/io-pgtable.h | 1 + >> 3 files changed, 25 insertions(+) >> >> diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c >> index 8ca7415d785d..0f0fe71cc10d 100644 >> --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c >> +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c >> @@ -1987,6 +1987,7 @@ static int arm_smmu_domain_finalise(struct iommu_domain *domain, >> .pgsize_bitmap = smmu->pgsize_bitmap, >> .ias = ias, >> .oas = oas, >> + .httu_hd = smmu->features & ARM_SMMU_FEAT_HTTU_HD, >> .coherent_walk = smmu->features & ARM_SMMU_FEAT_COHERENCY, >> .tlb = &arm_smmu_flush_ops, >> .iommu_dev = smmu->dev, >> @@ -3224,6 +3225,21 @@ static int arm_smmu_device_hw_probe(struct arm_smmu_device *smmu) >> if (reg & IDR0_HYP) >> smmu->features |= ARM_SMMU_FEAT_HYP; >> + switch (FIELD_GET(IDR0_HTTU, reg)) { > > We need to accommodate the firmware override as well if we need this to be meaningful. Jean-Philippe is already carrying a suitable patch in the SVA stack[1]. > >> + case IDR0_HTTU_NONE: >> + break; >> + case IDR0_HTTU_HA: >> + smmu->features |= ARM_SMMU_FEAT_HTTU_HA; >> + break; >> + case IDR0_HTTU_HAD: >> + smmu->features |= ARM_SMMU_FEAT_HTTU_HA; >> + smmu->features |= ARM_SMMU_FEAT_HTTU_HD; >> + break; >> + default: >> + dev_err(smmu->dev, "unknown/unsupported HTTU!\n"); >> + return -ENXIO; >> + } >> + >> /* >> * The coherency feature as set by FW is used in preference to the ID >> * register, but warn on mismatch. >> diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h >> index 96c2e9565e00..e91bea44519e 100644 >> --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h >> +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h >> @@ -33,6 +33,10 @@ >> #define IDR0_ASID16 (1 << 12) >> #define IDR0_ATS (1 << 10) >> #define IDR0_HYP (1 << 9) >> +#define IDR0_HTTU GENMASK(7, 6) >> +#define IDR0_HTTU_NONE 0 >> +#define IDR0_HTTU_HA 1 >> +#define IDR0_HTTU_HAD 2 >> #define IDR0_COHACC (1 << 4) >> #define IDR0_TTF GENMASK(3, 2) >> #define IDR0_TTF_AARCH64 2 >> @@ -286,6 +290,8 @@ >> #define CTXDESC_CD_0_TCR_TBI0 (1ULL << 38) >> #define CTXDESC_CD_0_AA64 (1UL << 41) >> +#define CTXDESC_CD_0_HD (1UL << 42) >> +#define CTXDESC_CD_0_HA (1UL << 43) >> #define CTXDESC_CD_0_S (1UL << 44) >> #define CTXDESC_CD_0_R (1UL << 45) >> #define CTXDESC_CD_0_A (1UL << 46) >> @@ -604,6 +610,8 @@ struct arm_smmu_device { >> #define ARM_SMMU_FEAT_RANGE_INV (1 << 15) >> #define ARM_SMMU_FEAT_BTM (1 << 16) >> #define ARM_SMMU_FEAT_SVA (1 << 17) >> +#define ARM_SMMU_FEAT_HTTU_HA (1 << 18) >> +#define ARM_SMMU_FEAT_HTTU_HD (1 << 19) >> u32 features; >> #define ARM_SMMU_OPT_SKIP_PREFETCH (1 << 0) >> diff --git a/include/linux/io-pgtable.h b/include/linux/io-pgtable.h >> index ea727eb1a1a9..1a00ea8562c7 100644 >> --- a/include/linux/io-pgtable.h >> +++ b/include/linux/io-pgtable.h >> @@ -97,6 +97,7 @@ struct io_pgtable_cfg { >> unsigned long pgsize_bitmap; >> unsigned int ias; >> unsigned int oas; >> + bool httu_hd; > > This is very specific to the AArch64 stage 1 format, not a generic capability - I think it should be a quirk flag rather than a common field. > > Robin. > > [1] https://jpbrucker.net/git/linux/commit/?h=sva/current&id=1ef7d512fb9082450dfe0d22ca4f7e35625a097b > >> bool coherent_walk; >> const struct iommu_flush_ops *tlb; >> struct device *iommu_dev; >> > . > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel