From: James Clark <james.clark@arm.com>
To: Linu Cherian <lcherian@marvell.com>, suzuki.poulose@arm.com
Cc: linux-arm-kernel@lists.infradead.org, coresight@lists.linaro.org,
linux-kernel@vger.kernel.org, robh+dt@kernel.org,
krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org,
devicetree@vger.kernel.org, sgoutham@marvell.com,
gcherian@marvell.com, Anil Kumar Reddy <areddy3@marvell.com>,
mike.leach@linaro.org, leo.yan@linaro.org
Subject: Re: [PATCH v7 2/7] coresight: tmc-etr: Add support to use reserved trace memory
Date: Fri, 12 Apr 2024 10:57:29 +0100 [thread overview]
Message-ID: <3c5c85d4-8657-4ee0-88fa-ee47dce4cc7c@arm.com> (raw)
In-Reply-To: <20240307033625.325058-3-lcherian@marvell.com>
On 07/03/2024 03:36, Linu Cherian wrote:
> Add support to use reserved memory for coresight ETR trace buffer.
>
> Introduce a new ETR buffer mode called ETR_MODE_RESRV, which
> becomes available when ETR device tree node is supplied with a valid
> reserved memory region.
>
> ETR_MODE_RESRV can be selected only by explicit user request.
>
> $ echo resrv >/sys/bus/coresight/devices/tmc_etr<N>/buf_mode_preferred
>
> Signed-off-by: Anil Kumar Reddy <areddy3@marvell.com>
> Signed-off-by: Linu Cherian <lcherian@marvell.com>
> ---
> Changelog from v6:
> * Removed redundant goto statements
> * Setting of etr_buf->size to the reserved memory size is done
> after successful dma map inside the alloc function
> * Removed the special casing for ETR_MODE_RESRV
> * Fixed the tab spacing in struct tmc_drvdata
>
> .../hwtracing/coresight/coresight-tmc-core.c | 47 +++++++++++
> .../hwtracing/coresight/coresight-tmc-etr.c | 82 ++++++++++++++++++-
> drivers/hwtracing/coresight/coresight-tmc.h | 27 ++++++
> 3 files changed, 153 insertions(+), 3 deletions(-)
>
[...]
> static bool etr_can_use_flat_mode(struct etr_buf_hw *buf_hw, ssize_t etr_buf_size)
> @@ -874,13 +947,10 @@ static struct etr_buf *tmc_alloc_etr_buf(struct tmc_drvdata *drvdata,
> if (!etr_buf)
> return ERR_PTR(-ENOMEM);
>
> - etr_buf->size = size;
> -
Hi Linu,
Not sure if this was left in by mistake? It's not mentioned in the
commit message and it doesn't seem to match the description.
Please make sure the current tests pass both with and without a reserved
buffer defined in the DT. I get lots of failures with this patchset
applied on N1SDP. ETF seems to work but ETR doesn't:
$ sudo perf test -vvv "arm coresight"
Recording trace (only user mode) with path: CPU1 => tmc_etf0
CoreSight path testing (CPU1 -> tmc_etf0): PASS
Recording trace (only user mode) with path: CPU1 => tmc_etr0
CoreSight path testing (CPU1 -> tmc_etr0): FAIL
...
Dmesg:
[ 1938.622091] coresight tmc_etr0: Unable to allocate ETR buffer
> /* If there is user directive for buffer mode, try that first */
> if (drvdata->etr_mode != ETR_MODE_AUTO)
> rc = tmc_etr_mode_alloc_buf(drvdata->etr_mode, drvdata,
> etr_buf, node, pages);
> -
Whitespace change.
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2024-04-12 9:57 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-03-07 3:36 [PATCH v7 0/7] Coresight for Kernel panic and watchdog reset Linu Cherian
2024-03-07 3:36 ` [PATCH v7 1/7] dt-bindings: arm: coresight-tmc: Add "memory-region" property Linu Cherian
2024-03-07 3:36 ` [PATCH v7 2/7] coresight: tmc-etr: Add support to use reserved trace memory Linu Cherian
2024-04-12 9:57 ` James Clark [this message]
2024-04-14 10:09 ` [EXTERNAL] " Linu Cherian
2024-03-07 3:36 ` [PATCH v7 3/7] coresight: core: Add provision for panic callbacks Linu Cherian
2024-03-07 3:36 ` [PATCH v7 4/7] coresight: tmc: Enable panic sync handling Linu Cherian
2024-03-07 3:36 ` [PATCH v7 5/7] coresight: tmc: Add support for reading crash data Linu Cherian
2024-04-12 10:05 ` James Clark
2024-04-15 4:01 ` [EXTERNAL] " Linu Cherian
2024-04-15 9:28 ` James Clark
2024-04-21 2:49 ` Linu Cherian
2024-04-22 8:18 ` James Clark
2024-04-25 2:07 ` [EXTERNAL] " Linu Cherian
2024-04-25 9:32 ` James Clark
2024-03-07 3:36 ` [PATCH v7 6/7] coresight: tmc: Stop trace capture on FlIn Linu Cherian
2024-03-07 3:36 ` [PATCH v7 7/7] coresight: config: Add preloaded configuration Linu Cherian
2024-04-09 0:10 ` [PATCH v7 0/7] Coresight for Kernel panic and watchdog reset Linu Cherian
2024-04-09 9:28 ` James Clark
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=3c5c85d4-8657-4ee0-88fa-ee47dce4cc7c@arm.com \
--to=james.clark@arm.com \
--cc=areddy3@marvell.com \
--cc=conor+dt@kernel.org \
--cc=coresight@lists.linaro.org \
--cc=devicetree@vger.kernel.org \
--cc=gcherian@marvell.com \
--cc=krzysztof.kozlowski+dt@linaro.org \
--cc=lcherian@marvell.com \
--cc=leo.yan@linaro.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=mike.leach@linaro.org \
--cc=robh+dt@kernel.org \
--cc=sgoutham@marvell.com \
--cc=suzuki.poulose@arm.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).