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Wed, 22 May 2024 14:26:21 +0100 From: Shameerali Kolothum Thodi To: Jason Gunthorpe CC: "iommu@lists.linux.dev" , "linux-arm-kernel@lists.infradead.org" , "robin.murphy@arm.com" , "will@kernel.org" , "joro@8bytes.org" , "ryan.roberts@arm.com" , "kevin.tian@intel.com" , "nicolinc@nvidia.com" , "mshavit@google.com" , "eric.auger@redhat.com" , "joao.m.martins@oracle.com" , jiangkunkun , zhukeqian , Linuxarm Subject: RE: [PATCH v3 4/4] iommu/arm-smmu-v3: Enable HTTU for stage1 with io-pgtable mapping Thread-Topic: [PATCH v3 4/4] iommu/arm-smmu-v3: Enable HTTU for stage1 with io-pgtable mapping Thread-Index: AQHamwThMu7b7TneXEy+tpkYg8efUbGTg3mAgA/bbNA= Date: Wed, 22 May 2024 13:26:20 +0000 Message-ID: <3d0aa20bbb97452cb78b3bb94af24ebd@huawei.com> References: <20240430134308.1604-1-shameerali.kolothum.thodi@huawei.com> <20240430134308.1604-5-shameerali.kolothum.thodi@huawei.com> In-Reply-To: Accept-Language: en-GB, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.202.227.28] MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240522_062740_609724_932CE973 X-CRM114-Status: GOOD ( 20.19 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org > -----Original Message----- > From: Jason Gunthorpe > Sent: Sunday, May 12, 2024 1:09 PM > To: Shameerali Kolothum Thodi > Cc: iommu@lists.linux.dev; linux-arm-kernel@lists.infradead.org; > robin.murphy@arm.com; will@kernel.org; joro@8bytes.org; > ryan.roberts@arm.com; kevin.tian@intel.com; nicolinc@nvidia.com; > mshavit@google.com; eric.auger@redhat.com; joao.m.martins@oracle.com; > jiangkunkun ; zhukeqian > ; Linuxarm > Subject: Re: [PATCH v3 4/4] iommu/arm-smmu-v3: Enable HTTU for stage1 > with io-pgtable mapping > > On Tue, Apr 30, 2024 at 02:43:08PM +0100, Shameer Kolothum wrote: > > > diff --git a/drivers/iommu/io-pgtable-arm.c b/drivers/iommu/io-pgtable- > arm.c > > index da6cc52859ba..20ac0e833c7b 100644 > > --- a/drivers/iommu/io-pgtable-arm.c > > +++ b/drivers/iommu/io-pgtable-arm.c > > @@ -433,6 +433,8 @@ static arm_lpae_iopte arm_lpae_prot_to_pte(struct > arm_lpae_io_pgtable *data, > > pte = ARM_LPAE_PTE_nG; > > if (!(prot & IOMMU_WRITE) && (prot & IOMMU_READ)) > > pte |= ARM_LPAE_PTE_AP_RDONLY; > > + else if (data->iop.cfg.quirks & IO_PGTABLE_QUIRK_ARM_HD) > > + pte |= ARM_LPAE_PTE_AP_WRITABLE_CLEAN; > > This seems a bit suboptimal, it means the HTTU will be generating > dirty's before the tracking is turned on. As I understand it if the > SMMU wants to write a dirty bit it has to do an atomic RMW to memory, > so this would be a drag on baseline performance? Our initial tests has not shown any difference so far. But it is a possibility. > Should this start out as dirty and let the enable flow clean it to > turn it on? Ok. Just to be clear, so the suggestion is just set the DBM bit here and let the read_and_clear_dirty() set the AP_RDONLY_BIT through the iopt_set_dirty_tracking() path. > > Looks fine otherwise: > > Reviewed-by: Jason Gunthorpe Thanks, Shameer _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel