* [PATCH 0/2] Enable AONMIX MQS for IMX95-15x15-FRDM board @ 2026-01-20 15:03 Laurentiu Mihalcea 2026-01-20 15:03 ` [PATCH 1/2] ASoC: dt-bindings: fsl,mqs: make gpr optional for SM-based SoCs Laurentiu Mihalcea 2026-01-20 15:03 ` [PATCH 2/2] arm64: dts: imx95-15x15-frdm: support AONMIX MQS Laurentiu Mihalcea 0 siblings, 2 replies; 8+ messages in thread From: Laurentiu Mihalcea @ 2026-01-20 15:03 UTC (permalink / raw) To: Liam Girdwood, Mark Brown, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Shawn Guo, Sascha Hauer, Fabio Estevam, Shengjiu Wang, Chancel Liu Cc: linux-sound, devicetree, linux-kernel, imx, linux-arm-kernel, Pengutronix Kernel Team From: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com> This series enables AONMIX MQS (i.e. MQS1) for the IMX95-15x15-FRDM board. Laurentiu Mihalcea (2): ASoC: dt-bindings: fsl,mqs: make gpr optional for SM-based SoCs arm64: dts: imx95-15x15-frdm: support AONMIX MQS .../devicetree/bindings/sound/fsl,mqs.yaml | 12 ++- .../boot/dts/freescale/imx95-15x15-frdm.dts | 73 +++++++++++++++++++ arch/arm64/boot/dts/freescale/imx95.dtsi | 5 ++ 3 files changed, 88 insertions(+), 2 deletions(-) -- 2.43.0 ^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH 1/2] ASoC: dt-bindings: fsl,mqs: make gpr optional for SM-based SoCs 2026-01-20 15:03 [PATCH 0/2] Enable AONMIX MQS for IMX95-15x15-FRDM board Laurentiu Mihalcea @ 2026-01-20 15:03 ` Laurentiu Mihalcea 2026-01-20 16:18 ` Frank Li 2026-01-21 8:14 ` Krzysztof Kozlowski 2026-01-20 15:03 ` [PATCH 2/2] arm64: dts: imx95-15x15-frdm: support AONMIX MQS Laurentiu Mihalcea 1 sibling, 2 replies; 8+ messages in thread From: Laurentiu Mihalcea @ 2026-01-20 15:03 UTC (permalink / raw) To: Liam Girdwood, Mark Brown, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Shawn Guo, Sascha Hauer, Fabio Estevam, Shengjiu Wang, Chancel Liu Cc: linux-sound, devicetree, linux-kernel, imx, linux-arm-kernel, Pengutronix Kernel Team From: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com> For SM-based SoCs (i.e. MX95, MX943), GPR configuration is performed by the SM coprocessor. Thus, the programming model needs no handle to the GPR node. Make it optional. Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com> --- Documentation/devicetree/bindings/sound/fsl,mqs.yaml | 12 ++++++++++-- 1 file changed, 10 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/sound/fsl,mqs.yaml b/Documentation/devicetree/bindings/sound/fsl,mqs.yaml index 1415247c92c8..bcc265a742c7 100644 --- a/Documentation/devicetree/bindings/sound/fsl,mqs.yaml +++ b/Documentation/devicetree/bindings/sound/fsl,mqs.yaml @@ -63,6 +63,16 @@ required: allOf: - $ref: dai-common.yaml# + - if: + properties: + compatible: + contains: + enum: + - fsl,imx6sx-mqs + - fsl,imx93-mqs + then: + required: + - gpr - if: properties: compatible: @@ -91,8 +101,6 @@ allOf: clock-names: items: - const: mclk - required: - - gpr unevaluatedProperties: false -- 2.43.0 ^ permalink raw reply related [flat|nested] 8+ messages in thread
* Re: [PATCH 1/2] ASoC: dt-bindings: fsl,mqs: make gpr optional for SM-based SoCs 2026-01-20 15:03 ` [PATCH 1/2] ASoC: dt-bindings: fsl,mqs: make gpr optional for SM-based SoCs Laurentiu Mihalcea @ 2026-01-20 16:18 ` Frank Li 2026-01-26 14:16 ` Mark Brown 2026-01-21 8:14 ` Krzysztof Kozlowski 1 sibling, 1 reply; 8+ messages in thread From: Frank Li @ 2026-01-20 16:18 UTC (permalink / raw) To: Laurentiu Mihalcea Cc: Liam Girdwood, Mark Brown, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Shawn Guo, Sascha Hauer, Fabio Estevam, Shengjiu Wang, Chancel Liu, linux-sound, devicetree, linux-kernel, imx, linux-arm-kernel, Pengutronix Kernel Team On Tue, Jan 20, 2026 at 07:03:28AM -0800, Laurentiu Mihalcea wrote: > From: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com> > > For SM-based SoCs (i.e. MX95, MX943), GPR configuration is performed by > the SM coprocessor. Thus, the programming model needs no handle to the > GPR node. Make it optional. "programming model" look like software configuration. Thus, GPR is transparent to software and does not need to be described in the device tree. Make it optional. Reviewed-by: Frank Li <Frank.Li@nxp.com> > > Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com> > --- > Documentation/devicetree/bindings/sound/fsl,mqs.yaml | 12 ++++++++++-- > 1 file changed, 10 insertions(+), 2 deletions(-) > > diff --git a/Documentation/devicetree/bindings/sound/fsl,mqs.yaml b/Documentation/devicetree/bindings/sound/fsl,mqs.yaml > index 1415247c92c8..bcc265a742c7 100644 > --- a/Documentation/devicetree/bindings/sound/fsl,mqs.yaml > +++ b/Documentation/devicetree/bindings/sound/fsl,mqs.yaml > @@ -63,6 +63,16 @@ required: > > allOf: > - $ref: dai-common.yaml# > + - if: > + properties: > + compatible: > + contains: > + enum: > + - fsl,imx6sx-mqs > + - fsl,imx93-mqs > + then: > + required: > + - gpr > - if: > properties: > compatible: > @@ -91,8 +101,6 @@ allOf: > clock-names: > items: > - const: mclk > - required: > - - gpr > > unevaluatedProperties: false > > -- > 2.43.0 > ^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH 1/2] ASoC: dt-bindings: fsl,mqs: make gpr optional for SM-based SoCs 2026-01-20 16:18 ` Frank Li @ 2026-01-26 14:16 ` Mark Brown 2026-01-26 15:03 ` Laurentiu Mihalcea 0 siblings, 1 reply; 8+ messages in thread From: Mark Brown @ 2026-01-26 14:16 UTC (permalink / raw) To: Frank Li Cc: Laurentiu Mihalcea, Liam Girdwood, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Shawn Guo, Sascha Hauer, Fabio Estevam, Shengjiu Wang, Chancel Liu, linux-sound, devicetree, linux-kernel, imx, linux-arm-kernel, Pengutronix Kernel Team [-- Attachment #1: Type: text/plain, Size: 634 bytes --] On Tue, Jan 20, 2026 at 11:18:42AM -0500, Frank Li wrote: > On Tue, Jan 20, 2026 at 07:03:28AM -0800, Laurentiu Mihalcea wrote: > > From: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com> > > > > For SM-based SoCs (i.e. MX95, MX943), GPR configuration is performed by > > the SM coprocessor. Thus, the programming model needs no handle to the > > GPR node. Make it optional. > > "programming model" look like software configuration. > > Thus, GPR is transparent to software and does not need to be described in the > device tree. Make it optional. I was expecting a new version of this with Frank's comments rolled in. [-- Attachment #2: signature.asc --] [-- Type: application/pgp-signature, Size: 488 bytes --] ^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH 1/2] ASoC: dt-bindings: fsl,mqs: make gpr optional for SM-based SoCs 2026-01-26 14:16 ` Mark Brown @ 2026-01-26 15:03 ` Laurentiu Mihalcea 0 siblings, 0 replies; 8+ messages in thread From: Laurentiu Mihalcea @ 2026-01-26 15:03 UTC (permalink / raw) To: Mark Brown, Frank Li Cc: Liam Girdwood, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Shawn Guo, Sascha Hauer, Fabio Estevam, Shengjiu Wang, Chancel Liu, linux-sound, devicetree, linux-kernel, imx, linux-arm-kernel, Pengutronix Kernel Team On 1/26/2026 6:16 AM, Mark Brown wrote: > On Tue, Jan 20, 2026 at 11:18:42AM -0500, Frank Li wrote: >> On Tue, Jan 20, 2026 at 07:03:28AM -0800, Laurentiu Mihalcea wrote: >>> From: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com> >>> >>> For SM-based SoCs (i.e. MX95, MX943), GPR configuration is performed by >>> the SM coprocessor. Thus, the programming model needs no handle to the >>> GPR node. Make it optional. >> "programming model" look like software configuration. >> >> Thus, GPR is transparent to software and does not need to be described in the >> device tree. Make it optional. > I was expecting a new version of this with Frank's comments rolled in. Hey Mark, Sorry for taking ages with this. Got your message while preparing the patches. Just sent V2 a few mins. ago. Thanks, Laurentiu ^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH 1/2] ASoC: dt-bindings: fsl,mqs: make gpr optional for SM-based SoCs 2026-01-20 15:03 ` [PATCH 1/2] ASoC: dt-bindings: fsl,mqs: make gpr optional for SM-based SoCs Laurentiu Mihalcea 2026-01-20 16:18 ` Frank Li @ 2026-01-21 8:14 ` Krzysztof Kozlowski 1 sibling, 0 replies; 8+ messages in thread From: Krzysztof Kozlowski @ 2026-01-21 8:14 UTC (permalink / raw) To: Laurentiu Mihalcea Cc: Liam Girdwood, Mark Brown, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Shawn Guo, Sascha Hauer, Fabio Estevam, Shengjiu Wang, Chancel Liu, linux-sound, devicetree, linux-kernel, imx, linux-arm-kernel, Pengutronix Kernel Team On Tue, Jan 20, 2026 at 07:03:28AM -0800, Laurentiu Mihalcea wrote: > From: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com> > > For SM-based SoCs (i.e. MX95, MX943), GPR configuration is performed by > the SM coprocessor. Thus, the programming model needs no handle to the > GPR node. Make it optional. > > Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com> > --- > Documentation/devicetree/bindings/sound/fsl,mqs.yaml | 12 ++++++++++-- > 1 file changed, 10 insertions(+), 2 deletions(-) Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Best regards, Krzysztof ^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH 2/2] arm64: dts: imx95-15x15-frdm: support AONMIX MQS 2026-01-20 15:03 [PATCH 0/2] Enable AONMIX MQS for IMX95-15x15-FRDM board Laurentiu Mihalcea 2026-01-20 15:03 ` [PATCH 1/2] ASoC: dt-bindings: fsl,mqs: make gpr optional for SM-based SoCs Laurentiu Mihalcea @ 2026-01-20 15:03 ` Laurentiu Mihalcea 2026-01-20 16:22 ` Frank Li 1 sibling, 1 reply; 8+ messages in thread From: Laurentiu Mihalcea @ 2026-01-20 15:03 UTC (permalink / raw) To: Liam Girdwood, Mark Brown, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Shawn Guo, Sascha Hauer, Fabio Estevam, Shengjiu Wang, Chancel Liu Cc: linux-sound, devicetree, linux-kernel, imx, linux-arm-kernel, Pengutronix Kernel Team From: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com> Add support for AONMIX MQS (i.e. MQS1). Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com> --- .../boot/dts/freescale/imx95-15x15-frdm.dts | 73 +++++++++++++++++++ arch/arm64/boot/dts/freescale/imx95.dtsi | 5 ++ 2 files changed, 78 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx95-15x15-frdm.dts b/arch/arm64/boot/dts/freescale/imx95-15x15-frdm.dts index ca1c4966c867..53aae25db7e4 100644 --- a/arch/arm64/boot/dts/freescale/imx95-15x15-frdm.dts +++ b/arch/arm64/boot/dts/freescale/imx95-15x15-frdm.dts @@ -243,6 +243,12 @@ codec { }; }; + sound-mqs { + compatible = "audio-graph-card2"; + links = <&sai1_port1>; + label = "mqs-audio"; + }; + usdhc3_pwrseq: usdhc3-pwrseq { compatible = "mmc-pwrseq-simple"; reset-gpios = <&pcal6524 8 GPIO_ACTIVE_LOW>; @@ -473,6 +479,21 @@ &mu7 { status = "okay"; }; +&mqs1 { + clocks = <&scmi_clk IMX95_CLK_SAI1>; + clock-names = "mclk"; + pinctrl-0 = <&pinctrl_mqs1>; + pinctrl-names = "default"; + status = "okay"; + + mqs1_port: port { + mqs1_ep: endpoint { + dai-format = "left_j"; + remote-endpoint = <&sai1_port1_ep>; + }; + }; +}; + &netc_blk_ctrl { status = "okay"; }; @@ -534,6 +555,51 @@ &pcie0 { status = "okay"; }; +&sai1 { + clocks = <&scmi_clk IMX95_CLK_BUSAON>, <&dummy>, + <&scmi_clk IMX95_CLK_SAI1>, <&dummy>, + <&dummy>, <&scmi_clk IMX95_CLK_AUDIOPLL1>, + <&scmi_clk IMX95_CLK_AUDIOPLL2>; + clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3", "pll8k", "pll11k"; + assigned-clocks = <&scmi_clk IMX95_CLK_AUDIOPLL1_VCO>, + <&scmi_clk IMX95_CLK_AUDIOPLL2_VCO>, + <&scmi_clk IMX95_CLK_AUDIOPLL1>, + <&scmi_clk IMX95_CLK_AUDIOPLL2>, + <&scmi_clk IMX95_CLK_SAI1>; + assigned-clock-parents = <0>, <0>, <0>, <0>, <&scmi_clk IMX95_CLK_AUDIOPLL1>; + assigned-clock-rates = <3932160000>, <3612672000>, + <393216000>, <361267200>, + <24576000>; + fsl,sai-mclk-direction-output; + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + /* leave unconnected - no RX in the context of MQS */ + port@0 { + reg = <0>; + + endpoint { + }; + }; + + sai1_port1: port@1 { + reg = <1>; + mclk-fs = <512>; + + sai1_port1_ep: endpoint { + dai-format = "left_j"; + system-clock-direction-out; + bitclock-master; + frame-master; + remote-endpoint = <&mqs1_ep>; + }; + }; + }; +}; + &scmi_iomuxc { pinctrl_emdio: emdiogrp { fsl,pins = < @@ -618,6 +684,13 @@ IMX95_PAD_GPIO_IO31__LPI2C4_SCL 0x40000b9e >; }; + pinctrl_mqs1: mqs1grp { + fsl,pins = < + IMX95_PAD_SAI1_TXFS__AONMIX_TOP_MQS1_LEFT 0x31e + IMX95_PAD_SAI1_RXD0__AONMIX_TOP_MQS1_RIGHT 0x31e + >; + }; + pinctrl_pcal6524: pcal6524grp { fsl,pins = < IMX95_PAD_GPIO_IO34__GPIO5_IO_BIT14 0x31e diff --git a/arch/arm64/boot/dts/freescale/imx95.dtsi b/arch/arm64/boot/dts/freescale/imx95.dtsi index 55e2da094c88..0c55861d673c 100644 --- a/arch/arm64/boot/dts/freescale/imx95.dtsi +++ b/arch/arm64/boot/dts/freescale/imx95.dtsi @@ -391,6 +391,11 @@ scmi_misc: protocol@84 { }; }; + mqs1: mqs-1 { + compatible = "fsl,imx95-aonmix-mqs"; + status = "disabled"; + }; + pmu { compatible = "arm,cortex-a55-pmu"; interrupts = <GIC_PPI 7 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_HIGH)>; -- 2.43.0 ^ permalink raw reply related [flat|nested] 8+ messages in thread
* Re: [PATCH 2/2] arm64: dts: imx95-15x15-frdm: support AONMIX MQS 2026-01-20 15:03 ` [PATCH 2/2] arm64: dts: imx95-15x15-frdm: support AONMIX MQS Laurentiu Mihalcea @ 2026-01-20 16:22 ` Frank Li 0 siblings, 0 replies; 8+ messages in thread From: Frank Li @ 2026-01-20 16:22 UTC (permalink / raw) To: Laurentiu Mihalcea Cc: Liam Girdwood, Mark Brown, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Shawn Guo, Sascha Hauer, Fabio Estevam, Shengjiu Wang, Chancel Liu, linux-sound, devicetree, linux-kernel, imx, linux-arm-kernel, Pengutronix Kernel Team On Tue, Jan 20, 2026 at 07:03:29AM -0800, Laurentiu Mihalcea wrote: > From: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com> > > Add support for AONMIX MQS (i.e. MQS1). > > Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com> > --- > .../boot/dts/freescale/imx95-15x15-frdm.dts | 73 +++++++++++++++++++ > arch/arm64/boot/dts/freescale/imx95.dtsi | 5 ++ > 2 files changed, 78 insertions(+) > > diff --git a/arch/arm64/boot/dts/freescale/imx95-15x15-frdm.dts b/arch/arm64/boot/dts/freescale/imx95-15x15-frdm.dts > index ca1c4966c867..53aae25db7e4 100644 > --- a/arch/arm64/boot/dts/freescale/imx95-15x15-frdm.dts > +++ b/arch/arm64/boot/dts/freescale/imx95-15x15-frdm.dts > @@ -243,6 +243,12 @@ codec { > }; > }; > ... > + > &scmi_iomuxc { > pinctrl_emdio: emdiogrp { > fsl,pins = < > @@ -618,6 +684,13 @@ IMX95_PAD_GPIO_IO31__LPI2C4_SCL 0x40000b9e > >; > }; > > + pinctrl_mqs1: mqs1grp { > + fsl,pins = < > + IMX95_PAD_SAI1_TXFS__AONMIX_TOP_MQS1_LEFT 0x31e > + IMX95_PAD_SAI1_RXD0__AONMIX_TOP_MQS1_RIGHT 0x31e Can you use tab instead of space for 0x31e Frank > + >; > + }; > + > pinctrl_pcal6524: pcal6524grp { > fsl,pins = < > IMX95_PAD_GPIO_IO34__GPIO5_IO_BIT14 0x31e > diff --git a/arch/arm64/boot/dts/freescale/imx95.dtsi b/arch/arm64/boot/dts/freescale/imx95.dtsi > index 55e2da094c88..0c55861d673c 100644 > --- a/arch/arm64/boot/dts/freescale/imx95.dtsi > +++ b/arch/arm64/boot/dts/freescale/imx95.dtsi > @@ -391,6 +391,11 @@ scmi_misc: protocol@84 { > }; > }; > > + mqs1: mqs-1 { > + compatible = "fsl,imx95-aonmix-mqs"; > + status = "disabled"; > + }; > + > pmu { > compatible = "arm,cortex-a55-pmu"; > interrupts = <GIC_PPI 7 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_HIGH)>; > -- > 2.43.0 > ^ permalink raw reply [flat|nested] 8+ messages in thread
end of thread, other threads:[~2026-01-26 15:03 UTC | newest] Thread overview: 8+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2026-01-20 15:03 [PATCH 0/2] Enable AONMIX MQS for IMX95-15x15-FRDM board Laurentiu Mihalcea 2026-01-20 15:03 ` [PATCH 1/2] ASoC: dt-bindings: fsl,mqs: make gpr optional for SM-based SoCs Laurentiu Mihalcea 2026-01-20 16:18 ` Frank Li 2026-01-26 14:16 ` Mark Brown 2026-01-26 15:03 ` Laurentiu Mihalcea 2026-01-21 8:14 ` Krzysztof Kozlowski 2026-01-20 15:03 ` [PATCH 2/2] arm64: dts: imx95-15x15-frdm: support AONMIX MQS Laurentiu Mihalcea 2026-01-20 16:22 ` Frank Li
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