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Execution proceeds from > Reset_Handler. > > However, the ELF entry point does not always match the hardware reset > address. For example, on i.MX94 CM33S: > > ELF entry point: 0x0ffc211d > CM33S hardware reset base: 0x0ffc0000 > > To derive the correct hardware reset address, the unused lower bits must > be masked off. The boot code should apply a SoC‑specific mask before > programming the reset address registers, e.g.: > > reset_address = entry & reset-vector-mask What do you think about this idea: Use fsl,reset-vector-base instead of a mask. It could happen that for example a CM7 instance has explicit requirements to boot from TCM but the entry point is in DRAM. Then masking won't help. fsl,reset-vector-base is always fixed hardware integration dependent and you can always specify it in DT.