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Fri, 07 Feb 2020 18:14:43 -0000 (UTC) Received: by smtp.codeaurora.org (Postfix, from userid 1001) id F2441C433CB; Fri, 7 Feb 2020 18:14:42 +0000 (UTC) Received: from [10.71.154.194] (i-global254.qualcomm.com [199.106.103.254]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: asutoshd) by smtp.codeaurora.org (Postfix) with ESMTPSA id DB10BC43383; Fri, 7 Feb 2020 18:14:40 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org DB10BC43383 Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; spf=none smtp.mailfrom=asutoshd@codeaurora.org Subject: Re: [PATCH v1 2/2] scsi: ufs: introduce common function to disable host TX LCC To: Stanley Chu , linux-scsi@vger.kernel.org, martin.petersen@oracle.com, avri.altman@wdc.com, alim.akhtar@samsung.com, jejb@linux.ibm.com, beanhuo@micron.com References: <20200207070357.17169-1-stanley.chu@mediatek.com> <20200207070357.17169-3-stanley.chu@mediatek.com> From: "Asutosh Das (asd)" Message-ID: <3edbf9cd-a3cb-7a99-f6ef-f767fdf64f1e@codeaurora.org> Date: Fri, 7 Feb 2020 10:14:40 -0800 User-Agent: Mozilla/5.0 (Windows NT 10.0; WOW64; rv:68.0) Gecko/20100101 Thunderbird/68.4.2 MIME-Version: 1.0 In-Reply-To: <20200207070357.17169-3-stanley.chu@mediatek.com> Content-Language: en-US X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200207_101449_785027_A72DE588 X-CRM114-Status: GOOD ( 20.39 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: bvanassche@acm.org, andy.teng@mediatek.com, chun-hung.wu@mediatek.com, kuohong.wang@mediatek.com, linux-kernel@vger.kernel.org, cang@codeaurora.org, linux-mediatek@lists.infradead.org, peter.wang@mediatek.com, matthias.bgg@gmail.com, linux-arm-kernel@lists.infradead.org Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="us-ascii"; Format="flowed" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 2/6/2020 11:03 PM, Stanley Chu wrote: > Many vendors would like to disable host TX LCC during initialization > flow. Introduce a common function for all users to make drivers easier to > read and maintained. This patch does not change any functionality. > > Signed-off-by: Stanley Chu > --- Reviewed-by: Asutosh Das > drivers/scsi/ufs/cdns-pltfrm.c | 2 +- > drivers/scsi/ufs/ufs-hisi.c | 2 +- > drivers/scsi/ufs/ufs-mediatek.c | 2 +- > drivers/scsi/ufs/ufs-qcom.c | 4 +--- > drivers/scsi/ufs/ufshcd-pci.c | 2 +- > drivers/scsi/ufs/ufshcd.h | 5 +++++ > 6 files changed, 10 insertions(+), 7 deletions(-) > > diff --git a/drivers/scsi/ufs/cdns-pltfrm.c b/drivers/scsi/ufs/cdns-pltfrm.c > index 56a6a1ed5ec2..da065a259f6e 100644 > --- a/drivers/scsi/ufs/cdns-pltfrm.c > +++ b/drivers/scsi/ufs/cdns-pltfrm.c > @@ -192,7 +192,7 @@ static int cdns_ufs_link_startup_notify(struct ufs_hba *hba, > * and device TX LCC are disabled once link startup is > * completed. > */ > - ufshcd_dme_set(hba, UIC_ARG_MIB(PA_LOCAL_TX_LCC_ENABLE), 0); > + ufshcd_disable_host_tx_lcc(hba); > > /* > * Disabling Autohibern8 feature in cadence UFS > diff --git a/drivers/scsi/ufs/ufs-hisi.c b/drivers/scsi/ufs/ufs-hisi.c > index 5d6487350a6c..074a6a055a4c 100644 > --- a/drivers/scsi/ufs/ufs-hisi.c > +++ b/drivers/scsi/ufs/ufs-hisi.c > @@ -235,7 +235,7 @@ static int ufs_hisi_link_startup_pre_change(struct ufs_hba *hba) > ufshcd_writel(hba, reg, REG_AUTO_HIBERNATE_IDLE_TIMER); > > /* Unipro PA_Local_TX_LCC_Enable */ > - ufshcd_dme_set(hba, UIC_ARG_MIB_SEL(0x155E, 0x0), 0x0); > + ufshcd_disable_host_tx_lcc(hba); > /* close Unipro VS_Mk2ExtnSupport */ > ufshcd_dme_set(hba, UIC_ARG_MIB_SEL(0xD0AB, 0x0), 0x0); > ufshcd_dme_get(hba, UIC_ARG_MIB_SEL(0xD0AB, 0x0), &value); > diff --git a/drivers/scsi/ufs/ufs-mediatek.c b/drivers/scsi/ufs/ufs-mediatek.c > index 8f73c860f423..9d05962feb15 100644 > --- a/drivers/scsi/ufs/ufs-mediatek.c > +++ b/drivers/scsi/ufs/ufs-mediatek.c > @@ -318,7 +318,7 @@ static int ufs_mtk_pre_link(struct ufs_hba *hba) > * to make sure that both host and device TX LCC are disabled > * once link startup is completed. > */ > - ret = ufshcd_dme_set(hba, UIC_ARG_MIB(PA_LOCAL_TX_LCC_ENABLE), 0); > + ret = ufshcd_disable_host_tx_lcc(hba); > if (ret) > return ret; > > diff --git a/drivers/scsi/ufs/ufs-qcom.c b/drivers/scsi/ufs/ufs-qcom.c > index c69c29a1ceb9..c2e703d58f63 100644 > --- a/drivers/scsi/ufs/ufs-qcom.c > +++ b/drivers/scsi/ufs/ufs-qcom.c > @@ -554,9 +554,7 @@ static int ufs_qcom_link_startup_notify(struct ufs_hba *hba, > * completed. > */ > if (ufshcd_get_local_unipro_ver(hba) != UFS_UNIPRO_VER_1_41) > - err = ufshcd_dme_set(hba, > - UIC_ARG_MIB(PA_LOCAL_TX_LCC_ENABLE), > - 0); > + err = ufshcd_disable_host_tx_lcc(hba); > > break; > case POST_CHANGE: > diff --git a/drivers/scsi/ufs/ufshcd-pci.c b/drivers/scsi/ufs/ufshcd-pci.c > index 3b19de3ae9a3..8f78a8151499 100644 > --- a/drivers/scsi/ufs/ufshcd-pci.c > +++ b/drivers/scsi/ufs/ufshcd-pci.c > @@ -44,7 +44,7 @@ static int ufs_intel_disable_lcc(struct ufs_hba *hba) > > ufshcd_dme_get(hba, attr, &lcc_enable); > if (lcc_enable) > - ufshcd_dme_set(hba, attr, 0); > + ufshcd_disable_host_tx_lcc(hba); > > return 0; > } > diff --git a/drivers/scsi/ufs/ufshcd.h b/drivers/scsi/ufs/ufshcd.h > index 81c71a3e3474..8f516b205c32 100644 > --- a/drivers/scsi/ufs/ufshcd.h > +++ b/drivers/scsi/ufs/ufshcd.h > @@ -914,6 +914,11 @@ static inline bool ufshcd_is_hs_mode(struct ufs_pa_layer_attr *pwr_info) > pwr_info->pwr_tx == FASTAUTO_MODE); > } > > +static inline int ufshcd_disable_host_tx_lcc(struct ufs_hba *hba) > +{ > + return ufshcd_dme_set(hba, UIC_ARG_MIB(PA_LOCAL_TX_LCC_ENABLE), 0); > +} > + > /* Expose Query-Request API */ > int ufshcd_query_descriptor_retry(struct ufs_hba *hba, > enum query_opcode opcode, > -- The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, Linux Foundation Collaborative Project _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel