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From: "Nazle Asmade, Muhammad Nazim Amirul" <muhammad.nazim.amirul.nazle.asmade@altera.com>
To: Dinh Nguyen <dinguyen@kernel.org>, "bp@alien8.de" <bp@alien8.de>,
	"tony.luck@intel.com" <tony.luck@intel.com>
Cc: "linux-edac@vger.kernel.org" <linux-edac@vger.kernel.org>,
	"linux-arm-kernel@lists.infradead.org"
	<linux-arm-kernel@lists.infradead.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH] drivers: altera_edac: Fix OCRAM ECC init for warm reset
Date: Mon, 11 May 2026 03:36:18 +0000	[thread overview]
Message-ID: <3f3302fc-3708-4879-b594-0d001a128bac@altera.com> (raw)
In-Reply-To: <59ce1037-b6fb-4af7-a213-d605ba5c9a3d@kernel.org>

On 11/5/2026 4:31 am, Dinh Nguyen wrote:
> 
> 
> On 5/9/26 09:38, muhammad.nazim.amirul.nazle.asmade@altera.com wrote:
>> From: Nazim Amirul <muhammad.nazim.amirul.nazle.asmade@altera.com>
>>
>> The OCRAM ECC is always enabled either by the BootROM or by the
>> Secure Device Manager (SDM) during a power-on reset on SoCFPGA.
>>
>> However, during a warm reset, the OCRAM content is retained to
>> preserve data, while the control and status registers are reset to
>> their default values. As a result, ECC must be explicitly re-enabled
>> after a warm reset.
>>
>> Signed-off-by: Niravkumar L Rabara <nirav.rabara@altera.com>
>> Signed-off-by: Nazim Amirul 
>> <muhammad.nazim.amirul.nazle.asmade@altera.com>
>> ---
>>   drivers/edac/altera_edac.c | 10 ++++++++--
>>   1 file changed, 8 insertions(+), 2 deletions(-)
>>
>> diff --git a/drivers/edac/altera_edac.c b/drivers/edac/altera_edac.c
>> index 103b2c2eba2a..9e6a9786a881 100644
>> --- a/drivers/edac/altera_edac.c
>> +++ b/drivers/edac/altera_edac.c
>> @@ -1186,8 +1186,14 @@ altr_check_ocram_deps_init(struct 
>> altr_edac_device_dev *device)
>>       /* Verify OCRAM has been initialized */
>>       if (!ecc_test_bits(ALTR_A10_ECC_INITCOMPLETEA,
>> -               (base + ALTR_A10_ECC_INITSTAT_OFST)))
>> -        return -ENODEV;
>> +               (base + ALTR_A10_ECC_INITSTAT_OFST))) {
>> +        if (!ecc_test_bits(ALTR_A10_ECC_EN,
>> +                   (base + ALTR_A10_ECC_CTRL_OFST)))
>> +            ecc_set_bits(ALTR_A10_ECC_EN,
>> +                     (base + ALTR_A10_ECC_CTRL_OFST));
>> +        else
>> +            return -ENODEV;
>> +    }
>>       /* Enable IRQ on Single Bit Error */
>>       writel(ALTR_A10_ECC_SERRINTEN, (base + 
>> ALTR_A10_ECC_ERRINTENS_OFST));
> 
> This patch fails to apply to both v7.1-rc1 and linux-next. Please base 
> your patch to the latest and resend.
> 
> Thanks,
> Dinh
> 
sorry for this confusion, dropping this patch as already available in 
upstream

      parent reply	other threads:[~2026-05-11  3:36 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-05-09 14:38 [PATCH] drivers: altera_edac: Fix OCRAM ECC init for warm reset muhammad.nazim.amirul.nazle.asmade
2026-05-10 20:31 ` Dinh Nguyen
2026-05-10 20:46   ` Borislav Petkov
2026-05-11  3:36   ` Nazle Asmade, Muhammad Nazim Amirul [this message]

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