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Wed, 03 Dec 2025 20:07:20 -0800 (PST) X-Google-Smtp-Source: AGHT+IG2UrzzkLrdjzuX2UlZcDTnPIcTqHvRtioevp/Qe7Vw3+4S5U2KAiHTDJrmu0ANkstk+HAGdQ== X-Received: by 2002:a05:6a20:3ca2:b0:35b:b588:3002 with SMTP id adf61e73a8af0-363f5cef730mr5902840637.2.1764821240266; Wed, 03 Dec 2025 20:07:20 -0800 (PST) Received: from hu-pkondeti-hyd.qualcomm.com ([202.46.22.19]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-7e29f2ecf6fsm527934b3a.11.2025.12.03.20.07.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 03 Dec 2025 20:07:20 -0800 (PST) Date: Thu, 4 Dec 2025 09:37:15 +0530 From: Pavan Kondeti To: Catalin Marinas , Will Deacon , Marc Zyngier Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, rsalveti@oss.qualcomm.com Subject: Alternative to arm64.nopauth cmdline for disabling Pointer Authentication Message-ID: <3fcf6614-ee83-4a06-9024-83573b2e642e@quicinc.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUxMjA0MDAzMCBTYWx0ZWRfX5e5fU3Ntdhgq MdTIEmUxnj0rJt6wBrxiR2CtYlz5/zt15WBvLb0sv22dI75lvlfVwkR2sONUWnFs8E1fIiA1qxO cDBhQRw3b6Jv+fPyRM57o2fAoFhT1M73GMc7T+AishKwVc0aTQWmhLZDjzP99AvxTdnZzReXpE7 dkn0GWBHGcK/rk/AYm213lA7of/7WZAwCWE0Q68ZJ7p6/Zo+LfJ7s9HhP+M155zMXcmweanXRQH QKZXqKMQPAjCZ/LA/dou1uuJKcjG2T4o+KO13usjfqY4lasYq1RcUryzhjStbuVJi+tJyPysw0H vSWRq9gqx7QYCW8aLSJpdK55dw6irU6cJLcTAGHWPr53dNZDmlqL+cIDcSKnBzQ0ALcMVw/DXje bZ9hRhu+gx8s32qq+2Ci1EC5rC2Miw== X-Authority-Analysis: v=2.4 cv=JY6xbEKV c=1 sm=1 tr=0 ts=693108fa cx=c_pps a=UNFcQwm+pnOIJct1K4W+Mw==:117 a=fChuTYTh2wq5r3m49p7fHw==:17 a=kj9zAlcOel0A:10 a=wP3pNCr1ah4A:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=NEAV23lmAAAA:8 a=VwQbUJbxAAAA:8 a=7CQSdrXTAAAA:8 a=Yi-RDYHqs8T9QeDE7fwA:9 a=CjuIK1q_8ugA:10 a=uKXjsCUrEbL0IQVhDsJ9:22 a=a-qgeE7W1pNrGK8U0ZQC:22 X-Proofpoint-GUID: Xmh_8Dmp5RDk4ggPBoLmaFtuirLwgA7V X-Proofpoint-ORIG-GUID: Xmh_8Dmp5RDk4ggPBoLmaFtuirLwgA7V X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.9,FMLib:17.12.100.49 definitions=2025-12-04_01,2025-12-03_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 adultscore=0 impostorscore=0 suspectscore=0 priorityscore=1501 malwarescore=0 bulkscore=0 lowpriorityscore=0 phishscore=0 spamscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2510240001 definitions=main-2512040030 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20251203_200724_545227_BA171F75 X-CRM114-Status: GOOD ( 16.59 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi The pointer authentication feature (PAuth) is only supported on 0-3 CPUs but it is not supported on 4-7 CPUS on QCS8300. The ARM64 cpufeature discovery code expects late CPUs to have this feature if boot CPU feature has it since PAuth is enabled early. When a conflict like this is detected, the late CPUs are not allowed to boot. It is expected that system will continue to be functional with CPUs with Pauth feature supported and enabled. This is not a desired behavior in production. We started seeing this problem when Linux is booted in EL2. When Linux is running under Gunyah (Type-1 hypervisor), Pointer Authentication feature is hidden from EL1 via HCR_EL2.TID3. arm64.nopauth can be passed on kernel cmdline to disable the feature in kernel so that all all CPUs can boot on QCS8300. I am told maintaining a custom kernel commandline per SoC in a Generic OS distribution is not recommended and asked to discuss the problem with the comunity [1] This patch [2] from Catalin adds a devicetree property under memory {} to disable MTE. I believe this work predates the id-reg override mechanism. However, this made me think if workarounds like this can be detected via devicetree, for example a property under cpu { } node. Given that what we put in `chosen { bootargs="" }` kernel under respective SoC devicetree can be overridden by bootloader, should we have a **sticky** cmdline to specify critical workarounds like this? This would be more generic than introducing any new parameters. Looking for your inputs on this. Thanks, Pavan [1] https://github.com/qualcomm-linux/meta-qcom/issues/1277 [2] https://lore.kernel.org/linux-arm-kernel/20200515171612.1020-24-catalin.marinas@arm.com/