From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_SANE_1 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 900FCC38A2B for ; Fri, 17 Apr 2020 11:22:18 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 5D3EF21D94 for ; Fri, 17 Apr 2020 11:22:18 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="gYz3hUl6" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 5D3EF21D94 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:Date: Message-ID:From:References:To:Subject:Reply-To:Content-ID:Content-Description :Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=tNcE4MnB/5vAS5mnEqEA1NckjM8OcUKpT1uPRoOaZtA=; b=gYz3hUl63m81BP uEu5uUlGAMdqIeuoqv0EUNUDMzpU5ryY62xgnWCebjGqtOZBGbbgYD8Y3cJrIViK4mAsRFWIF/H+i qgxwnkDD+0E8UXs+kjqTYr/l/hadyigdfwnQiG+iQCvqdM8D3cGerPrRpuF0WxV6CglensUqLccJM q+2FvkKGPXrI2M2QWmqLZPTqXASj78rpwVa5WWaSy8yTuHxqGqoaTGfYE25rK1en84uzifmKVZuFU ROoZDoLgzIVnIhtIuqj1SABxGKtXazxaYiqMCSAm3T4qJ9yScviAzzr1JxzhdATHEpOwzLddZwSVV 9VCT5L/+m6bZ9kv34raw==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1jPP4b-0004j9-Lt; Fri, 17 Apr 2020 11:22:17 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1jPP4X-0004hx-VR for linux-arm-kernel@lists.infradead.org; Fri, 17 Apr 2020 11:22:15 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 2A059C14; Fri, 17 Apr 2020 04:22:13 -0700 (PDT) Received: from [192.168.0.14] (unknown [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id CA5BB3F6C4; Fri, 17 Apr 2020 04:22:11 -0700 (PDT) Subject: Re: [PATCH v2 4/6] KVM: arm: vgic-v2: Only use the virtual state when userspace accesses pending bits To: Marc Zyngier References: <20200417083319.3066217-1-maz@kernel.org> <20200417083319.3066217-5-maz@kernel.org> From: James Morse Message-ID: <4133d5f2-ed0e-9c4a-8a66-953fb6bf6e70@arm.com> Date: Fri, 17 Apr 2020 12:22:10 +0100 User-Agent: Mozilla/5.0 (X11; Linux aarch64; rv:60.0) Gecko/20100101 Thunderbird/60.9.0 MIME-Version: 1.0 In-Reply-To: <20200417083319.3066217-5-maz@kernel.org> Content-Language: en-GB X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200417_042214_100267_D22FF51B X-CRM114-Status: GOOD ( 15.63 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Julien Grall , kvm@vger.kernel.org, Suzuki K Poulose , Andre Przywara , Eric Auger , Julien Thierry , Zenghui Yu , kvmarm@lists.cs.columbia.edu, linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi Marc, On 17/04/2020 09:33, Marc Zyngier wrote: > There is no point in accessing the HW when writing to any of the > ISPENDR/ICPENDR registers from userspace, as only the guest should > be allowed to change the HW state. > > Introduce new userspace-specific accessors that deal solely with > the virtual state. Note that the API differs from that of GICv3, > where userspace exclusively uses ISPENDR to set the state. Too > bad we can't reuse it. > diff --git a/virt/kvm/arm/vgic/vgic-mmio-v2.c b/virt/kvm/arm/vgic/vgic-mmio-v2.c > index f51c6e939c76..a016f07adc28 100644 > --- a/virt/kvm/arm/vgic/vgic-mmio-v2.c > +++ b/virt/kvm/arm/vgic/vgic-mmio-v2.c > @@ -417,10 +417,12 @@ static const struct vgic_register_region vgic_v2_dist_registers[] = { > NULL, vgic_uaccess_write_cenable, 1, > VGIC_ACCESS_32bit), > REGISTER_DESC_WITH_BITS_PER_IRQ(GIC_DIST_PENDING_SET, > - vgic_mmio_read_pending, vgic_mmio_write_spending, NULL, NULL, 1, > + vgic_mmio_read_pending, vgic_mmio_write_spending, > + NULL, vgic_uaccess_write_spending, 1, > VGIC_ACCESS_32bit), vgic_mmio_write_spending() has some homebrew detection for is_uaccess, which causes vgic_hw_irq_spending() to do nothing. Isn't that now dead-code with this change? > diff --git a/virt/kvm/arm/vgic/vgic-mmio.c b/virt/kvm/arm/vgic/vgic-mmio.c > index 6e30034d1464..f1927ae02d2e 100644 > --- a/virt/kvm/arm/vgic/vgic-mmio.c > +++ b/virt/kvm/arm/vgic/vgic-mmio.c > @@ -321,6 +321,27 @@ void vgic_mmio_write_spending(struct kvm_vcpu *vcpu, > +int vgic_uaccess_write_spending(struct kvm_vcpu *vcpu, > + gpa_t addr, unsigned int len, > + unsigned long val) > +{ > + u32 intid = VGIC_ADDR_TO_INTID(addr, 1); > + int i; > + unsigned long flags; > + > + for_each_set_bit(i, &val, len * 8) { > + struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i); vgic_mmio_write_spending() has: | /* GICD_ISPENDR0 SGI bits are WI * and bales out early. Is GIC_DIST_PENDING_SET the same register? (If so, shouldn't that be true for PPI too?) > + raw_spin_lock_irqsave(&irq->irq_lock, flags); > + irq->pending_latch = true; > + vgic_queue_irq_unlock(vcpu->kvm, irq, flags); > + > + vgic_put_irq(vcpu->kvm, irq); > + } > + > + return 0; > +} > @@ -390,6 +411,26 @@ void vgic_mmio_write_cpending(struct kvm_vcpu *vcpu, > +int vgic_uaccess_write_cpending(struct kvm_vcpu *vcpu, > + gpa_t addr, unsigned int len, > + unsigned long val) > +{ > + u32 intid = VGIC_ADDR_TO_INTID(addr, 1); > + int i; > + unsigned long flags; > + > + for_each_set_bit(i, &val, len * 8) { > + struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i); Same dumb question about GICD_ICPENDR0!? > + raw_spin_lock_irqsave(&irq->irq_lock, flags); > + irq->pending_latch = false; > + raw_spin_unlock_irqrestore(&irq->irq_lock, flags); > + > + vgic_put_irq(vcpu->kvm, irq); > + } > + > + return 0; > +} Thanks, James _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel