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bh=7YMf+k/Bsp9owswsYg5LCXeOuKmxxash92C94JmMNFU=; b=YyyUUybUO9ZToCy1ozjYe7nM6hGgPqUd8qbdtc2cOc6VU3Qq5i6fb0BTkmf2GxT8dlZaxc 5yhGTaCCc2iVy8WhS+2hBtGOQVuNExftXz+0f4+w7aO40ncNqj/BRG37Xq4FWIQF4zS2M2 RTAwGslv5Xx0+EYkB/htXz0gxV5vh9izbIJwrLAFWDtSyojX4GMDusoXHYCLgFT2EKN2k8 lgeeI+RLgCdnR+l3KN9lSzu+sUJ2ki5H42Ck9Bzh8vKqIXpwOHeK3yUv/MJPwYVAuAFBLS V9xV6M8cW5xMvzIOW+wa8hymS1Rol8hK3HHTiq62NtIkBn5nsVHgX5MUr9UBvg== Message-ID: <4147d10f-fb54-4f1b-ac1b-58cf657a3aeb@mailbox.org> Date: Thu, 4 Sep 2025 17:29:11 +0200 MIME-Version: 1.0 Subject: Re: [PATCH v2 4/9] drm/panthor: Implement optional reset To: Boris Brezillon Cc: Peng Fan , linux-arm-kernel@lists.infradead.org, Conor Dooley , David Airlie , Fabio Estevam , Krzysztof Kozlowski , Liviu Dudau , Maarten Lankhorst , Maxime Ripard , Pengutronix Kernel Team , Philipp Zabel , Rob Herring , Sascha Hauer , Sebastian Reichel , Shawn Guo , Simona Vetter , Steven Price , Thomas Zimmermann , devicetree@vger.kernel.org, dri-devel@lists.freedesktop.org, imx@lists.linux.dev References: <20250321200625.132494-1-marex@denx.de> <20250321200625.132494-5-marex@denx.de> <20250324094333.7afb17a1@collabora.com> <20250325084349.344a0f11@collabora.com> <7aadf355-edf0-46fc-b969-65c3789375ca@denx.de> <20250325153507.61d82e39@collabora.com> <4c06aef3-a254-437c-aa15-8e3eb7bf5951@denx.de> <20250325155231.0d1b1000@collabora.com> <838a0c6b-845b-428d-86b3-1480e5b8080f@mailbox.org> <20250904082224.113d0cd1@fedora> <7d4e773b-64ac-49ce-8d8b-7a39c353d18f@mailbox.org> <20250904160445.1671f140@fedora> <36298ed9-05e4-4871-8e99-dfe814342c29@mailbox.org> <20250904172019.58e5f589@fedora> Content-Language: en-US From: Marek Vasut In-Reply-To: <20250904172019.58e5f589@fedora> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-MBO-RS-ID: 92bfdf50c7c1f6425f0 X-MBO-RS-META: fgg6a1e587wkiek1uhzomehqkz1go8k6 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250904_082923_665850_B620AEEF X-CRM114-Status: GOOD ( 19.75 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 9/4/25 5:20 PM, Boris Brezillon wrote: > On Thu, 4 Sep 2025 16:54:38 +0200 > Marek Vasut wrote: > >> On 9/4/25 4:04 PM, Boris Brezillon wrote: >> >> Hello Boris, >> >>>>>> I suspect the extra soft reset I did before "un-halted" the GPU and >>>>>> allowed it to proceed. >>>>> >>>>> Hm, not quite. I mean, you still need to explicitly boot the MCU after >>>>> a reset, which is what the write to MCU_CONTROL [1] does. What the >>>>> soft-reset does though, is reset all GPU blocks, including the MCU. >>>>> This means the MCU starts from a fresh state when you reach [1]. >>>> >>>> I have a feeling the write to MCU_CONTROL does nothing in my case. >>> >>> I believe it does, otherwise you wouldn't be able to kick the MCU >>> and get things working until the first runtime suspend happens. I gut >>> feeling is that there's something fishy in the FW or SoC integration >>> that causes the FW HALT request to put the MCU/GPU in a bad state >>> preventing further MCU_CONTROL(AUTO_START) from functioning correctly >>> after that point. >> >> I wonder who at NXP could chime in ... Peng, do you know ? >> >>>> Is there some way to probe the MCU state before/after setting GLB_HALT, >>>> and also before/after the MCU_CONTROL write, using >>>> gpu_read()/gpu_write() register operations, to find out what is going on >>>> with the MCU at each point ? >>> >>> Yes, there's an MCU_STATUS register [1]. >> Is that the only register I can use , or is there something more >> detailed ? This register only returns values 0..3 which is not very >> informative. > > Not that I'm aware. Hmmmmm ... is there any way we can progress with the MX95 upstreaming with full reset , as a hardware implementation workaround in the driver, or some such ?