From: "Pandey, Radhey Shyam" <radheys@amd.com>
To: "Rob Herring (Arm)" <robh@kernel.org>,
Vinod Koul <vkoul@kernel.org>, Frank Li <Frank.Li@kernel.org>,
Michal Simek <michal.simek@amd.com>
Cc: dmaengine@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, harini.katakam@amd.com,
Suraj.Gupta2@amd.com
Subject: Re: [PATCH] dmaengine: xilinx: Treat "xlnx,flush-fsync" as a flag
Date: Sat, 13 Jun 2026 20:43:50 +0530 [thread overview]
Message-ID: <419770c4-a536-4702-99c0-76f641f43cdb@amd.com> (raw)
In-Reply-To: <20260612215233.1887921-1-robh@kernel.org>
> The Xilinx DMA binding documents "xlnx,flush-fsync" as a boolean flag.
> The driver read it as an integer cell and warned when it was absent,
> which does not match the documented property encoding.
The original .txt binding (before schema conversion) was not a boolean:
xlnx,flush-fsync: Tells which channel to Flush on Frame sync.
It takes following values:
{1}, flush both channels
{2}, flush mm2s channel
{3}, flush s2mm channel
xilinx_dma_device struct stored it in u32 flush_on_fsync. However yaml
conversion silently changed this to bool which was incorrect. I think
we should change in YAML to make xlnx,flush-fsync as u32?
>
> Use the boolean helper so the driver follows the binding. Leave
> "xlnx,irq-delay" as an 8-bit property read because the hardware field
> is 8 bits wide.
We can skip about irq-delay mention here.
Thanks,
Radhey>
> Assisted-by: Codex:gpt-5-5
> Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
> ---
> drivers/dma/xilinx/xilinx_dma.c | 7 ++-----
> 1 file changed, 2 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/dma/xilinx/xilinx_dma.c b/drivers/dma/xilinx/xilinx_dma.c
> index 404235c17353..cbb23fd6e096 100644
> --- a/drivers/dma/xilinx/xilinx_dma.c
> +++ b/drivers/dma/xilinx/xilinx_dma.c
> @@ -3262,11 +3262,8 @@ static int xilinx_dma_probe(struct platform_device *pdev)
> goto disable_clks;
> }
>
> - err = of_property_read_u32(node, "xlnx,flush-fsync",
> - &xdev->flush_on_fsync);
> - if (err < 0)
> - dev_warn(xdev->dev,
> - "missing xlnx,flush-fsync property\n");
> + xdev->flush_on_fsync =
> + of_property_read_bool(node, "xlnx,flush-fsync");
> }
>
> err = of_property_read_u32(node, "xlnx,addrwidth", &addr_width);
prev parent reply other threads:[~2026-06-13 15:14 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-06-12 21:52 [PATCH] dmaengine: xilinx: Treat "xlnx,flush-fsync" as a flag Rob Herring (Arm)
2026-06-13 15:13 ` Pandey, Radhey Shyam [this message]
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=419770c4-a536-4702-99c0-76f641f43cdb@amd.com \
--to=radheys@amd.com \
--cc=Frank.Li@kernel.org \
--cc=Suraj.Gupta2@amd.com \
--cc=dmaengine@vger.kernel.org \
--cc=harini.katakam@amd.com \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=michal.simek@amd.com \
--cc=robh@kernel.org \
--cc=vkoul@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox