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Tue, 26 Feb 2019 10:30:12 +0000 (GMT) Received: from SFHDAG5NODE3.st.com (10.75.127.15) by SFHDAG4NODE1.st.com (10.75.127.10) with Microsoft SMTP Server (TLS) id 15.0.1347.2; Tue, 26 Feb 2019 11:30:12 +0100 Received: from SFHDAG5NODE3.st.com ([fe80::7c09:5d6b:d2c7:5f47]) by SFHDAG5NODE3.st.com ([fe80::7c09:5d6b:d2c7:5f47%20]) with mapi id 15.00.1347.000; Tue, 26 Feb 2019 11:30:12 +0100 From: Christophe ROULLIER To: Rob Herring Subject: Re: [PATCH V2 3/8] dt-bindings: net: stmmac: add phys config properties Thread-Topic: [PATCH V2 3/8] dt-bindings: net: stmmac: add phys config properties Thread-Index: AQHUyoiWpExj405+ekOaRsfcLh6Cn6XsdFCAgAViVgA= Date: Tue, 26 Feb 2019 10:30:12 +0000 Message-ID: <419f54c3-08a7-42be-4e1a-a7c0f61a4543@st.com> References: <1550824089-19961-1-git-send-email-christophe.roullier@st.com> <1550824089-19961-4-git-send-email-christophe.roullier@st.com> <20190223001651.GA22381@bogus> In-Reply-To: <20190223001651.GA22381@bogus> Accept-Language: fr-FR, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: user-agent: Mozilla/5.0 (X11; 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charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 2/23/19 1:16 AM, Rob Herring wrote: > On Fri, Feb 22, 2019 at 09:28:04AM +0100, Christophe Roullier wrote: >> Add properties to support all Phy config >> PHY_MODE (MII,GMII, RMII, RGMII) and in normal, PHY wo crystal (25Mhz), >> PHY wo crystal (50Mhz), No 125Mhz from PHY config. >> >> Signed-off-by: Christophe Roullier >> --- >> Documentation/devicetree/bindings/net/stm32-dwmac.txt | 6 +++--- >> 1 file changed, 3 insertions(+), 3 deletions(-) >> >> diff --git a/Documentation/devicetree/bindings/net/stm32-dwmac.txt b/Documentation/devicetree/bindings/net/stm32-dwmac.txt >> index 1341012..f42dc68 100644 >> --- a/Documentation/devicetree/bindings/net/stm32-dwmac.txt >> +++ b/Documentation/devicetree/bindings/net/stm32-dwmac.txt >> @@ -24,9 +24,9 @@ Required properties: >> encompases the glue register, and the offset of the control register. >> >> Optional properties: >> -- clock-names: For MPU family "mac-clk-ck" for PHY without quartz >> -- st,int-phyclk (boolean) : valid only where PHY do not have quartz and need to be clock >> - by RCC > > You can't just remove properties. There is no risk to remove/rename these 2 properties, because it is specific board which is never deployed. With new properties (renaming clock (eth-ck) + st,eth_clk_sel and st,eth_ref_clk_sel, we are managed all kind of specific boards stm32mp1 So no risk of backward compatible. > >> +- clock-names: For MPU family "eth-ck" for PHY without quartz >> +- st,eth_clk_sel (boolean) : set this property in RGMII PHY when you do not want use 125Mhz >> +- st,eth_ref_clk_sel (boolean) : set this property in RMII mode when you have PHY without crystal 50MHz > > s/_/-/ > > 'sel' I assume is short for select, but the naming here and description > don't really tell me what I'm getting. > Ok, Rob, I will update with your recommendations > Rob > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel