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Fri, 16 Oct 2020 11:47:10 GMT Received: by smtp.codeaurora.org (Postfix, from userid 1001) id 78E5DC43382; Fri, 16 Oct 2020 11:47:10 +0000 (UTC) Received: from mail.codeaurora.org (localhost.localdomain [127.0.0.1]) (using TLSv1 with cipher ECDHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) (Authenticated sender: saiprakash.ranjan) by smtp.codeaurora.org (Postfix) with ESMTPSA id CCC45C433F1; Fri, 16 Oct 2020 11:47:09 +0000 (UTC) MIME-Version: 1.0 Date: Fri, 16 Oct 2020 17:17:09 +0530 From: Sai Prakash Ranjan To: Suzuki Poulose Subject: Re: [PATCH] coresight: etm4x: Skip setting LPOVERRIDE bit for qcom,skip-power-up In-Reply-To: <5c4f6f5d-b07d-0816-331f-7c7463fa99b3@arm.com> References: <20201016101025.26505-1-saiprakash.ranjan@codeaurora.org> <5c4f6f5d-b07d-0816-331f-7c7463fa99b3@arm.com> Message-ID: <41bbcd43c2b016b6d785c3750622e9fe@codeaurora.org> X-Sender: saiprakash.ranjan@codeaurora.org User-Agent: Roundcube Webmail/1.3.9 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20201016_074722_769108_EFE089B0 X-CRM114-Status: GOOD ( 15.36 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: denik@chromium.org, Mathieu Poirier , linux-arm-msm@vger.kernel.org, coresight@lists.linaro.org, linux-kernel@vger.kernel.org, Stephen Boyd , linux-arm-kernel@lists.infradead.org, Mike Leach Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="us-ascii"; Format="flowed" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi Suzuki, On 2020-10-16 16:51, Suzuki Poulose wrote: > Hi Sai, > > On 10/16/20 11:10 AM, Sai Prakash Ranjan wrote: >> There is a bug on the systems supporting to skip power up >> (qcom,skip-power-up) where setting LPOVERRIDE bit(low-power >> state override behaviour) will result in CPU hangs/lockups >> even on the implementations which supports it. So skip >> setting the LPOVERRIDE bit for such platforms. >> >> Fixes: 02510a5aa78d ("coresight: etm4x: Add support to skip trace unit >> power up") >> Signed-off-by: Sai Prakash Ranjan > > The fix is fine by me. Btw, is there a hardware Erratum assigned for > this ? It would be good to have the Erratum documented somewhere, > preferrably ( Documentation/arm64/silicon-errata.rst ) > No, afaik we don't have any erratum assigned to this bug. It was already present in downstream kernel and since we support these targets with the previous HW bug (qcom,skip-power-up) now in upstream, we would need this fix in upstream kernel as well. Thanks, Sai -- QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel