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Thu, 28 Aug 2025 17:21:27 +0200 (MEST) Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-ap.st.com (STMicroelectronics) with ESMTP id 2161540055; Thu, 28 Aug 2025 17:20:12 +0200 (CEST) Received: from Webmail-eu.st.com (shfdag1node2.st.com [10.75.129.70]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 29254768F38; Thu, 28 Aug 2025 17:19:14 +0200 (CEST) Received: from [10.48.86.164] (10.48.86.164) by SHFDAG1NODE2.st.com (10.75.129.70) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.39; Thu, 28 Aug 2025 17:19:13 +0200 Message-ID: <4201bb6b-3ad8-4b35-b152-0d725310245b@foss.st.com> Date: Thu, 28 Aug 2025 17:18:56 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v5 06/13] dt-bindings: arm: stm32: add required #clock-cells property To: Raphael Gallais-Pou , Yannick Fertre , Philippe Cornu , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Maxime Coquelin , "Alexandre Torgue" , Catalin Marinas , Will Deacon CC: , , , , References: <20250822-drm-misc-next-v5-0-9c825e28f733@foss.st.com> <20250822-drm-misc-next-v5-6-9c825e28f733@foss.st.com> Content-Language: en-US From: Christophe ROULLIER In-Reply-To: <20250822-drm-misc-next-v5-6-9c825e28f733@foss.st.com> Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit X-Originating-IP: [10.48.86.164] X-ClientProxiedBy: SHFCAS1NODE1.st.com (10.75.129.72) To SHFDAG1NODE2.st.com (10.75.129.70) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1099,Hydra:6.1.9,FMLib:17.12.80.40 definitions=2025-08-28_04,2025-08-28_01,2025-03-28_01 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250828_082142_951554_1CB191F8 X-CRM114-Status: GOOD ( 13.16 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 8/22/25 16:34, Raphael Gallais-Pou wrote: > On STM32MP25 SoC, the syscfg peripheral provides a clock to the display > subsystem through a multiplexer. Since it only provides a single clock, > the cell value is 0. > > Doing so allows the clock consumers to reach the peripheral and gate the > clock accordingly. > > Reviewed-by: Rob Herring (Arm) > Reviewed-by: Yannick Fertre > Signed-off-by: Raphael Gallais-Pou > --- > .../bindings/arm/stm32/st,stm32-syscon.yaml | 31 +++++++++++++++------- > 1 file changed, 21 insertions(+), 10 deletions(-) > > diff --git a/Documentation/devicetree/bindings/arm/stm32/st,stm32-syscon.yaml b/Documentation/devicetree/bindings/arm/stm32/st,stm32-syscon.yaml > index ed97652c84922813e94b1818c07fe8714891c089..95d2319afe235fa86974d80f89c9deeae2275232 100644 > --- a/Documentation/devicetree/bindings/arm/stm32/st,stm32-syscon.yaml > +++ b/Documentation/devicetree/bindings/arm/stm32/st,stm32-syscon.yaml > @@ -36,20 +36,31 @@ properties: > clocks: > maxItems: 1 > > + "#clock-cells": > + const: 0 > + > required: > - compatible > - reg > > -if: > - properties: > - compatible: > - contains: > - enum: > - - st,stm32mp157-syscfg > - - st,stm32f4-gcan > -then: > - required: > - - clocks > +allOf: > + - if: > + properties: > + compatible: > + contains: > + enum: > + - st,stm32mp157-syscfg > + - st,stm32f4-gcan > + then: > + required: > + - clocks > + - if: > + properties: > + compatible: > + const: st,stm32mp25-syscfg > + then: > + required: > + - "#clock-cells" > > additionalProperties: false > > Acked-by: Christophe Roullier You can merge it on DRM MISC. Best Regards, Christophe