From: "Jérôme Pouiller" <jerome.pouiller@silabs.com>
To: Maxime Ripard <maxime@cerno.tech>
Cc: Marc Zyngier <maz@kernel.org>,
Marc Dorval <marc.dorval@silabs.com>,
Thomas Gleixner <tglx@linutronix.de>,
Chen-Yu Tsai <wens@csie.org>,
linux-arm-kernel@lists.infradead.org
Subject: Re: Possible race while masking IRQ on Allwinner A20
Date: Thu, 21 May 2020 15:12:01 +0200 [thread overview]
Message-ID: <4228495.4SuWXshX0D@pc-42> (raw)
In-Reply-To: <20200521072634.6ig7jcuy5tmvmojf@gilmour.lan>
On Thursday 21 May 2020 09:26:34 CEST Maxime Ripard wrote:
[...]
> On Tue, May 19, 2020 at 10:59:26AM +0200, Jérôme Pouiller wrote:
[...]
> > The chip WF200 allows to use a dedicated line for the IRQ (aka
> > "Out-Of-Band" IRQ). So I have enabled this feature with a edge triggered
> > IRQ. However, I missed some IRQs. Indeed, it seems that Allwinner use a
> > 32KHz clock to sample the IRQs. It is not fast enough for us. I think it
> > explains why we miss some IRQs (using the attribute "input-debounce"[2],
> > I tried to enable the 24Mhz clock, but without success).
>
> Without success as in you couldn't make it use the 24MHz clock, or using it
> didn't change anything?
I didn't make the change myself, but it seems that the board was unable
to run correctly when the attribute "input-debounce" was used. Since
"input-debounce" impacts the whole GPIO bank, I think it has impacted
other devices.
Finally, I didn't spend so much time on this and I don't know if it the
24Mhz clock has been finally correctly enabled.
--
Jérôme Pouiller
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prev parent reply other threads:[~2020-05-21 13:12 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-05-19 8:59 Possible race while masking IRQ on Allwinner A20 Jérôme Pouiller
2020-05-21 7:26 ` Maxime Ripard
2020-05-21 8:02 ` Marc Zyngier
2020-05-21 13:28 ` Jérôme Pouiller
2020-05-21 13:39 ` Marc Zyngier
2020-05-21 14:08 ` Jérôme Pouiller
2020-05-21 13:12 ` Jérôme Pouiller [this message]
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