[PATCH v2 0/4] Add support for HDMI1 output on RK3588 SoC

[PATCH v2 0/4] Add support for HDMI1 output on RK3588 SoC

[Cristian Ciocaltea]

The patches provide the basic support to handle the second HDMI output
port found on Rockchip RK3588 SoC.

For now I enabled it on Radxa ROCK 5B only, the board I've been using to
validate this.

** IMPORTANT **

The series has a runtime dependency on "phy: phy-rockchip-samsung-hdptx:
Don't use dt aliases to determine phy-id", a patch submitted recently by
Heiko [1].  Without applying it, the functionality on both HDMI TX ports
will break.

Furthermore, please note this is subject to the same limitations as
HDMI0 when it comes to the supported display modes.  The fixes provided
via [2] are not applicable to HDMI1, hence I will handle it separately
as soon as all dependencies are merged.

Thanks,
Cristian

[1] https://lore.kernel.org/lkml/20241206103401.1780416-3-heiko@sntech.de/
[2] https://lore.kernel.org/all/20241116-vop2-hdmi0-disp-modes-v1-0-2bca51db4898@collabora.com/

Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
---
Changes in v2:
- Override hdmi1 pinctrl-0 on rock-5b as it requires hdmim0_tx1_cec
  instead of hdmim2_tx1_cec (fixes a pin conflict when enabling
  CONFIG_SPI_ROCKCHIP_SFC)
- Link to v1: https://lore.kernel.org/r/20241207-rk3588-hdmi1-v1-0-ca3a99b46a40@collabora.com

---
Cristian Ciocaltea (4):
      drm/rockchip: dw_hdmi_qp: Add support for RK3588 HDMI1 output
      arm64: dts: rockchip: Add PHY node for HDMI1 TX port on RK3588
      arm64: dts: rockchip: Add HDMI1 node on RK3588
      arm64: dts: rockchip: Enable HDMI1 on rock-5b

 arch/arm64/boot/dts/rockchip/rk3588-extra.dtsi  |  62 ++++++++++++
 arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts |  44 ++++++++-
 drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c  | 119 +++++++++++++++++++-----
 3 files changed, 200 insertions(+), 25 deletions(-)
---
base-commit: 40384c840ea1944d7c5a392e8975ed088ecf0b37
change-id: 20241207-rk3588-hdmi1-704cbb7cd75f

[PATCH v2 1/4] drm/rockchip: dw_hdmi_qp: Add support for RK3588 HDMI1 output

[Cristian Ciocaltea]

Provide the basic support required to enable the second HDMI TX port
found on RK3588 SoC.

Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
---
 drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c | 119 ++++++++++++++++++++-----
 1 file changed, 96 insertions(+), 23 deletions(-)

diff --git a/drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c b/drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c
index c8b362cc2b95fd490029a9c0552ad9fbc5631d17..c36fc130b73440c9e3f2098f408a5cdd2f58e8ef 100644
--- a/drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c
+++ b/drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c
@@ -28,20 +28,26 @@
 #define RK3588_GRF_SOC_CON2		0x0308
 #define RK3588_HDMI0_HPD_INT_MSK	BIT(13)
 #define RK3588_HDMI0_HPD_INT_CLR	BIT(12)
+#define RK3588_HDMI1_HPD_INT_MSK	BIT(15)
+#define RK3588_HDMI1_HPD_INT_CLR	BIT(14)
 #define RK3588_GRF_SOC_CON7		0x031c
 #define RK3588_SET_HPD_PATH_MASK	GENMASK(13, 12)
 #define RK3588_GRF_SOC_STATUS1		0x0384
 #define RK3588_HDMI0_LEVEL_INT		BIT(16)
+#define RK3588_HDMI1_LEVEL_INT		BIT(24)
 #define RK3588_GRF_VO1_CON3		0x000c
+#define RK3588_GRF_VO1_CON6		0x0018
 #define RK3588_SCLIN_MASK		BIT(9)
 #define RK3588_SDAIN_MASK		BIT(10)
 #define RK3588_MODE_MASK		BIT(11)
 #define RK3588_I2S_SEL_MASK		BIT(13)
 #define RK3588_GRF_VO1_CON9		0x0024
 #define RK3588_HDMI0_GRANT_SEL		BIT(10)
+#define RK3588_HDMI1_GRANT_SEL		BIT(12)
 
 #define HIWORD_UPDATE(val, mask)	((val) | (mask) << 16)
 #define HOTPLUG_DEBOUNCE_MS		150
+#define MAX_HDMI_PORT_NUM		2
 
 struct rockchip_hdmi_qp {
 	struct device *dev;
@@ -53,6 +59,7 @@ struct rockchip_hdmi_qp {
 	struct phy *phy;
 	struct gpio_desc *enable_gpio;
 	struct delayed_work hpd_work;
+	int port_id;
 };
 
 static struct rockchip_hdmi_qp *to_rockchip_hdmi_qp(struct drm_encoder *encoder)
@@ -127,20 +134,24 @@ dw_hdmi_qp_rk3588_read_hpd(struct dw_hdmi_qp *dw_hdmi, void *data)
 	u32 val;
 
 	regmap_read(hdmi->regmap, RK3588_GRF_SOC_STATUS1, &val);
+	val &= hdmi->port_id ? RK3588_HDMI1_LEVEL_INT : RK3588_HDMI0_LEVEL_INT;
 
-	return val & RK3588_HDMI0_LEVEL_INT ?
-		connector_status_connected : connector_status_disconnected;
+	return val ? connector_status_connected : connector_status_disconnected;
 }
 
 static void dw_hdmi_qp_rk3588_setup_hpd(struct dw_hdmi_qp *dw_hdmi, void *data)
 {
 	struct rockchip_hdmi_qp *hdmi = (struct rockchip_hdmi_qp *)data;
+	u32 val;
+
+	if (hdmi->port_id)
+		val = HIWORD_UPDATE(RK3588_HDMI1_HPD_INT_CLR,
+				    RK3588_HDMI1_HPD_INT_CLR | RK3588_HDMI1_HPD_INT_MSK);
+	else
+		val = HIWORD_UPDATE(RK3588_HDMI0_HPD_INT_CLR,
+				    RK3588_HDMI0_HPD_INT_CLR | RK3588_HDMI0_HPD_INT_MSK);
 
-	regmap_write(hdmi->regmap,
-		     RK3588_GRF_SOC_CON2,
-		     HIWORD_UPDATE(RK3588_HDMI0_HPD_INT_CLR,
-				   RK3588_HDMI0_HPD_INT_CLR |
-				   RK3588_HDMI0_HPD_INT_MSK));
+	regmap_write(hdmi->regmap, RK3588_GRF_SOC_CON2, val);
 }
 
 static const struct dw_hdmi_qp_phy_ops rk3588_hdmi_phy_ops = {
@@ -173,8 +184,12 @@ static irqreturn_t dw_hdmi_qp_rk3588_hardirq(int irq, void *dev_id)
 	regmap_read(hdmi->regmap, RK3588_GRF_SOC_STATUS1, &intr_stat);
 
 	if (intr_stat) {
-		val = HIWORD_UPDATE(RK3588_HDMI0_HPD_INT_MSK,
-				    RK3588_HDMI0_HPD_INT_MSK);
+		if (hdmi->port_id)
+			val = HIWORD_UPDATE(RK3588_HDMI1_HPD_INT_MSK,
+					    RK3588_HDMI1_HPD_INT_MSK);
+		else
+			val = HIWORD_UPDATE(RK3588_HDMI0_HPD_INT_MSK,
+					    RK3588_HDMI0_HPD_INT_MSK);
 		regmap_write(hdmi->regmap, RK3588_GRF_SOC_CON2, val);
 		return IRQ_WAKE_THREAD;
 	}
@@ -191,22 +206,44 @@ static irqreturn_t dw_hdmi_qp_rk3588_irq(int irq, void *dev_id)
 	if (!intr_stat)
 		return IRQ_NONE;
 
-	val = HIWORD_UPDATE(RK3588_HDMI0_HPD_INT_CLR,
-			    RK3588_HDMI0_HPD_INT_CLR);
+	if (hdmi->port_id)
+		val = HIWORD_UPDATE(RK3588_HDMI1_HPD_INT_CLR,
+				    RK3588_HDMI1_HPD_INT_CLR);
+	else
+		val = HIWORD_UPDATE(RK3588_HDMI0_HPD_INT_CLR,
+				    RK3588_HDMI0_HPD_INT_CLR);
 	regmap_write(hdmi->regmap, RK3588_GRF_SOC_CON2, val);
 
 	mod_delayed_work(system_wq, &hdmi->hpd_work,
 			 msecs_to_jiffies(HOTPLUG_DEBOUNCE_MS));
 
-	val |= HIWORD_UPDATE(0, RK3588_HDMI0_HPD_INT_MSK);
+	if (hdmi->port_id)
+		val |= HIWORD_UPDATE(0, RK3588_HDMI1_HPD_INT_MSK);
+	else
+		val |= HIWORD_UPDATE(0, RK3588_HDMI0_HPD_INT_MSK);
 	regmap_write(hdmi->regmap, RK3588_GRF_SOC_CON2, val);
 
 	return IRQ_HANDLED;
 }
 
+struct rockchip_hdmi_qp_cfg {
+	unsigned int num_ports;
+	unsigned int port_ids[MAX_HDMI_PORT_NUM];
+	const struct dw_hdmi_qp_phy_ops *phy_ops;
+};
+
+static const struct rockchip_hdmi_qp_cfg rk3588_hdmi_cfg = {
+	.num_ports = 2,
+	.port_ids = {
+		0xfde80000,
+		0xfdea0000,
+	},
+	.phy_ops = &rk3588_hdmi_phy_ops,
+};
+
 static const struct of_device_id dw_hdmi_qp_rockchip_dt_ids[] = {
 	{ .compatible = "rockchip,rk3588-dw-hdmi-qp",
-	  .data = &rk3588_hdmi_phy_ops },
+	  .data = &rk3588_hdmi_cfg },
 	{},
 };
 MODULE_DEVICE_TABLE(of, dw_hdmi_qp_rockchip_dt_ids);
@@ -219,11 +256,13 @@ static int dw_hdmi_qp_rockchip_bind(struct device *dev, struct device *master,
 		"ref" /* keep "ref" last */
 	};
 	struct platform_device *pdev = to_platform_device(dev);
+	const struct rockchip_hdmi_qp_cfg *cfg;
 	struct dw_hdmi_qp_plat_data plat_data;
 	struct drm_device *drm = data;
 	struct drm_connector *connector;
 	struct drm_encoder *encoder;
 	struct rockchip_hdmi_qp *hdmi;
+	struct resource *res;
 	struct clk *clk;
 	int ret, irq, i;
 	u32 val;
@@ -235,12 +274,31 @@ static int dw_hdmi_qp_rockchip_bind(struct device *dev, struct device *master,
 	if (!hdmi)
 		return -ENOMEM;
 
-	plat_data.phy_ops = of_device_get_match_data(dev);
-	if (!plat_data.phy_ops)
+	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+	if (!res)
+		return -ENODEV;
+
+	cfg = of_device_get_match_data(dev);
+	if (!cfg)
 		return -ENODEV;
 
-	plat_data.phy_data = hdmi;
 	hdmi->dev = &pdev->dev;
+	hdmi->port_id = -ENODEV;
+
+	/* Identify port ID by matching base IO address */
+	for (i = 0; i < cfg->num_ports; i++) {
+		if (res->start == cfg->port_ids[i]) {
+			hdmi->port_id = i;
+			break;
+		}
+	}
+	if (hdmi->port_id < 0) {
+		drm_err(hdmi, "Failed to match HDMI port ID\n");
+		return hdmi->port_id;
+	}
+
+	plat_data.phy_ops = cfg->phy_ops;
+	plat_data.phy_data = hdmi;
 
 	encoder = &hdmi->encoder.encoder;
 	encoder->possible_crtcs = drm_of_find_possible_crtcs(drm, dev->of_node);
@@ -303,17 +361,26 @@ static int dw_hdmi_qp_rockchip_bind(struct device *dev, struct device *master,
 	      HIWORD_UPDATE(RK3588_SDAIN_MASK, RK3588_SDAIN_MASK) |
 	      HIWORD_UPDATE(RK3588_MODE_MASK, RK3588_MODE_MASK) |
 	      HIWORD_UPDATE(RK3588_I2S_SEL_MASK, RK3588_I2S_SEL_MASK);
-	regmap_write(hdmi->vo_regmap, RK3588_GRF_VO1_CON3, val);
+	regmap_write(hdmi->vo_regmap,
+		     hdmi->port_id ? RK3588_GRF_VO1_CON6 : RK3588_GRF_VO1_CON3,
+		     val);
 
 	val = HIWORD_UPDATE(RK3588_SET_HPD_PATH_MASK,
 			    RK3588_SET_HPD_PATH_MASK);
 	regmap_write(hdmi->regmap, RK3588_GRF_SOC_CON7, val);
 
-	val = HIWORD_UPDATE(RK3588_HDMI0_GRANT_SEL,
-			    RK3588_HDMI0_GRANT_SEL);
+	if (hdmi->port_id)
+		val = HIWORD_UPDATE(RK3588_HDMI1_GRANT_SEL,
+				    RK3588_HDMI1_GRANT_SEL);
+	else
+		val = HIWORD_UPDATE(RK3588_HDMI0_GRANT_SEL,
+				    RK3588_HDMI0_GRANT_SEL);
 	regmap_write(hdmi->vo_regmap, RK3588_GRF_VO1_CON9, val);
 
-	val = HIWORD_UPDATE(RK3588_HDMI0_HPD_INT_MSK, RK3588_HDMI0_HPD_INT_MSK);
+	if (hdmi->port_id)
+		val = HIWORD_UPDATE(RK3588_HDMI1_HPD_INT_MSK, RK3588_HDMI1_HPD_INT_MSK);
+	else
+		val = HIWORD_UPDATE(RK3588_HDMI0_HPD_INT_MSK, RK3588_HDMI0_HPD_INT_MSK);
 	regmap_write(hdmi->regmap, RK3588_GRF_SOC_CON2, val);
 
 	INIT_DELAYED_WORK(&hdmi->hpd_work, dw_hdmi_qp_rk3588_hpd_work);
@@ -391,14 +458,20 @@ static int __maybe_unused dw_hdmi_qp_rockchip_resume(struct device *dev)
 	      HIWORD_UPDATE(RK3588_SDAIN_MASK, RK3588_SDAIN_MASK) |
 	      HIWORD_UPDATE(RK3588_MODE_MASK, RK3588_MODE_MASK) |
 	      HIWORD_UPDATE(RK3588_I2S_SEL_MASK, RK3588_I2S_SEL_MASK);
-	regmap_write(hdmi->vo_regmap, RK3588_GRF_VO1_CON3, val);
+	regmap_write(hdmi->vo_regmap,
+		     hdmi->port_id ? RK3588_GRF_VO1_CON6 : RK3588_GRF_VO1_CON3,
+		     val);
 
 	val = HIWORD_UPDATE(RK3588_SET_HPD_PATH_MASK,
 			    RK3588_SET_HPD_PATH_MASK);
 	regmap_write(hdmi->regmap, RK3588_GRF_SOC_CON7, val);
 
-	val = HIWORD_UPDATE(RK3588_HDMI0_GRANT_SEL,
-			    RK3588_HDMI0_GRANT_SEL);
+	if (hdmi->port_id)
+		val = HIWORD_UPDATE(RK3588_HDMI1_GRANT_SEL,
+				    RK3588_HDMI1_GRANT_SEL);
+	else
+		val = HIWORD_UPDATE(RK3588_HDMI0_GRANT_SEL,
+				    RK3588_HDMI0_GRANT_SEL);
 	regmap_write(hdmi->vo_regmap, RK3588_GRF_VO1_CON9, val);
 
 	dw_hdmi_qp_resume(dev, hdmi->hdmi);

-- 
2.47.0

[PATCH v2 2/4] arm64: dts: rockchip: Add PHY node for HDMI1 TX port on RK3588

[Cristian Ciocaltea]

In preparation to enable the second HDMI output port found on RK3588
SoC, add the related PHY node.  This requires a GRF, hence add the
dependent node as well.

Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
---
 arch/arm64/boot/dts/rockchip/rk3588-extra.dtsi | 21 +++++++++++++++++++++
 1 file changed, 21 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3588-extra.dtsi b/arch/arm64/boot/dts/rockchip/rk3588-extra.dtsi
index 0ce0934ec6b793af45585f67d5312434d80357de..68fa9806164776cef8732bb776e958003779ba28 100644
--- a/arch/arm64/boot/dts/rockchip/rk3588-extra.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3588-extra.dtsi
@@ -67,6 +67,11 @@ u2phy1_otg: otg-port {
 		};
 	};
 
+	hdptxphy1_grf: syscon@fd5e4000 {
+		compatible = "rockchip,rk3588-hdptxphy-grf", "syscon";
+		reg = <0x0 0xfd5e4000 0x0 0x100>;
+	};
+
 	i2s8_8ch: i2s@fddc8000 {
 		compatible = "rockchip,rk3588-i2s-tdm";
 		reg = <0x0 0xfddc8000 0x0 0x1000>;
@@ -395,6 +400,22 @@ sata-port@0 {
 		};
 	};
 
+	hdptxphy1: phy@fed70000 {
+		compatible = "rockchip,rk3588-hdptx-phy";
+		reg = <0x0 0xfed70000 0x0 0x2000>;
+		clocks = <&cru CLK_USB2PHY_HDPTXRXPHY_REF>, <&cru PCLK_HDPTX1>;
+		clock-names = "ref", "apb";
+		#phy-cells = <0>;
+		resets = <&cru SRST_HDPTX1>, <&cru SRST_P_HDPTX1>,
+			 <&cru SRST_HDPTX1_INIT>, <&cru SRST_HDPTX1_CMN>,
+			 <&cru SRST_HDPTX1_LANE>, <&cru SRST_HDPTX1_ROPLL>,
+			 <&cru SRST_HDPTX1_LCPLL>;
+		reset-names = "phy", "apb", "init", "cmn", "lane", "ropll",
+			      "lcpll";
+		rockchip,grf = <&hdptxphy1_grf>;
+		status = "disabled";
+	};
+
 	usbdp_phy1: phy@fed90000 {
 		compatible = "rockchip,rk3588-usbdp-phy";
 		reg = <0x0 0xfed90000 0x0 0x10000>;

-- 
2.47.0

[PATCH v2 3/4] arm64: dts: rockchip: Add HDMI1 node on RK3588

[Cristian Ciocaltea]

Add support for the second HDMI TX port found on RK3588 SoC.

Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
---
 arch/arm64/boot/dts/rockchip/rk3588-extra.dtsi | 41 ++++++++++++++++++++++++++
 1 file changed, 41 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3588-extra.dtsi b/arch/arm64/boot/dts/rockchip/rk3588-extra.dtsi
index 68fa9806164776cef8732bb776e958003779ba28..528319908247e90b33f9dbde0516f8bca849676f 100644
--- a/arch/arm64/boot/dts/rockchip/rk3588-extra.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3588-extra.dtsi
@@ -140,6 +140,47 @@ i2s10_8ch: i2s@fde00000 {
 		status = "disabled";
 	};
 
+	hdmi1: hdmi@fdea0000 {
+		compatible = "rockchip,rk3588-dw-hdmi-qp";
+		reg = <0x0 0xfdea0000 0x0 0x20000>;
+		clocks = <&cru PCLK_HDMITX1>,
+			 <&cru CLK_HDMITX1_EARC>,
+			 <&cru CLK_HDMITX1_REF>,
+			 <&cru MCLK_I2S6_8CH_TX>,
+			 <&cru CLK_HDMIHDP1>,
+			 <&cru HCLK_VO1>;
+		clock-names = "pclk", "earc", "ref", "aud", "hdp", "hclk_vo1";
+		interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH 0>,
+			     <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH 0>,
+			     <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH 0>,
+			     <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH 0>,
+			     <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH 0>;
+		interrupt-names = "avp", "cec", "earc", "main", "hpd";
+		phys = <&hdptxphy1>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&hdmim2_tx1_cec &hdmim0_tx1_hpd
+			     &hdmim1_tx1_scl &hdmim1_tx1_sda>;
+		power-domains = <&power RK3588_PD_VO1>;
+		resets = <&cru SRST_HDMITX1_REF>, <&cru SRST_HDMIHDP1>;
+		reset-names = "ref", "hdp";
+		rockchip,grf = <&sys_grf>;
+		rockchip,vo-grf = <&vo1_grf>;
+		status = "disabled";
+
+		ports {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			hdmi1_in: port@0 {
+				reg = <0>;
+			};
+
+			hdmi1_out: port@1 {
+				reg = <1>;
+			};
+		};
+	};
+
 	pcie3x4: pcie@fe150000 {
 		compatible = "rockchip,rk3588-pcie", "rockchip,rk3568-pcie";
 		#address-cells = <3>;

-- 
2.47.0

[PATCH v2 4/4] arm64: dts: rockchip: Enable HDMI1 on rock-5b

[Cristian Ciocaltea]

Add the necessary DT changes to enable the second HDMI output port on
Radxa ROCK 5B.

While at it, switch the position of &vop_mmu and @vop to maintain the
alphabetical order.

Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
---
 arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts | 44 +++++++++++++++++++++++--
 1 file changed, 42 insertions(+), 2 deletions(-)

diff --git a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
index c44d001da16978bbbb8a93d652893a786e9ea79b..9c3793d394a6f226bbbd3a88381974ea01ca7069 100644
--- a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
@@ -49,6 +49,17 @@ hdmi0_con_in: endpoint {
 		};
 	};
 
+	hdmi1-con {
+		compatible = "hdmi-connector";
+		type = "a";
+
+		port {
+			hdmi1_con_in: endpoint {
+				remote-endpoint = <&hdmi1_out_con>;
+			};
+		};
+	};
+
 	leds {
 		compatible = "gpio-leds";
 		pinctrl-names = "default";
@@ -220,10 +231,32 @@ hdmi0_out_con: endpoint {
 	};
 };
 
+&hdmi1 {
+	pinctrl-0 = <&hdmim0_tx1_cec &hdmim0_tx1_hpd
+		     &hdmim1_tx1_scl &hdmim1_tx1_sda>;
+	status = "okay";
+};
+
+&hdmi1_in {
+	hdmi1_in_vp1: endpoint {
+		remote-endpoint = <&vp1_out_hdmi1>;
+	};
+};
+
+&hdmi1_out {
+	hdmi1_out_con: endpoint {
+		remote-endpoint = <&hdmi1_con_in>;
+	};
+};
+
 &hdptxphy_hdmi0 {
 	status = "okay";
 };
 
+&hdptxphy1 {
+	status = "okay";
+};
+
 &i2c0 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&i2c0m2_xfer>;
@@ -891,11 +924,11 @@ &usb_host2_xhci {
 	status = "okay";
 };
 
-&vop_mmu {
+&vop {
 	status = "okay";
 };
 
-&vop {
+&vop_mmu {
 	status = "okay";
 };
 
@@ -905,3 +938,10 @@ vp0_out_hdmi0: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {
 		remote-endpoint = <&hdmi0_in_vp0>;
 	};
 };
+
+&vp1 {
+	vp1_out_hdmi1: endpoint@ROCKCHIP_VOP2_EP_HDMI1 {
+		reg = <ROCKCHIP_VOP2_EP_HDMI1>;
+		remote-endpoint = <&hdmi1_in_vp1>;
+	};
+};

-- 
2.47.0

Re: [PATCH v2 1/4] drm/rockchip: dw_hdmi_qp: Add support for RK3588 HDMI1 output

[Dmitry Baryshkov]

On Wed, Dec 11, 2024 at 01:06:14AM +0200, Cristian Ciocaltea wrote:
> Provide the basic support required to enable the second HDMI TX port
> found on RK3588 SoC.
> 
> Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
> ---
>  drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c | 119 ++++++++++++++++++++-----
>  1 file changed, 96 insertions(+), 23 deletions(-)
> 

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>

-- 
With best wishes
Dmitry

Re: [PATCH v2 0/4] Add support for HDMI1 output on RK3588 SoC

[Heiko Stübner]

Hi Cristian,

Am Mittwoch, 11. Dezember 2024, 00:06:13 CET schrieb Cristian Ciocaltea:
> The patches provide the basic support to handle the second HDMI output
> port found on Rockchip RK3588 SoC.
> 
> For now I enabled it on Radxa ROCK 5B only, the board I've been using to
> validate this.
> 
> ** IMPORTANT **
> 
> The series has a runtime dependency on "phy: phy-rockchip-samsung-hdptx:
> Don't use dt aliases to determine phy-id", a patch submitted recently by
> Heiko [1].  Without applying it, the functionality on both HDMI TX ports
> will break.

Looking at the drm/rockchip patch, that should not cause disruptions on
its own, right?

Only with the dts-parts enabled would we run into phy-issue.
(Asking, because things go through different trees and the drm
part looks ready)


Heiko


> Furthermore, please note this is subject to the same limitations as
> HDMI0 when it comes to the supported display modes.  The fixes provided
> via [2] are not applicable to HDMI1, hence I will handle it separately
> as soon as all dependencies are merged.
> 
> Thanks,
> Cristian
> 
> [1] https://lore.kernel.org/lkml/20241206103401.1780416-3-heiko@sntech.de/
> [2] https://lore.kernel.org/all/20241116-vop2-hdmi0-disp-modes-v1-0-2bca51db4898@collabora.com/
> 
> Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
> ---
> Changes in v2:
> - Override hdmi1 pinctrl-0 on rock-5b as it requires hdmim0_tx1_cec
>   instead of hdmim2_tx1_cec (fixes a pin conflict when enabling
>   CONFIG_SPI_ROCKCHIP_SFC)
> - Link to v1: https://lore.kernel.org/r/20241207-rk3588-hdmi1-v1-0-ca3a99b46a40@collabora.com
> 
> ---
> Cristian Ciocaltea (4):
>       drm/rockchip: dw_hdmi_qp: Add support for RK3588 HDMI1 output
>       arm64: dts: rockchip: Add PHY node for HDMI1 TX port on RK3588
>       arm64: dts: rockchip: Add HDMI1 node on RK3588
>       arm64: dts: rockchip: Enable HDMI1 on rock-5b
> 
>  arch/arm64/boot/dts/rockchip/rk3588-extra.dtsi  |  62 ++++++++++++
>  arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts |  44 ++++++++-
>  drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c  | 119 +++++++++++++++++++-----
>  3 files changed, 200 insertions(+), 25 deletions(-)
> ---
> base-commit: 40384c840ea1944d7c5a392e8975ed088ecf0b37
> change-id: 20241207-rk3588-hdmi1-704cbb7cd75f
> 
> 

Re: [PATCH v2 0/4] Add support for HDMI1 output on RK3588 SoC

[Cristian Ciocaltea]

Hi Heiko,

On 12/11/24 10:46 AM, Heiko Stübner wrote:
> Hi Cristian,
> 
> Am Mittwoch, 11. Dezember 2024, 00:06:13 CET schrieb Cristian Ciocaltea:
>> The patches provide the basic support to handle the second HDMI output
>> port found on Rockchip RK3588 SoC.
>>
>> For now I enabled it on Radxa ROCK 5B only, the board I've been using to
>> validate this.
>>
>> ** IMPORTANT **
>>
>> The series has a runtime dependency on "phy: phy-rockchip-samsung-hdptx:
>> Don't use dt aliases to determine phy-id", a patch submitted recently by
>> Heiko [1].  Without applying it, the functionality on both HDMI TX ports
>> will break.
> 
> Looking at the drm/rockchip patch, that should not cause disruptions on
> its own, right?
> 
> Only with the dts-parts enabled would we run into phy-issue.
> (Asking, because things go through different trees and the drm
> part looks ready)

That's right, I should have better explained this - all patches except
the last one (that is actually enabling HDMI1 on a specific board) can
be safely applied.

Thanks,
Cristian

Re: [PATCH v2 0/4] Add support for HDMI1 output on RK3588 SoC

[Alexandre ARNOUD]

Hello Cristian,

> On 11 Dec 2024, at 12:06 AM, Cristian Ciocaltea <cristian.ciocaltea@collabora.com> wrote:
> 
> Changes in v2:
> - Override hdmi1 pinctrl-0 on rock-5b as it requires hdmim0_tx1_cec
>  instead of hdmim2_tx1_cec (fixes a pin conflict when enabling
>  CONFIG_SPI_ROCKCHIP_SFC)
> - Link to v1: https://lore.kernel.org/r/20241207-rk3588-hdmi1-v1-0-ca3a99b46a40@collabora.com
> 
> ---
> Cristian Ciocaltea (4):
>      drm/rockchip: dw_hdmi_qp: Add support for RK3588 HDMI1 output
>      arm64: dts: rockchip: Add PHY node for HDMI1 TX port on RK3588
>      arm64: dts: rockchip: Add HDMI1 node on RK3588
>      arm64: dts: rockchip: Enable HDMI1 on rock-5b
> 
> arch/arm64/boot/dts/rockchip/rk3588-extra.dtsi  |  62 ++++++++++++
> arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts |  44 ++++++++-
> drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c  | 119 +++++++++++++++++++-----
> 3 files changed, 200 insertions(+), 25 deletions(-)
> ---
> base-commit: 40384c840ea1944d7c5a392e8975ed088ecf0b37
> change-id: 20241207-rk3588-hdmi1-704cbb7cd75f

Tested-by: Alexandre ARNOUD <aarnoud@me.com>

Works perfectly on Rock-5B, thanks for your work.

Regards,

Alex

Re: [PATCH v2 0/4] Add support for HDMI1 output on RK3588 SoC

[Cristian Ciocaltea]

Hi Alex,

On 12/11/24 11:42 AM, Alexandre ARNOUD wrote:
> Hello Cristian,
> 
>> On 11 Dec 2024, at 12:06 AM, Cristian Ciocaltea <cristian.ciocaltea@collabora.com> wrote:
>>
>> Changes in v2:
>> - Override hdmi1 pinctrl-0 on rock-5b as it requires hdmim0_tx1_cec
>>  instead of hdmim2_tx1_cec (fixes a pin conflict when enabling
>>  CONFIG_SPI_ROCKCHIP_SFC)
>> - Link to v1: https://lore.kernel.org/r/20241207-rk3588-hdmi1-v1-0-ca3a99b46a40@collabora.com
>>
>> ---
>> Cristian Ciocaltea (4):
>>      drm/rockchip: dw_hdmi_qp: Add support for RK3588 HDMI1 output
>>      arm64: dts: rockchip: Add PHY node for HDMI1 TX port on RK3588
>>      arm64: dts: rockchip: Add HDMI1 node on RK3588
>>      arm64: dts: rockchip: Enable HDMI1 on rock-5b
>>
>> arch/arm64/boot/dts/rockchip/rk3588-extra.dtsi  |  62 ++++++++++++
>> arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts |  44 ++++++++-
>> drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c  | 119 +++++++++++++++++++-----
>> 3 files changed, 200 insertions(+), 25 deletions(-)
>> ---
>> base-commit: 40384c840ea1944d7c5a392e8975ed088ecf0b37
>> change-id: 20241207-rk3588-hdmi1-704cbb7cd75f
> 
> Tested-by: Alexandre ARNOUD <aarnoud@me.com>
> 
> Works perfectly on Rock-5B, thanks for your work.

Thanks for your quick test report on the series, which helped
identifying the pin conflict issue which I missed initially.

Regards,
Cristian

Re: (subset) [PATCH v2 0/4] Add support for HDMI1 output on RK3588 SoC

[Heiko Stuebner]

On Wed, 11 Dec 2024 01:06:13 +0200, Cristian Ciocaltea wrote:
> The patches provide the basic support to handle the second HDMI output
> port found on Rockchip RK3588 SoC.
> 
> For now I enabled it on Radxa ROCK 5B only, the board I've been using to
> validate this.
> 
> ** IMPORTANT **
> 
> [...]

Applied, thanks!

[1/4] drm/rockchip: dw_hdmi_qp: Add support for RK3588 HDMI1 output
      commit: 0f818db20c77506ddd870761785740f8230a4207

Best regards,
-- 
Heiko Stuebner <heiko@sntech.de>

Re: [PATCH v2 2/4] arm64: dts: rockchip: Add PHY node for HDMI1 TX port on RK3588

[Jagan Teki]

On Wed, 11 Dec 2024 at 04:37, Cristian Ciocaltea
<cristian.ciocaltea@collabora.com> wrote:
>
> In preparation to enable the second HDMI output port found on RK3588
> SoC, add the related PHY node.  This requires a GRF, hence add the
> dependent node as well.
>
> Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
> ---

Tested-by: Jagan Teki <jagan@edgeble.ai> # edgeble-6tops-modules

Re: [PATCH v2 3/4] arm64: dts: rockchip: Add HDMI1 node on RK3588

[Jagan Teki]

On Wed, 11 Dec 2024 at 04:37, Cristian Ciocaltea
<cristian.ciocaltea@collabora.com> wrote:
>
> Add support for the second HDMI TX port found on RK3588 SoC.
>
> Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
> ---

Tested-by: Jagan Teki <jagan@edgeble.ai> # edgeble-6tops-modules

Re: (subset) [PATCH v2 0/4] Add support for HDMI1 output on RK3588 SoC

[Heiko Stuebner]

On Wed, 11 Dec 2024 01:06:13 +0200, Cristian Ciocaltea wrote:
> The patches provide the basic support to handle the second HDMI output
> port found on Rockchip RK3588 SoC.
> 
> For now I enabled it on Radxa ROCK 5B only, the board I've been using to
> validate this.
> 
> ** IMPORTANT **
> 
> [...]

Applied, thanks!

[2/4] arm64: dts: rockchip: Add PHY node for HDMI1 TX port on RK3588
      commit: ea97212a0f66b7bd71c23c12f781f1770dd6fcff
[3/4] arm64: dts: rockchip: Add HDMI1 node on RK3588
      commit: bed6964e779b5853de042da14320edf9f79506fe
[4/4] arm64: dts: rockchip: Enable HDMI1 on rock-5b
      commit: 77cea7ca13680e14119a3b9635c7ef16cd7ee44e

Best regards,
-- 
Heiko Stuebner <heiko@sntech.de>

Re: [PATCH v2 4/4] arm64: dts: rockchip: Enable HDMI1 on rock-5b

[Mark Brown]

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On Wed, Dec 11, 2024 at 01:06:17AM +0200, Cristian Ciocaltea wrote:
> Add the necessary DT changes to enable the second HDMI output port on
> Radxa ROCK 5B.
> 
> While at it, switch the position of &vop_mmu and @vop to maintain the
> alphabetical order.

We're seeing failures in the Arm lab the IGT tests on this board in
Linus' tree which bisect to 77cea7ca1368 which is this patch.
core_getversion fails:

<14>[   21.933549] [IGT] core_getversion: executing
IGT-Version: 2.0-g8b20280 (aarch64) (Linux: 6.14.0 aarch64)
Using IGT_SRANDOM=1741272980 for randomisation
(core_getversion:284) CRITICAL: Test assertion failure function __igt_unique____real_main84, file ../tests/core_getversion.c:91:
(core_getversion:284) CRITICAL: Failed assertion: fd >= 0
(core_getversion:284) CRITICAL: Last errno: 2, No such file or directory
(core_getversion:284) CRITICAL: file descriptor fd failed
Stack trace:
  #0 ../lib/igt_core.c:2055 __igt_fail_assert()
  #1 [<unknown>+0xe31a129c]
  #2 [<unknown>+0xe31a0dac]
  #3 [__libc_init_first+0x80]
  #4 [__libc_start_main+0x98]
  #5 [<unknown>+0xe31a0df0]
Test core_getversion failed.
**** DEBUG ****
(core_getversion:284) igt_core-INFO: IGT-Version: 2.0-g8b20280 (aarch64) (Linux: 6.14.0 aarch64)
(core_getversion:284) igt_core-INFO: Using IGT_SRANDOM=1741272980 for randomisation
(core_getversion:284) drmtest-DEBUG: Force option used: Using driver rockchip
(core_getversion:284) drmtest-DEBUG: Condition stat(path, &new) != 0 occurred in function _is_already_opened, file ../lib/drmtest.c:407
(core_getversion:284) drmtest-DEBUG: Condition stat(path, &new) != 0 occurred in function _is_already_opened, file ../lib/drmtest.c:407
(core_getversion:284) drmtest-DEBUG: Condition stat(path, &new) != 0 occurred in function _is_already_opened, file ../lib/drmtest.c:407
(core_getversion:284) drmtest-DEBUG: Condition stat(path, &new) != 0 occurred in function _is_already_opened, file ../lib/drmtest.c:407
(core_getversion:284) drmtest-DEBUG: Condition stat(path, &new) != 0 occurred in function _is_already_opened, file ../lib/drmtest.c:407
(core_getversion:284) drmtest-DEBUG: Condition stat(path, &new) != 0 occurred in function _is_already_opened, file ../lib/drmtest.c:407
(core_getversion:284) drmtest-DEBUG: Condition stat(path, &new) != 0 occurred in function _is_already_opened, file ../lib/drmtest.c:407

(core_getversion:284) drmtest-DEBUG: Condition stat(path, &new) != 0 occurred in function _is_already_opened, file ../lib/drmtest.c:407
(core_getversion:284) CRITICAL: Test assertion failure function __igt_unique____real_main84, file ../tests/core_getversion.c:91:
(core_getversion:284) CRITICAL: Failed assertion: fd >= 0

(core_getversion:284) CRITICAL: Last errno: 2, No such file or directory
(core_getversion:284) CRITICAL: file descriptor fd failed
(core_getversion:284) igt_core-INFO: Stack trace:
(core_getversion:284) igt_core-INFO:   #0 ../lib/igt_core.c:2055 __igt_fail_assert()
(core_getversion:284) igt_core-INFO:   #1 [<unknown>+0xe31a129c]
(core_getversion:284) igt_core-INFO:   #2 [<unknown>+0xe31a0dac]
(core_getversion:284) igt_core-INFO:   #3 [__libc_init_first+0x80]
(core_getversion:284) igt_core-INFO:   #4 [__libc_start_main+0x98]
(core_getversion:284) igt_core-INFO:   #5 [<unknown>+0xe31a0df0]
****  END  ****
[1mSubtest basic: FAIL (0.000s)[0m

and all the other tests refuse to run.  Previously the test passed:

<14>[   22.491231] [IGT] core_getversion: executing
IGT-Version: 2.0-g8b20280 (aarch64) (Linux: 6.14.0 aarch64)
<14>[   22.492030] [IGT] core_getversion: starting subtest basic
Using IGT_SRANDOM=1741272980 for randomisation
Opened device: /<14>[   22.492835] [IGT] core_getversion: finished subtest basic, SUCCESS
dev/dri/card0
Starting subtest: basic
0: rockchip v1.0 0 RockC<14>[   22.494233] [IGT] core_getversion: exiting, ret=0
hip Soc DRM
[1mSubtest basic: SUCCESS (0.000s)[0m

The board is running fine in -next so hopefully there's a fix already
there which will make it's way to Linus' tree during the merge window.
We're also seeing something broken with the HDMI audio devices, but I
didn't look into that.

Bisection log:

git bisect start
# status: waiting for both good and bad commits
# good: [1a9239bb4253f9076b5b4b2a1a4e8d7defd77a95] Merge tag 'net-next-6.15' of git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net-next
git bisect good 1a9239bb4253f9076b5b4b2a1a4e8d7defd77a95
# status: waiting for bad commit, 1 good commit known
# bad: [01d5b167dc230cf3b6eb9dd7205f6a705026d1ce] Merge tag 'modules-6.15-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/modules/linux
git bisect bad 01d5b167dc230cf3b6eb9dd7205f6a705026d1ce
# good: [cf05922d63e2ae6a9b1b52ff5236a44c3b29f78c] Merge tag 'drm-intel-gt-next-2025-03-12' of https://gitlab.freedesktop.org/drm/i915/kernel into drm-next
git bisect good cf05922d63e2ae6a9b1b52ff5236a44c3b29f78c
# bad: [72885116069abdd05c245707c3989fc605632970] Merge tag 'landlock-6.15-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/mic/linux
git bisect bad 72885116069abdd05c245707c3989fc605632970
# bad: [b2e7b0ffa56185d04871c6fe317b36d30ce2861d] Merge tag 'erofs-for-6.15-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/xiang/erofs
git bisect bad b2e7b0ffa56185d04871c6fe317b36d30ce2861d
# bad: [c9869f9073bacfa9b6030fd7670f737793277a85] Merge tag 'imx-dt64-6.15' of https://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into soc/dt
git bisect bad c9869f9073bacfa9b6030fd7670f737793277a85
# bad: [d1221aeb5a44f1bbfe16a6efd8bc8b0bc3f565a6] Merge tag 'v6.15-rockchip-dts64-1' of https://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into soc/dt
git bisect bad d1221aeb5a44f1bbfe16a6efd8bc8b0bc3f565a6
# good: [c4991aabc1f90359970c17db38342adf2678a181] Merge tag 'mtk-dts64-for-v6.15' of https://git.kernel.org/pub/scm/linux/kernel/git/mediatek/linux into soc/dt
git bisect good c4991aabc1f90359970c17db38342adf2678a181
# bad: [b2e668a60ed866ba960acb5310d1fb6bf81d154f] arm64: dts: rockchip: Add HDMI1 PHY PLL clock source to VOP2 on RK3588
git bisect bad b2e668a60ed866ba960acb5310d1fb6bf81d154f
# bad: [91abdc6b36e12a2c3a477bde90e9f1dd8c2413bf] arm64: dts: rockchip: add overlay test for Edgeble NCM6A/NCM6B
git bisect bad 91abdc6b36e12a2c3a477bde90e9f1dd8c2413bf
# good: [f62f325a586682b7fff643c9fd8edc348bff6abc] dt-bindings: vendor-prefixes: Add prefix for Ariaboard
git bisect good f62f325a586682b7fff643c9fd8edc348bff6abc
# good: [bed6964e779b5853de042da14320edf9f79506fe] arm64: dts: rockchip: Add HDMI1 node on RK3588
git bisect good bed6964e779b5853de042da14320edf9f79506fe
# bad: [b3dc2a9315c4046b330a784c0527c671fd236414] arm64: dts: rockchip: remove rk3588 optee node
git bisect bad b3dc2a9315c4046b330a784c0527c671fd236414
# bad: [4a2fdf91e1239d9659d0317f3e8e37681ac555a4] arm64: dts: rockchip: Enable HDMI1 out for Edgeble-6TOPS Modules
git bisect bad 4a2fdf91e1239d9659d0317f3e8e37681ac555a4
# bad: [77cea7ca13680e14119a3b9635c7ef16cd7ee44e] arm64: dts: rockchip: Enable HDMI1 on rock-5b
git bisect bad 77cea7ca13680e14119a3b9635c7ef16cd7ee44e
# first bad commit: [77cea7ca13680e14119a3b9635c7ef16cd7ee44e] arm64: dts: rockchip: Enable HDMI1 on rock-5b

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Re: [PATCH v2 4/4] arm64: dts: rockchip: Enable HDMI1 on rock-5b

[Sebastian Reichel]

Hi,

On Mon, Mar 31, 2025 at 08:01:34PM +0100, Mark Brown wrote:
> On Wed, Dec 11, 2024 at 01:06:17AM +0200, Cristian Ciocaltea wrote:
> > Add the necessary DT changes to enable the second HDMI output port on
> > Radxa ROCK 5B.
> > 
> > While at it, switch the position of &vop_mmu and @vop to maintain the
> > alphabetical order.
> 
> We're seeing failures in the Arm lab the IGT tests on this board in
> Linus' tree which bisect to 77cea7ca1368 which is this patch.
> core_getversion fails:
>
>[...]
>
> The board is running fine in -next so hopefully there's a fix already
> there which will make it's way to Linus' tree during the merge window.
> We're also seeing something broken with the HDMI audio devices, but I
> didn't look into that.

I guess the root cause for the problem is, that the pull request for
the PHY subsystem [0] has not yet been merged. It contains [1]
("phy: phy-rockchip-samsung-hdptx: Don't use dt aliases to determine phy-id"),
a fix for properly handling the second RK3588 HDMI PHY instance.

[0] https://lore.kernel.org/all/Z+pFou7KOQZJ1iy4@vaman/
[1] https://web.git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy.git/commit/?h=next&id=f08d1c08563846f9be79a4859e912c8795d690fd

Greetings,

-- Sebastian