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Message-ID: <4404f56f441a4f61e01ebde721ca0220cc96a948.camel@d-silva.org> Subject: Re: [PATCH net-next 4/4] net: stmmac: dwmac-sun8i: Add Allwinner H616 EMAC clock index and internal PHY support From: Alastair D'Silva To: Maxime Chevallier , Andrew Lunn , Heiner Kallweit , Russell King , Alexandre Torgue , "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , James Hilliard , richard.genoud@bootlin.com Cc: netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-sunxi@lists.linux.dev, linux-arm-kernel@lists.infradead.org, Chen-Yu Tsai , Jernej Skrabec , Samuel Holland Date: Wed, 16 Sep 2026 16:45:06 +1000 In-Reply-To: <579d7650-583e-49bd-aa51-02fc52940ea1@bootlin.com> References: <20260916044119.475666-1-alastair@d-silva.org> <20260916044119.475666-5-alastair@d-silva.org> <579d7650-583e-49bd-aa51-02fc52940ea1@bootlin.com> Autocrypt: addr=alastair@d-silva.org; prefer-encrypt=mutual; keydata=mQINBGactvoBEADBFM2HqfQUUM4j40ZQPyYzmnM8S6zrycO0ipDDPMs7nZMzyzGzOdqfS VB/tuYvZOOKVWzJuWJ5aT/YyHx54r3L+D5hTkEG0sXPVJky3yTS9sbHEMSLBHb8TVVuhPVPuieV4g Nkqg5POMTidk8xAw50WpV++tUlewXVSciehnuCQPXhXMP7FcCh4uO8LdN7E8m7ir1LafKTFfoWPah KVT8NGG9r+ucrFcN5F+VnHxTDaI68yRPkNdtUWmp22wIX1KwDCtKFrndYO4p5Hv2hlDKomsuIIHHn muQGRwuh0xpf0nVJNF8ETZHMzxQLfo3e/HvxBFOTkwY9w7CuuQFZchbhS0I3PfmGT0+jiNcdfqjDC fPPB5uhy+DkR6wO72vuwFYUrpU2mdliDSdKEtWBHulnXMJjpBOXetfIwhI8G2dTVg59lN5i9DvJZc 7y1Sp+qfZQ4P9qpYZyQEKR4GNDOdnm6F2LW2cZkcyAU/Ii765zdDMTQMIzZNSxT/FcDd0K1voTNRl QHbQw+kmIMhzSv2JefcC9oNbE0XYzcBDNP5T3O/4itOQ90GCKQEPAbIPeBjlQif7kkyvo/H6yv4s9 duuK7zbJD9AID/+KGLkpU3p68VDB/C2ZSb9rQz3p1CJNSfsX/CPk7sPqA7RKZ4a2B0hSJ2pJCncNZ KXtMlkkm/FmewARAQABtCdBbGFzdGFpciBEJ1NpbHZhIDxhbGFzdGFpckBkLXNpbHZhLm9yZz6JAl EEEwEKADsWIQTQGemDFwqYyU/dBWv75AdnjVo60gUCZpy2+gIbAwULCQgHAgIiAgYVCgkICwIEFgI DAQIeBwIXgAAKCRD75AdnjVo60qHZEACJnLfpS71Hk8bX0CLCNJ5wgqdZD3pBHEdbv9Ux9kRlZp4a ZFwlg9ltwBjl2dZP3PLtD9xQdsdYKVippKd5a7ZZC2y81oDaHjeC9LnPYn8+ce3mGE/+gRyoNfToY N06DeUNJKSlZ9t11UIqZCgfp12u16/Yrigy8C4ihEeHXlLhNX6JkeJR5gsHXJnC7vSuMZY+Qz2R72 ZidWg+cd2WDMGop5sbTvc+55q94A7vTMlWzaix5HdbEUA3sd2U0dMBju5QodRGGhDQMcCu64TydRD MtMzzOk9ThJ036ze3HASWGOppyQmaw58k+XNzbHlr9Sc1LsFUNF7zpWXac2rzlywbyRAdFIT/TC76 hy9zOkwIo2nwA/tdIwLx1j0UZPpAMQmcDUvJqZh6sE+fv6HN0yMPr+sSYJmriMt8Z6leCEHQXOHVI SI5z5FvV3coMmHYRq6aXpfs/8SLiYgkV3B0HE/E18Y3j1OkeLYoqIH1VfzQZeCSL/S77NYvk60/MV 1HFSyqLdUR3uWZI4uZzoEcMoB0GX33uCTp2Ntc00+wSntwekCUQLCMLUb7dZrbpVuobHoWWtkiD2I uE5kAiaVwwwzM0BUwiM6VzVoKbeECz93rdsNtwoDqM0NtzoISC46H/BKVQ9mRNXDO4ThEBpJ4H2Tn mPNRYYcR0u2mNy1EJII04w== Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable User-Agent: Evolution 3.56.2-9 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20260916_074531_060726_308380B5 X-CRM114-Status: GOOD ( 16.04 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Wed, 2026-09-16 at 08:24 +0200, Maxime Chevallier wrote: > Hi, >=20 > >=20 > > =C2=A0.../net/ethernet/stmicro/stmmac/dwmac-sun8i.c | 65 > > ++++++++++++++++--- > > =C2=A01 file changed, 55 insertions(+), 10 deletions(-) > >=20 > > diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c > > b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c > > index 48c52eb96233..1728893589a6 100644 > > --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c > > +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c > > @@ -130,6 +130,16 @@ static const struct emac_variant > > emac_variant_a64 =3D { > > =C2=A0 .tx_delay_max =3D 7, > > =C2=A0}; > > =C2=A0 > > +static const struct emac_variant emac_variant_h616_internal =3D { > > + .syscon_field =3D &sun8i_syscon_reg_field, > > + .soc_has_internal_phy =3D true, > > + .support_mii =3D true, > > + .support_rmii =3D true, > > + .support_rgmii =3D true, > > + .rx_delay_max =3D 31, > > + .tx_delay_max =3D 7, > > +}; > James's series [1] says this SoC only supports RMII (yet includes > RGMII timing > control), and here for seemingly the same device, there's MII and > RGMII > support listed. >=20 > [1] : https://lore.kernel.org/r/20260915-submit-h616-emac1-v1-v1-0- > 195de0bb1f8a@gmail.com >=20 > Maybe you can coordinate with one another, can we connect that SoC to > a non-internal PHY ? > If so, can we use MII, RMII and RGMII ? or is it just RMII ? >=20 > Maxime I just double checked, MII & RGMII are bogus. Only EMAC0 can be connected to an external PHY. --=20 Alastair D'Silva