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[86.58.6.171]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-38f25914171sm26137034f8f.53.2025.02.22.01.48.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 22 Feb 2025 01:48:34 -0800 (PST) From: Jernej =?UTF-8?B?xaBrcmFiZWM=?= To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Samuel Holland , Ryan Walklin Cc: Andre Przywara , Chris Morgan , Hironori KIKUCHI , Philippe Simons , linux-sunxi@lists.linux.dev, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Ryan Walklin Subject: Re: [PATCH 6/8] arm64: dts: allwinner: h616: add LCD, LVDS and PWM pins Date: Sat, 22 Feb 2025 10:48:33 +0100 Message-ID: <4407188.ejJDZkT8p0@jernej-laptop> In-Reply-To: <20250216092827.15444-7-ryan@testtoast.com> References: <20250216092827.15444-1-ryan@testtoast.com> <20250216092827.15444-7-ryan@testtoast.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250222_014837_201224_F6931D1C X-CRM114-Status: GOOD ( 15.09 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Dne nedelja, 16. februar 2025 ob 10:27:13 Srednjeevropski standardni =C4=8D= as je Ryan Walklin napisal(a): > From: Jernej Skrabec >=20 > The Allwinner H616 (and its H618, H700 and T507 package variants with > the same die) have 28 video output pins for RGB/SPI and LVDS display. > These are in GPIO Bank D and are multiplexed. >=20 > In RGB mode, pins PD0-PD23 are for 24-bit RGB pixel output, pins > PD24-PD27 are for clock, DE, HSYNC and VSYNC, and PD28 is a PWM > backlight control. >=20 > In LVDS mode, pins PD0-PD9 are for LVDS0 and LVDS1, and can be > configured by the H616 display engine for either one high-resolution > (dual link) or two low resolution displays. >=20 > Add device tree nodes for the LCD, LVDS0, LVDS1 and PWM pins. Let's just drop PWM pins. PWM support is not yet implemented and it doesn't fall into display themed patch anyway. Best regards, Jernej >=20 > Signed-off-by: Jernej Skrabec > [ryan@testtoast.com: add RGB, LVDS1 and PWM pin assignments] > Signed-off-by: Ryan Walklin > --- > .../arm64/boot/dts/allwinner/sun50i-h616.dtsi | 32 +++++++++++++++++++ > 1 file changed, 32 insertions(+) >=20 > diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi b/arch/arm64/= boot/dts/allwinner/sun50i-h616.dtsi > index 242bac95840f8..806ad87705abc 100644 > --- a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi > +++ b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi > @@ -322,6 +322,32 @@ ir_rx_pin: ir-rx-pin { > function =3D "ir_rx"; > }; > =20 > + /omit-if-no-ref/ > + lcd0_rgb888_pins: lcd0-rgb888-pins { > + pins =3D "PD0", "PD1", "PD2", "PD3", > + "PD4", "PD5", "PD6", "PD7", > + "PD8", "PD9", "PD10", "PD11", > + "PD12", "PD13", "PD14", "PD15", > + "PD16", "PD17", "PD18", "PD19", > + "PD20", "PD21", "PD22", "PD23", > + "PD24", "PD25", "PD26", "PD27"; > + function =3D "lcd0"; > + }; > + > + /omit-if-no-ref/ > + lvds0_pins: lvds0-pins { > + pins =3D "PD0", "PD1", "PD2", "PD3", "PD4", > + "PD5", "PD6", "PD7", "PD8", "PD9"; > + function =3D "lvds0"; > + }; > + > + /omit-if-no-ref/ > + lvds1_pins: lvds1-pins { > + pins =3D "PD10", "PD11", "PD12", "PD13", "PD14", > + "PD15", "PD16", "PD17", "PD18", "PD19"; > + function =3D "lvds1"; > + }; > + > mmc0_pins: mmc0-pins { > pins =3D "PF0", "PF1", "PF2", "PF3", > "PF4", "PF5"; > @@ -348,6 +374,12 @@ mmc2_pins: mmc2-pins { > bias-pull-up; > }; > =20 > + /omit-if-no-ref/ > + pwm0_pin: pwm0-pin { > + pins =3D "PD28"; > + function =3D "pwm0"; > + }; > + > /omit-if-no-ref/ > spi0_pins: spi0-pins { > pins =3D "PC0", "PC2", "PC4"; >=20