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X-IronPort-AV: E=McAfee;i="6400,9594,10387"; a="342581427" X-IronPort-AV: E=Sophos;i="5.92,217,1650956400"; d="scan'208";a="342581427" Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 Jun 2022 18:50:35 -0700 X-IronPort-AV: E=Sophos;i="5.92,217,1650956400"; d="scan'208";a="645044417" Received: from wenli3x-mobl.ccr.corp.intel.com (HELO [10.249.168.117]) ([10.249.168.117]) by fmsmga008-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 Jun 2022 18:50:27 -0700 Message-ID: <450ce024-10c5-6626-c3dc-c2fd962fda61@linux.intel.com> Date: Fri, 24 Jun 2022 09:50:26 +0800 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.9.1 Subject: Re: [PATCH v3 2/5] vfio/iommu_type1: Prefer to reuse domains vs match enforced cache coherency Content-Language: en-US To: Nicolin Chen , joro@8bytes.org, will@kernel.org, marcan@marcan.st, sven@svenpeter.dev, robin.murphy@arm.com, robdclark@gmail.com, matthias.bgg@gmail.com, orsonzhai@gmail.com, baolin.wang7@gmail.com, zhang.lyra@gmail.com, jean-philippe@linaro.org, alex.williamson@redhat.com, jgg@nvidia.com, kevin.tian@intel.com References: <20220623200029.26007-1-nicolinc@nvidia.com> <20220623200029.26007-3-nicolinc@nvidia.com> From: Baolu Lu In-Reply-To: <20220623200029.26007-3-nicolinc@nvidia.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220623_185037_080709_29F75EB8 X-CRM114-Status: GOOD ( 23.67 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: mjrosato@linux.ibm.com, jordan@cosmicpenguin.net, thierry.reding@gmail.com, alyssa@rosenzweig.io, linux-s390@vger.kernel.org, kvm@vger.kernel.org, jonathanh@nvidia.com, yong.wu@mediatek.com, yangyingliang@huawei.com, gerald.schaefer@linux.ibm.com, linux-arm-msm@vger.kernel.org, john.garry@huawei.com, christophe.jaillet@wanadoo.fr, thunder.leizhen@huawei.com, linux-tegra@vger.kernel.org, tglx@linutronix.de, virtualization@lists.linux-foundation.org, linux-arm-kernel@lists.infradead.org, chenxiang66@hisilicon.com, cohuck@redhat.com, linux-kernel@vger.kernel.org, iommu@lists.linux-foundation.org, suravee.suthikulpanit@amd.com, linux-mediatek@lists.infradead.org, dwmw2@infradead.org, baolu.lu@linux.intel.com Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="us-ascii"; Format="flowed" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 2022/6/24 04:00, Nicolin Chen wrote: > From: Jason Gunthorpe > > The KVM mechanism for controlling wbinvd is based on OR of the coherency > property of all devices attached to a guest, no matter whether those > devices are attached to a single domain or multiple domains. > > On the other hand, the benefit to using separate domains was that those > devices attached to domains supporting enforced cache coherency always > mapped with the attributes necessary to provide that feature, therefore > if a non-enforced domain was dropped, the associated group removal would > re-trigger an evaluation by KVM. > > In practice however, the only known cases of such mixed domains included > an Intel IGD device behind an IOMMU lacking snoop control, where such > devices do not support hotplug, therefore this scenario lacks testing and > is not considered sufficiently relevant to support. > > After all, KVM won't take advantage of trying to push a device that could > do enforced cache coherency to a dedicated domain vs re-using an existing > domain, which is non-coherent. > > Simplify this code and eliminate the test. This removes the only logic > that needed to have a dummy domain attached prior to searching for a > matching domain and simplifies the next patches. > > It's unclear whether we want to further optimize the Intel driver to > update the domain coherency after a device is detached from it, at > least not before KVM can be verified to handle such dynamics in related > emulation paths (wbinvd, vcpu load, write_cr0, ept, etc.). In reality > we don't see an usage requiring such optimization as the only device > which imposes such non-coherency is Intel GPU which even doesn't > support hotplug/hot remove. > > Signed-off-by: Jason Gunthorpe > Reviewed-by: Kevin Tian > Signed-off-by: Nicolin Chen > --- > drivers/vfio/vfio_iommu_type1.c | 4 +--- > 1 file changed, 1 insertion(+), 3 deletions(-) > > diff --git a/drivers/vfio/vfio_iommu_type1.c b/drivers/vfio/vfio_iommu_type1.c > index c13b9290e357..f4e3b423a453 100644 > --- a/drivers/vfio/vfio_iommu_type1.c > +++ b/drivers/vfio/vfio_iommu_type1.c > @@ -2285,9 +2285,7 @@ static int vfio_iommu_type1_attach_group(void *iommu_data, > * testing if they're on the same bus_type. > */ > list_for_each_entry(d, &iommu->domain_list, next) { > - if (d->domain->ops == domain->domain->ops && > - d->enforce_cache_coherency == > - domain->enforce_cache_coherency) { > + if (d->domain->ops == domain->domain->ops) { > iommu_detach_group(domain->domain, group->iommu_group); > if (!iommu_attach_group(d->domain, > group->iommu_group)) { Reviewed-by: Lu Baolu Best regards, baolu _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel