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From: Alexander Stein <alexander.stein@ew.tq-group.com>
To: linux-arm-kernel@lists.infradead.org, Marek Vasut <marex@denx.de>
Cc: "Abel Vesa" <abel.vesa@nxp.com>,
	"Dong Aisheng" <aisheng.dong@nxp.com>,
	"Fabio Estevam" <festevam@gmail.com>,
	"Guido Günther" <agx@sigxcpu.org>,
	"Krzysztof Kozlowski" <krzysztof.kozlowski+dt@linaro.org>,
	"Lucas Stach" <l.stach@pengutronix.de>,
	"NXP Linux Team" <linux-imx@nxp.com>,
	"Pengutronix Kernel Team" <kernel@pengutronix.de>,
	"Richard Cochran" <richardcochran@gmail.com>,
	"Rob Herring" <robh+dt@kernel.org>,
	"Sascha Hauer" <s.hauer@pengutronix.de>,
	"Shawn Guo" <shawnguo@kernel.org>,
	devicetree@vger.kernel.org
Subject: Re: [PATCH] arm64: dts: imx8mm: Add display pipeline components
Date: Wed, 05 Apr 2023 15:16:25 +0200	[thread overview]
Message-ID: <4588730.LvFx2qVVIh@steina-w> (raw)
In-Reply-To: <3b6696c1-411c-f382-0da4-67f9272fa306@denx.de>

Hi,

Am Mittwoch, 5. April 2023, 14:32:35 CEST schrieb Marek Vasut:
> On 4/5/23 08:00, Alexander Stein wrote:
> > Hi Marek,
> 
> Hi,
> 
> > Am Dienstag, 4. April 2023, 02:01:51 CEST schrieb Marek Vasut:
> >> Add LCDIF scanout engine and DSIM bridge nodes for i.MX8M Mini.
> >> This makes the DSI display pipeline available on this SoC.
> >> 
> >> Signed-off-by: Marek Vasut <marex@denx.de>
> >> ---
> >> Cc: Abel Vesa <abel.vesa@nxp.com>
> >> Cc: Dong Aisheng <aisheng.dong@nxp.com>
> >> Cc: Fabio Estevam <festevam@gmail.com>
> >> Cc: Guido Günther <agx@sigxcpu.org>
> >> Cc: Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>
> >> Cc: Lucas Stach <l.stach@pengutronix.de>
> >> Cc: NXP Linux Team <linux-imx@nxp.com>
> >> Cc: Pengutronix Kernel Team <kernel@pengutronix.de>
> >> Cc: Richard Cochran <richardcochran@gmail.com>
> >> Cc: Rob Herring <robh+dt@kernel.org>
> >> Cc: Sascha Hauer <s.hauer@pengutronix.de>
> >> Cc: Shawn Guo <shawnguo@kernel.org>
> >> Cc: devicetree@vger.kernel.org
> >> Cc: linux-arm-kernel@lists.infradead.org
> >> ---
> >> 
> >>   arch/arm64/boot/dts/freescale/imx8mm.dtsi | 57 +++++++++++++++++++++++
> >>   1 file changed, 57 insertions(+)
> >> 
> >> diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> >> b/arch/arm64/boot/dts/freescale/imx8mm.dtsi index
> >> e311da7e87bdc..06495c225c94b 100644
> >> --- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> >> +++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> >> @@ -1119,6 +1119,63 @@ aips4: bus@32c00000 {
> >> 
> >>   			#size-cells = <1>;
> >>   			ranges = <0x32c00000 0x32c00000 0x400000>;
> >> 
> >> +			lcdif: lcdif@32e00000 {
> >> +				compatible = "fsl,imx8mm-lcdif",
> > 
> > "fsl,imx6sx-lcdif";
> > 
> >> +				reg = <0x32e00000 0x10000>;
> >> +				clocks = <&clk
> > 
> > IMX8MM_CLK_LCDIF_PIXEL>,
> > 
> >> +					 <&clk
> > 
> > IMX8MM_CLK_DISP_APB_ROOT>,
> > 
> >> +					 <&clk
> > 
> > IMX8MM_CLK_DISP_AXI_ROOT>;
> > 
> >> +				clock-names = "pix", "axi",
> > 
> > "disp_axi";
> > 
> >> +				assigned-clocks = <&clk
> > 
> > IMX8MM_CLK_LCDIF_PIXEL>,
> > 
> >> +						  <&clk
> > 
> > IMX8MM_CLK_DISP_AXI>,
> > 
> >> +						  <&clk
> > 
> > IMX8MM_CLK_DISP_APB>;
> > 
> >> +				assigned-clock-parents = <&clk
> > 
> > IMX8MM_VIDEO_PLL1_OUT>,
> > 
> >> +							 <&clk
> > 
> > IMX8MM_SYS_PLL2_1000M>,
> > 
> >> +							 <&clk
> > 
> > IMX8MM_SYS_PLL1_800M>;
> > 
> >> +				assigned-clock-rates = <594000000>,
> > 
> > <500000000>, <200000000>;
> > 
> >> +				interrupts = <GIC_SPI 5
> > 
> > IRQ_TYPE_LEVEL_HIGH>;
> > 
> >> +				power-domains = <&disp_blk_ctrl
> > 
> > IMX8MM_DISPBLK_PD_LCDIF>;
> > 
> >> +				status = "disabled";
> >> +
> >> +				port {
> >> +					lcdif_to_dsim: endpoint {
> >> +						remote-endpoint =
> > 
> > <&dsim_from_lcdif>;
> > 
> >> +					};
> >> +				};
> >> +			};
> >> +
> >> +			mipi_dsi: dsi@32e10000 {
> >> +				#address-cells = <1>;
> >> +				#size-cells = <0>;

I missed that. These are not necessary.

> >> +				compatible = "fsl,imx8mm-mipi-dsim";
> >> +				reg = <0x32e10000 0x400>;
> >> +				clocks = <&clk IMX8MM_CLK_DSI_CORE>,
> >> +					 <&clk
> > 
> > IMX8MM_CLK_DSI_PHY_REF>;
> > 
> >> +				clock-names = "bus_clk", "sclk_mipi";
> >> +				assigned-clocks = <&clk
> > 
> > IMX8MM_CLK_DSI_CORE>,
> > 
> >> +						  <&clk
> > 
> > IMX8MM_CLK_DSI_PHY_REF>;
> > 
> >> +				assigned-clock-parents = <&clk
> > 
> > IMX8MM_SYS_PLL1_266M>,
> > 
> >> +							 <&clk
> > 
> > IMX8MM_CLK_24M>;
> > 
> >> +				assigned-clock-rates = <266000000>,
> > 
> > <24000000>;
> > 
> >> +				samsung,pll-clock-frequency =
> > 
> > <24000000>;
> > 
> > What about samsung,burst-clock-frequency and samsung,esc-clock-frequency?
> > Is there is sane default? Do they need to be provided in the board file?
> Those two (burst and esc) are display or nearest-bridge specific and go
> into board files.

Thanks for clarification. With the nit from above fixed:
Reviewed-by: Alexander Stein <alexander.stein@ew.tq-group.com>

-- 
TQ-Systems GmbH | Mühlstraße 2, Gut Delling | 82229 Seefeld, Germany
Amtsgericht München, HRB 105018
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  reply	other threads:[~2023-04-05 13:17 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-04-04  0:01 [PATCH] arm64: dts: imx8mm: Add display pipeline components Marek Vasut
2023-04-04 20:48 ` Fabio Estevam
2023-04-05  6:00 ` Alexander Stein
2023-04-05 12:32   ` Marek Vasut
2023-04-05 13:16     ` Alexander Stein [this message]
2023-04-05 17:58       ` Marek Vasut

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